From d3ce52d090b7fcf1248a76dfa26e709dc94b9868 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Thu, 12 Oct 2017 16:12:47 +0800 Subject: [PATCH 01/15] ar71xx: update kernel from 4.4 to 4.9.54 --- target/linux/ar71xx/Makefile | 2 +- .../ar71xx/base-files/etc/board.d/02_network | 3 +- target/linux/ar71xx/config-4.4 | 2 +- target/linux/ar71xx/config-4.9 | 485 ++++++++++ .../arch/mips/ath79/mach-archer-c25-v1.c | 2 +- .../arch/mips/ath79/mach-archer-c59-v1.c | 2 +- .../files/arch/mips/ath79/mach-archer-c7.c | 2 +- .../ar71xx/files/arch/mips/ath79/mach-c60.c | 56 ++ .../files/arch/mips/ath79/mach-ew-dorin.c | 16 +- .../files/arch/mips/ath79/mach-mynet-n750.c | 2 +- .../files/arch/mips/ath79/mach-rb2011.c | 60 +- .../ar71xx/files/arch/mips/ath79/mach-rb91x.c | 2 +- .../ar71xx/files/arch/mips/ath79/mach-rb922.c | 58 ++ .../ar71xx/files/arch/mips/ath79/mach-rb95x.c | 56 ++ .../ar71xx/files/arch/mips/ath79/mach-rbspi.c | 2 +- .../files/arch/mips/ath79/mach-rbsxtlite.c | 58 ++ .../files/arch/mips/ath79/mach-tl-wdr4300.c | 2 +- .../arch/mips/ath79/mach-tl-wr1043nd-v4.c | 2 +- .../files/arch/mips/ath79/mach-tl-wr942n-v1.c | 2 +- .../files/drivers/gpio/gpio-nxp-74hc153.c | 4 + .../ar71xx/files/drivers/leds/leds-nu801.c | 8 +- .../ar71xx/files/drivers/mtd/cybertan_part.c | 5 + .../files/drivers/mtd/nand/ar934x_nfc.c | 99 +- .../files/drivers/mtd/nand/rb4xx_nand.c | 56 ++ .../files/drivers/mtd/nand/rb750_nand.c | 56 ++ .../files/drivers/mtd/nand/rb91x_nand.c | 56 ++ .../ar71xx/files/drivers/mtd/tplinkpart.c | 13 + .../ar71xx/files/drivers/net/dsa/mv88e6063.c | 104 +- .../net/ethernet/atheros/ag71xx/ag71xx_main.c | 6 +- .../net/ethernet/atheros/ag71xx/ag71xx_mdio.c | 4 + .../net/ethernet/atheros/ag71xx/ag71xx_phy.c | 28 +- .../ar71xx/files/drivers/spi/spi-rb4xx-cpld.c | 5 + target/linux/ar71xx/generic/config-default | 1 - target/linux/ar71xx/image/generic.mk | 20 + target/linux/ar71xx/image/legacy-devices.mk | 18 - target/linux/ar71xx/image/legacy.mk | 5 - target/linux/ar71xx/image/tp-link.mk | 3 +- target/linux/ar71xx/mikrotik/config-default | 3 +- target/linux/ar71xx/nand/config-default | 3 +- .../902-at803x-add-reset-gpio-pdata.patch | 4 +- ...usb-chipidea-AR933x-platform-support.patch | 57 +- .../ar71xx/patches-4.9/001-spi-cs-gpio.patch | 20 + .../002-add_back_gpio_function_select.patch | 92 ++ .../004-register_gpio_driver_earlier.patch | 15 + ...Avoid-using-unitialized-reg-variable.patch | 42 + ...egister-address-in-ath79_ddr_wb_flus.patch | 23 + ...pport-multiple-internal-chip-select-.patch | 70 ++ ...e-gpio_set_value_cansleep-for-GPIO-c.patch | 19 + ...ix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch | 29 + ...h79-do-AR724x-PCIe-root-complex-init.patch | 113 +++ ...200-MIPS-ath79-fix-ar933x-wmac-reset.patch | 30 + .../201-ar913x_wmac_external_reset.patch | 31 + .../202-MIPS-ath79-ar934x-wmac-revision.patch | 11 + .../203-MIPS-ath79-fix-restart.patch | 20 + .../220-add_cpu_feature_overrides.patch | 28 + ...0-MIPS-add-MIPS_MACHINE_NONAME-macro.patch | 21 + .../310-lib-add-rle-decompression.patch | 124 +++ .../401-mtd-physmap-add-lock-unlock.patch | 94 ++ .../402-mtd-SST39VF6401B-support.patch | 29 + ...mtd_fix_cfi_cmdset_0002_status_check.patch | 69 ++ .../404-mtd-cybertan-trx-parser.patch | 25 + .../405-mtd-tp-link-partition-parser.patch | 25 + ...o-pass-probe-types-via-platform-data.patch | 34 + .../408-mtd-redboot_partition_scan.patch | 44 + .../409-mtd-rb4xx_nand_driver.patch | 21 + .../410-mtd-rb750-nand-driver.patch | 21 + ...mtd-cfi_cmdset_0002-force-word-write.patch | 61 ++ .../413-mtd-ar934x-nand-driver.patch | 25 + .../414-mtd-rb91x-nand-driver.patch | 23 + .../420-net-ar71xx_mac_driver.patch | 28 + .../423-dsa-add-88e6063-driver.patch | 24 + .../430-drivers-link-spi-before-mtd.patch | 12 + .../432-spi-rb4xx-spi-driver.patch | 25 + .../433-spi-rb4xx-cpld-driver.patch | 26 + .../patches-4.9/435-spi-vsc7385_driver.patch | 24 + .../440-leds-wndr3700-usb-led-driver.patch | 26 + .../441-leds-rb750-led-driver.patch | 23 + ...50-gpio-nxp-74hc153-gpio-chip-driver.patch | 25 + ...x164-improve-platform-device-support.patch | 117 +++ .../452-gpio-add-gpio-latch-driver.patch | 22 + .../461-spi-ath79-add-fast-flash-read.patch | 54 ++ ...ath79-swizzle-pci-address-for-ar71xx.patch | 111 +++ ...490-usb-ehci-add-quirks-for-qca-socs.patch | 103 ++ .../patches-4.9/500-MIPS-fw-myloader.patch | 22 + ...-mac-argument-to-ath79_register_wmac.patch | 70 ++ ...IPS-ath79-add-ath79_device_reset_get.patch | 42 + ...ath79-add-ath79_gpio_function_select.patch | 39 + ...6-MIPS-ath79-prom-parse-redboot-args.patch | 42 + ...MIPS-ath79-prom-add-myloader-support.patch | 55 ++ ...S-ath79-prom-image-command-line-hack.patch | 73 ++ ...PS-ath79-process-board-kernel-option.patch | 11 + ...S-ath79-init-gpio-pin-of-wmac-device.patch | 14 + .../520-MIPS-ath79-enable-UART-function.patch | 18 + ...S-ath79-enable-UART-for-early_serial.patch | 61 ++ ...dd-ath79_wmac_register_simple-helper.patch | 21 + .../523-MIPS-ath79-OTP-support.patch | 192 ++++ ...add-ath79_wmac_disable_25ghz-helpers.patch | 31 + ...525-MIPS-ath79-enable-qca-usb-quirks.patch | 101 ++ ...MIPS-ath79-add-more-register-defines.patch | 455 +++++++++ .../602-MIPS-ath79-add-openwrt-stuff.patch | 49 + .../603-MIPS-ath79-ap121-fixes.patch | 149 +++ .../605-MIPS-ath79-db120-fixes.patch | 204 ++++ .../606-MIPS-ath79-pb44-fixes.patch | 146 +++ .../607-MIPS-ath79-ubnt-xm-fixes.patch | 14 + ...8-MIPS-ath79-ubnt-xm-add-more-boards.patch | 20 + .../609-MIPS-ath79-ap136-fixes.patch | 300 ++++++ .../611-MIPS-ath79-wdt-timeout.patch | 25 + .../612-MIPS-ath79-set-buffalo-txgain.patch | 24 + ...ath79_wmac_setup_ext_lna_gpio-helper.patch | 76 ++ ...PS-ath79-add-support-for-QCA953x-SoC.patch | 705 ++++++++++++++ ...PS-ath79-add-support-for-QCA956x-SoC.patch | 717 ++++++++++++++ ...ore-register-defines-for-QCA956x-SoC.patch | 38 + ...0-MIPS-ath79-fix-chained-irq-disable.patch | 106 +++ ...1-MIPS-ath79-wmac-enable-set-led-pin.patch | 24 + ...MIPS-ath79-gpio-enable-set-direction.patch | 32 + ...40-MIPS-ath79-add-QCA955x-wmac-reset.patch | 82 ++ .../700-MIPS-ath79-add-openwrt-Kconfig.patch | 11 + ...MIPS-ath79-add-routerboard-detection.patch | 30 + ...d-gpio-func-register-for-QCA955x-SoC.patch | 38 + ...0-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch | 44 + .../818-MIPS-ath79-add-nu801-led-driver.patch | 26 + ...-MIPS-ath79-add_gpio_function2_setup.patch | 67 ++ .../900-mdio_bitbang_ignore_ta_value.patch | 32 + ...-prevent-rescheduling-during-command.patch | 61 ++ .../902-at803x-add-reset-gpio-pdata.patch | 68 ++ .../910-unaligned_access_hacks.patch | 888 ++++++++++++++++++ ...usb-chipidea-AR933x-platform-support.patch | 123 +++ .../patches-4.9/930-chipidea-pullup.patch | 72 ++ 128 files changed, 8420 insertions(+), 149 deletions(-) create mode 100644 target/linux/ar71xx/config-4.9 create mode 100644 target/linux/ar71xx/patches-4.9/001-spi-cs-gpio.patch create mode 100644 target/linux/ar71xx/patches-4.9/002-add_back_gpio_function_select.patch create mode 100644 target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch create mode 100644 target/linux/ar71xx/patches-4.9/100-MIPS-ath79-Avoid-using-unitialized-reg-variable.patch create mode 100644 target/linux/ar71xx/patches-4.9/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch create mode 100644 target/linux/ar71xx/patches-4.9/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch create mode 100644 target/linux/ar71xx/patches-4.9/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch create mode 100644 target/linux/ar71xx/patches-4.9/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch create mode 100644 target/linux/ar71xx/patches-4.9/106-02-MIPS-ath79-do-AR724x-PCIe-root-complex-init.patch create mode 100644 target/linux/ar71xx/patches-4.9/200-MIPS-ath79-fix-ar933x-wmac-reset.patch create mode 100644 target/linux/ar71xx/patches-4.9/201-ar913x_wmac_external_reset.patch create mode 100644 target/linux/ar71xx/patches-4.9/202-MIPS-ath79-ar934x-wmac-revision.patch create mode 100644 target/linux/ar71xx/patches-4.9/203-MIPS-ath79-fix-restart.patch create mode 100644 target/linux/ar71xx/patches-4.9/220-add_cpu_feature_overrides.patch create mode 100644 target/linux/ar71xx/patches-4.9/300-MIPS-add-MIPS_MACHINE_NONAME-macro.patch create mode 100644 target/linux/ar71xx/patches-4.9/310-lib-add-rle-decompression.patch create mode 100644 target/linux/ar71xx/patches-4.9/401-mtd-physmap-add-lock-unlock.patch create mode 100644 target/linux/ar71xx/patches-4.9/402-mtd-SST39VF6401B-support.patch create mode 100644 target/linux/ar71xx/patches-4.9/403-mtd_fix_cfi_cmdset_0002_status_check.patch create mode 100644 target/linux/ar71xx/patches-4.9/404-mtd-cybertan-trx-parser.patch create mode 100644 target/linux/ar71xx/patches-4.9/405-mtd-tp-link-partition-parser.patch create mode 100644 target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch create mode 100644 target/linux/ar71xx/patches-4.9/408-mtd-redboot_partition_scan.patch create mode 100644 target/linux/ar71xx/patches-4.9/409-mtd-rb4xx_nand_driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/410-mtd-rb750-nand-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/411-mtd-cfi_cmdset_0002-force-word-write.patch create mode 100644 target/linux/ar71xx/patches-4.9/413-mtd-ar934x-nand-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/414-mtd-rb91x-nand-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/420-net-ar71xx_mac_driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/423-dsa-add-88e6063-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/430-drivers-link-spi-before-mtd.patch create mode 100644 target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/440-leds-wndr3700-usb-led-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/441-leds-rb750-led-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/450-gpio-nxp-74hc153-gpio-chip-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/451-gpio-74x164-improve-platform-device-support.patch create mode 100644 target/linux/ar71xx/patches-4.9/452-gpio-add-gpio-latch-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/461-spi-ath79-add-fast-flash-read.patch create mode 100644 target/linux/ar71xx/patches-4.9/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch create mode 100644 target/linux/ar71xx/patches-4.9/490-usb-ehci-add-quirks-for-qca-socs.patch create mode 100644 target/linux/ar71xx/patches-4.9/500-MIPS-fw-myloader.patch create mode 100644 target/linux/ar71xx/patches-4.9/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch create mode 100644 target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch create mode 100644 target/linux/ar71xx/patches-4.9/505-MIPS-ath79-add-ath79_gpio_function_select.patch create mode 100644 target/linux/ar71xx/patches-4.9/506-MIPS-ath79-prom-parse-redboot-args.patch create mode 100644 target/linux/ar71xx/patches-4.9/507-MIPS-ath79-prom-add-myloader-support.patch create mode 100644 target/linux/ar71xx/patches-4.9/508-MIPS-ath79-prom-image-command-line-hack.patch create mode 100644 target/linux/ar71xx/patches-4.9/509-MIPS-ath79-process-board-kernel-option.patch create mode 100644 target/linux/ar71xx/patches-4.9/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch create mode 100644 target/linux/ar71xx/patches-4.9/520-MIPS-ath79-enable-UART-function.patch create mode 100644 target/linux/ar71xx/patches-4.9/521-MIPS-ath79-enable-UART-for-early_serial.patch create mode 100644 target/linux/ar71xx/patches-4.9/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch create mode 100644 target/linux/ar71xx/patches-4.9/523-MIPS-ath79-OTP-support.patch create mode 100644 target/linux/ar71xx/patches-4.9/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch create mode 100644 target/linux/ar71xx/patches-4.9/525-MIPS-ath79-enable-qca-usb-quirks.patch create mode 100644 target/linux/ar71xx/patches-4.9/601-MIPS-ath79-add-more-register-defines.patch create mode 100644 target/linux/ar71xx/patches-4.9/602-MIPS-ath79-add-openwrt-stuff.patch create mode 100644 target/linux/ar71xx/patches-4.9/603-MIPS-ath79-ap121-fixes.patch create mode 100644 target/linux/ar71xx/patches-4.9/605-MIPS-ath79-db120-fixes.patch create mode 100644 target/linux/ar71xx/patches-4.9/606-MIPS-ath79-pb44-fixes.patch create mode 100644 target/linux/ar71xx/patches-4.9/607-MIPS-ath79-ubnt-xm-fixes.patch create mode 100644 target/linux/ar71xx/patches-4.9/608-MIPS-ath79-ubnt-xm-add-more-boards.patch create mode 100644 target/linux/ar71xx/patches-4.9/609-MIPS-ath79-ap136-fixes.patch create mode 100644 target/linux/ar71xx/patches-4.9/611-MIPS-ath79-wdt-timeout.patch create mode 100644 target/linux/ar71xx/patches-4.9/612-MIPS-ath79-set-buffalo-txgain.patch create mode 100644 target/linux/ar71xx/patches-4.9/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch create mode 100644 target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch create mode 100644 target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch create mode 100644 target/linux/ar71xx/patches-4.9/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch create mode 100644 target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch create mode 100644 target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch create mode 100644 target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch create mode 100644 target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch create mode 100644 target/linux/ar71xx/patches-4.9/700-MIPS-ath79-add-openwrt-Kconfig.patch create mode 100644 target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch create mode 100644 target/linux/ar71xx/patches-4.9/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch create mode 100644 target/linux/ar71xx/patches-4.9/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch create mode 100644 target/linux/ar71xx/patches-4.9/818-MIPS-ath79-add-nu801-led-driver.patch create mode 100644 target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch create mode 100644 target/linux/ar71xx/patches-4.9/900-mdio_bitbang_ignore_ta_value.patch create mode 100644 target/linux/ar71xx/patches-4.9/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch create mode 100644 target/linux/ar71xx/patches-4.9/902-at803x-add-reset-gpio-pdata.patch create mode 100644 target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch create mode 100644 target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch create mode 100644 target/linux/ar71xx/patches-4.9/930-chipidea-pullup.patch diff --git a/target/linux/ar71xx/Makefile b/target/linux/ar71xx/Makefile index 3f5bc6724..6d5b4c52b 100644 --- a/target/linux/ar71xx/Makefile +++ b/target/linux/ar71xx/Makefile @@ -13,7 +13,7 @@ FEATURES:=usbgadget CPU_TYPE:=24kc SUBTARGETS:=generic nand mikrotik -KERNEL_PATCHVER:=4.4 +KERNEL_PATCHVER:=4.9 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ar71xx/base-files/etc/board.d/02_network b/target/linux/ar71xx/base-files/etc/board.d/02_network index 9a9288780..39e819fd3 100755 --- a/target/linux/ar71xx/base-files/etc/board.d/02_network +++ b/target/linux/ar71xx/base-files/etc/board.d/02_network @@ -531,7 +531,8 @@ ar71xx_setup_macs() lan_mac=$(fritz_tffs -n maca -i $(find_mtd_part "tffs (1)")) ;; tl-wr1043nd-v4) - wan_mac=$(mtd_get_mac_binary config 0x1017c) + lan_mac=$(mtd_get_mac_binary product-info 8) + wan_mac=$(macaddr_add "$lan_mac" 1) ;; esr900) wan_mac=$(mtd_get_mac_ascii u-boot-env "wanaddr") diff --git a/target/linux/ar71xx/config-4.4 b/target/linux/ar71xx/config-4.4 index 09097d0b4..0e7756041 100644 --- a/target/linux/ar71xx/config-4.4 +++ b/target/linux/ar71xx/config-4.4 @@ -260,7 +260,7 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_CEVT_R4K=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd" +CONFIG_CMDLINE="rootfstype=squashfs noinitrd" CONFIG_CMDLINE_BOOL=y # CONFIG_CMDLINE_OVERRIDE is not set CONFIG_COMMON_CLK=y diff --git a/target/linux/ar71xx/config-4.9 b/target/linux/ar71xx/config-4.9 new file mode 100644 index 000000000..c5b89088f --- /dev/null +++ b/target/linux/ar71xx/config-4.9 @@ -0,0 +1,485 @@ +CONFIG_AG71XX=y +CONFIG_AG71XX_AR8216_SUPPORT=y +# CONFIG_AG71XX_DEBUG is not set +# CONFIG_AG71XX_DEBUG_FS is not set +CONFIG_AR8216_PHY=y +CONFIG_AR8216_PHY_LEDS=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +# CONFIG_ARCH_HAS_SG_CHAIN is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_AT803X_PHY=y +CONFIG_ATH79=y +CONFIG_ATH79_DEV_AP9X_PCI=y +CONFIG_ATH79_DEV_DSA=y +CONFIG_ATH79_DEV_ETH=y +CONFIG_ATH79_DEV_GPIO_BUTTONS=y +CONFIG_ATH79_DEV_LEDS_GPIO=y +CONFIG_ATH79_DEV_M25P80=y +CONFIG_ATH79_DEV_NFC=y +CONFIG_ATH79_DEV_SPI=y +CONFIG_ATH79_DEV_USB=y +CONFIG_ATH79_DEV_WMAC=y +CONFIG_ATH79_MACH_A60=y +CONFIG_ATH79_MACH_ALFA_AP120C=y +CONFIG_ATH79_MACH_ALFA_AP96=y +CONFIG_ATH79_MACH_ALFA_NX=y +CONFIG_ATH79_MACH_ALL0258N=y +CONFIG_ATH79_MACH_ALL0315N=y +CONFIG_ATH79_MACH_ANTMINER_S1=y +CONFIG_ATH79_MACH_ANTMINER_S3=y +CONFIG_ATH79_MACH_ANTROUTER_R1=y +CONFIG_ATH79_MACH_AP121=y +CONFIG_ATH79_MACH_AP121F=y +CONFIG_ATH79_MACH_AP132=y +CONFIG_ATH79_MACH_AP136=y +CONFIG_ATH79_MACH_AP143=y +CONFIG_ATH79_MACH_AP147=y +CONFIG_ATH79_MACH_AP152=y +CONFIG_ATH79_MACH_AP531B0=y +# CONFIG_ATH79_MACH_AP81 is not set +CONFIG_ATH79_MACH_AP90Q=y +CONFIG_ATH79_MACH_AP96=y +CONFIG_ATH79_MACH_ARCHER_C25_V1=y +CONFIG_ATH79_MACH_ARCHER_C58_V1=y +CONFIG_ATH79_MACH_ARCHER_C59_V1=y +CONFIG_ATH79_MACH_ARCHER_C60_V1=y +CONFIG_ATH79_MACH_ARCHER_C7=y +CONFIG_ATH79_MACH_ARDUINO_YUN=y +CONFIG_ATH79_MACH_AW_NR580=y +CONFIG_ATH79_MACH_BHR_4GRV2=y +CONFIG_ATH79_MACH_BHU_BXU2000N2_A=y +CONFIG_ATH79_MACH_BSB=y +CONFIG_ATH79_MACH_C55=y +# CONFIG_ATH79_MACH_C60 is not set +CONFIG_ATH79_MACH_CAP324=y +CONFIG_ATH79_MACH_CAP4200AG=y +CONFIG_ATH79_MACH_CARAMBOLA2=y +CONFIG_ATH79_MACH_CF_E316N_V2=y +CONFIG_ATH79_MACH_CF_E320N_V2=y +CONFIG_ATH79_MACH_CF_E355AC=y +CONFIG_ATH79_MACH_CF_E380AC_V1=y +CONFIG_ATH79_MACH_CF_E380AC_V2=y +CONFIG_ATH79_MACH_CF_E520N=y +CONFIG_ATH79_MACH_CF_E530N=y +CONFIG_ATH79_MACH_CPE505N=y +CONFIG_ATH79_MACH_CPE510=y +CONFIG_ATH79_MACH_CPE830=y +CONFIG_ATH79_MACH_CPE870=y +CONFIG_ATH79_MACH_CR3000=y +CONFIG_ATH79_MACH_CR5000=y +CONFIG_ATH79_MACH_DAP_2695_A1=y +CONFIG_ATH79_MACH_DB120=y +CONFIG_ATH79_MACH_DGL_5500_A1=y +CONFIG_ATH79_MACH_DHP_1565_A1=y +CONFIG_ATH79_MACH_DIR_505_A1=y +CONFIG_ATH79_MACH_DIR_600_A1=y +CONFIG_ATH79_MACH_DIR_615_C1=y +CONFIG_ATH79_MACH_DIR_615_I1=y +CONFIG_ATH79_MACH_DIR_825_B1=y +CONFIG_ATH79_MACH_DIR_825_C1=y +CONFIG_ATH79_MACH_DIR_869_A1=y +CONFIG_ATH79_MACH_DLAN_HOTSPOT=y +CONFIG_ATH79_MACH_DLAN_PRO_1200_AC=y +CONFIG_ATH79_MACH_DLAN_PRO_500_WP=y +# CONFIG_ATH79_MACH_DOMYWIFI_DW33D is not set +CONFIG_ATH79_MACH_DR344=y +CONFIG_ATH79_MACH_DR531=y +CONFIG_ATH79_MACH_DRAGINO2=y +CONFIG_ATH79_MACH_E2100L=y +CONFIG_ATH79_MACH_EAP120=y +CONFIG_ATH79_MACH_EAP300V2=y +CONFIG_ATH79_MACH_EAP7660D=y +CONFIG_ATH79_MACH_EL_M150=y +CONFIG_ATH79_MACH_EL_MINI=y +CONFIG_ATH79_MACH_ENS202EXT=y +CONFIG_ATH79_MACH_EPG5000=y +CONFIG_ATH79_MACH_ESR1750=y +CONFIG_ATH79_MACH_ESR900=y +CONFIG_ATH79_MACH_EW_DORIN=y +CONFIG_ATH79_MACH_F9K1115V2=y +CONFIG_ATH79_MACH_FRITZ300E=y +CONFIG_ATH79_MACH_GL_AR150=y +CONFIG_ATH79_MACH_GL_AR300=y +CONFIG_ATH79_MACH_GL_AR300M=y +CONFIG_ATH79_MACH_GL_DOMINO=y +CONFIG_ATH79_MACH_GL_INET=y +CONFIG_ATH79_MACH_GL_MIFI=y +CONFIG_ATH79_MACH_GL_USB150=y +CONFIG_ATH79_MACH_GS_MINIBOX_V1=y +CONFIG_ATH79_MACH_GS_OOLITE=y +# CONFIG_ATH79_MACH_HIVEAP_121 is not set +CONFIG_ATH79_MACH_HIWIFI_HC6361=y +CONFIG_ATH79_MACH_HORNET_UB=y +CONFIG_ATH79_MACH_JA76PF=y +CONFIG_ATH79_MACH_JWAP003=y +CONFIG_ATH79_MACH_JWAP230=y +CONFIG_ATH79_MACH_LIMA=y +CONFIG_ATH79_MACH_MC_MAC1200R=y +CONFIG_ATH79_MACH_MR12=y +CONFIG_ATH79_MACH_MR16=y +CONFIG_ATH79_MACH_MR1750=y +# CONFIG_ATH79_MACH_MR18 is not set +CONFIG_ATH79_MACH_MR600=y +CONFIG_ATH79_MACH_MR900=y +CONFIG_ATH79_MACH_MYNET_N600=y +CONFIG_ATH79_MACH_MYNET_N750=y +CONFIG_ATH79_MACH_MYNET_REXT=y +CONFIG_ATH79_MACH_MZK_W04NU=y +CONFIG_ATH79_MACH_MZK_W300NH=y +CONFIG_ATH79_MACH_NBG460N=y +CONFIG_ATH79_MACH_NBG6716=y +CONFIG_ATH79_MACH_OM2P=y +CONFIG_ATH79_MACH_OM5P=y +CONFIG_ATH79_MACH_OM5P_AC=y +CONFIG_ATH79_MACH_OM5P_ACv2=y +CONFIG_ATH79_MACH_OMY_G1=y +CONFIG_ATH79_MACH_OMY_X1=y +CONFIG_ATH79_MACH_ONION_OMEGA=y +CONFIG_ATH79_MACH_PB42=y +CONFIG_ATH79_MACH_PB44=y +CONFIG_ATH79_MACH_PQI_AIR_PEN=y +CONFIG_ATH79_MACH_QIHOO_C301=y +CONFIG_ATH79_MACH_R602N=y +# CONFIG_ATH79_MACH_R6100 is not set +# CONFIG_ATH79_MACH_RAMBUTAN is not set +# CONFIG_ATH79_MACH_RB2011 is not set +# CONFIG_ATH79_MACH_RB4XX is not set +# CONFIG_ATH79_MACH_RB750 is not set +# CONFIG_ATH79_MACH_RB91X is not set +# CONFIG_ATH79_MACH_RB922 is not set +# CONFIG_ATH79_MACH_RB95X is not set +# CONFIG_ATH79_MACH_RBSPI is not set +# CONFIG_ATH79_MACH_RBSXTLITE is not set +CONFIG_ATH79_MACH_RE450=y +CONFIG_ATH79_MACH_RW2458N=y +CONFIG_ATH79_MACH_SC1750=y +CONFIG_ATH79_MACH_SC300M=y +CONFIG_ATH79_MACH_SC450=y +CONFIG_ATH79_MACH_SMART_300=y +CONFIG_ATH79_MACH_SOM9331=y +CONFIG_ATH79_MACH_SR3200=y +CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE=y +CONFIG_ATH79_MACH_TEW_632BRP=y +CONFIG_ATH79_MACH_TEW_673GRU=y +CONFIG_ATH79_MACH_TEW_712BR=y +CONFIG_ATH79_MACH_TEW_732BR=y +CONFIG_ATH79_MACH_TEW_823DRU=y +CONFIG_ATH79_MACH_TL_MR11U=y +CONFIG_ATH79_MACH_TL_MR13U=y +CONFIG_ATH79_MACH_TL_MR3020=y +CONFIG_ATH79_MACH_TL_MR3X20=y +CONFIG_ATH79_MACH_TL_MR6400=y +CONFIG_ATH79_MACH_TL_WA701ND_V2=y +CONFIG_ATH79_MACH_TL_WA7210N_V2=y +CONFIG_ATH79_MACH_TL_WA801ND_V3=y +CONFIG_ATH79_MACH_TL_WA830RE_V2=y +CONFIG_ATH79_MACH_TL_WA850RE_V2=y +CONFIG_ATH79_MACH_TL_WA855RE_V1=y +CONFIG_ATH79_MACH_TL_WA901ND=y +CONFIG_ATH79_MACH_TL_WA901ND_V2=y +CONFIG_ATH79_MACH_TL_WA901ND_V4=y +CONFIG_ATH79_MACH_TL_WAX50RE=y +CONFIG_ATH79_MACH_TL_WDR3320_V2=y +CONFIG_ATH79_MACH_TL_WDR3500=y +CONFIG_ATH79_MACH_TL_WDR4300=y +CONFIG_ATH79_MACH_TL_WDR6500_V2=y +CONFIG_ATH79_MACH_TL_WPA8630=y +CONFIG_ATH79_MACH_TL_WR1041N_V2=y +CONFIG_ATH79_MACH_TL_WR1043ND=y +CONFIG_ATH79_MACH_TL_WR1043ND_V2=y +CONFIG_ATH79_MACH_TL_WR1043ND_V4=y +CONFIG_ATH79_MACH_TL_WR2543N=y +CONFIG_ATH79_MACH_TL_WR703N=y +CONFIG_ATH79_MACH_TL_WR720N_V3=y +CONFIG_ATH79_MACH_TL_WR741ND=y +CONFIG_ATH79_MACH_TL_WR741ND_V4=y +CONFIG_ATH79_MACH_TL_WR802N_V1=y +CONFIG_ATH79_MACH_TL_WR802N_V2=y +CONFIG_ATH79_MACH_TL_WR810N=y +CONFIG_ATH79_MACH_TL_WR840N_V2=y +CONFIG_ATH79_MACH_TL_WR841N_V1=y +CONFIG_ATH79_MACH_TL_WR841N_V8=y +CONFIG_ATH79_MACH_TL_WR841N_V9=y +CONFIG_ATH79_MACH_TL_WR902AC_V1=y +CONFIG_ATH79_MACH_TL_WR940N_V4=y +CONFIG_ATH79_MACH_TL_WR941ND=y +CONFIG_ATH79_MACH_TL_WR941ND_V6=y +CONFIG_ATH79_MACH_TL_WR942N_V1=y +CONFIG_ATH79_MACH_TUBE2H=y +CONFIG_ATH79_MACH_UBNT=y +CONFIG_ATH79_MACH_UBNT_UNIFIAC=y +CONFIG_ATH79_MACH_UBNT_XM=y +CONFIG_ATH79_MACH_WEIO=y +CONFIG_ATH79_MACH_WHR_HP_G300N=y +CONFIG_ATH79_MACH_WLAE_AG300N=y +CONFIG_ATH79_MACH_WLR8100=y +CONFIG_ATH79_MACH_WNDAP360=y +CONFIG_ATH79_MACH_WNDR3700=y +# CONFIG_ATH79_MACH_WNDR4300 is not set +CONFIG_ATH79_MACH_WNR2000=y +CONFIG_ATH79_MACH_WNR2000_V3=y +CONFIG_ATH79_MACH_WNR2000_V4=y +CONFIG_ATH79_MACH_WNR2200=y +CONFIG_ATH79_MACH_WP543=y +CONFIG_ATH79_MACH_WPE72=y +CONFIG_ATH79_MACH_WPJ342=y +CONFIG_ATH79_MACH_WPJ344=y +CONFIG_ATH79_MACH_WPJ531=y +CONFIG_ATH79_MACH_WPJ558=y +CONFIG_ATH79_MACH_WPJ563=y +CONFIG_ATH79_MACH_WRT160NL=y +CONFIG_ATH79_MACH_WRT400N=y +CONFIG_ATH79_MACH_WRTNODE2Q=y +CONFIG_ATH79_MACH_WZR_450HP2=y +CONFIG_ATH79_MACH_WZR_HP_AG300H=y +CONFIG_ATH79_MACH_WZR_HP_G300NH=y +CONFIG_ATH79_MACH_WZR_HP_G300NH2=y +CONFIG_ATH79_MACH_WZR_HP_G450H=y +CONFIG_ATH79_MACH_XD3200=y +# CONFIG_ATH79_MACH_Z1 is not set +CONFIG_ATH79_MACH_ZBT_WE1526=y +CONFIG_ATH79_MACH_ZCN_1523H=y +CONFIG_ATH79_NVRAM=y +CONFIG_ATH79_PCI_ATH9K_FIXUP=y +# CONFIG_ATH79_ROUTERBOOT is not set +CONFIG_ATH79_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs noinitrd" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_R4K_FPU=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_FIXED_PHY=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_74X164=y +CONFIG_GPIO_ATH79=y +CONFIG_GPIO_GENERIC=y +# CONFIG_GPIO_LATCH is not set +CONFIG_GPIO_NXP_74HC153=y +CONFIG_GPIO_PCF857X=y +CONFIG_GPIO_SYSFS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CBPF_JIT=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DEBUG_STACKOVERFLOW=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_KVM=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HW_HAS_PCI=y +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_GPIO=y +CONFIG_IMAGE_CMDLINE_HACK=y +CONFIG_INITRAMFS_ROOT_GID=0 +CONFIG_INITRAMFS_ROOT_UID=0 +CONFIG_INITRAMFS_SOURCE="../../root" +CONFIG_INTEL_XWAY_PHY=y +CONFIG_IP17XX_PHY=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_WNDR3700_USB is not set +CONFIG_LIBFDT=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BOARDINFO=y +CONFIG_MDIO_GPIO=y +CONFIG_MICREL_PHY=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y +# CONFIG_MIPS_CMDLINE_FROM_DTB is not set +# CONFIG_MIPS_ELF_APPENDED_DTB is not set +# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_MIPS_MACHINE=y +CONFIG_MIPS_NO_APPENDED_DTB=y +# CONFIG_MIPS_RAW_APPENDED_DTB is not set +CONFIG_MIPS_SPRAM=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CYBERTAN_PARTS=y +CONFIG_MTD_M25P80=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +CONFIG_MTD_MYLOADER_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2 +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_EVA_FW=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_LZMA_FW=y +CONFIG_MTD_SPLIT_MINOR_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_SPLIT_WRGG_FW=y +CONFIG_MTD_TPLINK_PARTS=y +CONFIG_MYLOADER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6060=y +CONFIG_NET_DSA_MV88E6063=y +CONFIG_NET_DSA_TAG_TRAILER=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +# CONFIG_NO_IOPORT_MAP is not set +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_PCI=y +CONFIG_PCI_AR724X=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_RATIONAL=y +# CONFIG_RCU_STALL_COMMON is not set +CONFIG_RTL8306_PHY=y +CONFIG_RTL8366RB_PHY=y +CONFIG_RTL8366S_PHY=y +CONFIG_RTL8366_SMI=y +CONFIG_RTL8367_PHY=y +# CONFIG_SCHED_INFO is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SERIAL_8250_FSL is not set +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +CONFIG_SERIAL_AR933X=y +CONFIG_SERIAL_AR933X_CONSOLE=y +CONFIG_SERIAL_AR933X_NR_UARTS=2 +CONFIG_SOC_AR71XX=y +CONFIG_SOC_AR724X=y +CONFIG_SOC_AR913X=y +CONFIG_SOC_AR933X=y +CONFIG_SOC_AR934X=y +CONFIG_SOC_QCA953X=y +CONFIG_SOC_QCA955X=y +CONFIG_SOC_QCA956X=y +CONFIG_SPI=y +CONFIG_SPI_ATH79=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_MASTER=y +# CONFIG_SPI_RB4XX is not set +# CONFIG_SPI_VSC7385 is not set +CONFIG_SRCU=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c index a0f001cb4..9e08c157e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c @@ -74,7 +74,7 @@ static struct spi_gpio_platform_data archer_c25_v1_spi_data = { .num_chipselect = 1, }; -static u8 archer_c25_v1_ssr_initdata[] __initdata = { +static u8 archer_c25_v1_ssr_initdata[] = { BIT(ARCHER_C25_V1_SSR_BIT_7) | BIT(ARCHER_C25_V1_SSR_BIT_6) | BIT(ARCHER_C25_V1_SSR_BIT_5) | diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c index f385d4a5a..da15919a5 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c @@ -180,7 +180,7 @@ static struct spi_gpio_platform_data archer_c59_v1_spi_data = { .num_chipselect = 1, }; -static u8 archer_c59_v1_ssr_initdata[] __initdata = { +static u8 archer_c59_v1_ssr_initdata[] = { BIT(ARCHER_C59_V1_SSR_BIT_7) | BIT(ARCHER_C59_V1_SSR_BIT_6) | BIT(ARCHER_C59_V1_SSR_BIT_5) | diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c index f00998c66..46b49bc9b 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c @@ -141,7 +141,7 @@ static struct gpio_keys_button archer_c7_v2_gpio_keys[] __initdata = { }, }; -static const struct ar8327_led_info archer_c7_leds_ar8327[] __initconst = { +static const struct ar8327_led_info archer_c7_leds_ar8327[] = { AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c index e78e311d2..7b01af515 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c @@ -22,6 +22,7 @@ #include #include #include +#include #include @@ -119,6 +120,7 @@ static struct mdio_board_info c60_mdio0_info[] = { }, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) static struct nand_ecclayout c60_nand_ecclayout = { .eccbytes = 7, .eccpos = { 4, 8, 9, 10, 13, 14, 15 }, @@ -126,13 +128,67 @@ static struct nand_ecclayout c60_nand_ecclayout = { .oobfree = { { 0, 3 }, { 6, 2 }, { 11, 2 }, } }; +#else + +static int c60_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 1: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 2: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int c60_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 2: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops c60_nand_ecclayout_ops = { + .ecc = c60_ooblayout_ecc, + .free = c60_ooblayout_free, +}; +#endif /* < 4.6 */ + static int c60_nand_scan_fixup(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; chip->ecc.size = 512; chip->ecc.strength = 4; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) chip->ecc.layout = &c60_nand_ecclayout; +#else + mtd_set_ooblayout(mtd, &c60_nand_ecclayout_ops); +#endif return 0; } diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c index e686b5fa6..575a976ae 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c @@ -2,7 +2,7 @@ * EW Dorin board support * (based on Atheros Ref. Design AP121) * Copyright (C) 2011-2012 Gabor Juhos - * Copyright (C) 2012-2015 Embedded Wireless GmbH www.80211.de + * Copyright (C) 2012-2017 Embedded Wireless GmbH www.80211.de * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -27,24 +27,12 @@ #define DORIN_CALDATA_OFFSET 0x1000 #define DORIN_WMAC_MAC_OFFSET 0x1002 -#define DORIN_GPIO_LED_21 21 -#define DORIN_GPIO_LED_22 22 -#define DORIN_GPIO_LED_STATUS 23 +#define DORIN_GPIO_LED_STATUS 21 #define DORIN_GPIO_BTN_JUMPSTART 11 #define DORIN_GPIO_BTN_RESET 6 static struct gpio_led dorin_leds_gpio[] __initdata = { - { - .name = "dorin:green:led21", - .gpio = DORIN_GPIO_LED_21, - .active_low = 1, - }, - { - .name = "dorin:green:led22", - .gpio = DORIN_GPIO_LED_22, - .active_low = 1, - }, { .name = "dorin:green:status", .gpio = DORIN_GPIO_LED_STATUS, diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n750.c index 9d69dc53f..0c9b197e8 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n750.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n750.c @@ -98,7 +98,7 @@ static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = { }, }; -static const struct ar8327_led_info mynet_n750_leds_ar8327[] __initconst = { +static const struct ar8327_led_info mynet_n750_leds_ar8327[] = { AR8327_LED_INFO(PHY0_0, HW, "wd:green:lan1"), AR8327_LED_INFO(PHY1_0, HW, "wd:green:lan2"), AR8327_LED_INFO(PHY2_0, HW, "wd:green:lan3"), diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c index 6e498395b..4dc4647cc 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -124,7 +125,7 @@ static struct ar8327_led_cfg rb2011_ar8327_led_cfg = { .open_drain = false, }; -static const struct ar8327_led_info rb2011_ar8327_leds[] __initconst = { +static const struct ar8327_led_info rb2011_ar8327_leds[] = { AR8327_LED_INFO(PHY0_0, HW, "rb:green:eth1"), AR8327_LED_INFO(PHY1_0, HW, "rb:green:eth2"), AR8327_LED_INFO(PHY2_0, HW, "rb:green:eth3"), @@ -188,6 +189,7 @@ static void rb2011_nand_select_chip(int chip_no) ndelay(500); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) static struct nand_ecclayout rb2011_nand_ecclayout = { .eccbytes = 6, .eccpos = { 8, 9, 10, 13, 14, 15 }, @@ -195,16 +197,72 @@ static struct nand_ecclayout rb2011_nand_ecclayout = { .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; +#else + +static int rb2011_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rb2011_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rb2011_nand_ecclayout_ops = { + .ecc = rb2011_ooblayout_ecc, + .free = rb2011_ooblayout_free, +}; +#endif /* < 4.6 */ + static int rb2011_nand_scan_fixup(struct mtd_info *mtd) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) struct nand_chip *chip = mtd->priv; +#endif if (mtd->writesize == 512) { /* * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot * will not be able to find the kernel that we load. */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) chip->ecc.layout = &rb2011_nand_ecclayout; +#else + mtd_set_ooblayout(mtd, &rb2011_nand_ecclayout_ops); +#endif } return 0; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c index ba4da8553..64f927dc6 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c @@ -140,7 +140,7 @@ static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = { .gpio_nle = RB91X_GPIO_NLE, }; -static u8 rb711gr100_ssr_initdata[] __initdata = { +static u8 rb711gr100_ssr_initdata[] = { BIT(RB91X_SSR_BIT_PCIE_POWER) | BIT(RB91X_SSR_BIT_USB_POWER) | BIT(RB91X_SSR_BIT_5) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c index 0c5373c36..577fb0eee 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -132,6 +133,7 @@ static void rb922gs_nand_select_chip(int chip_no) ndelay(500); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) static struct nand_ecclayout rb922gs_nand_ecclayout = { .eccbytes = 6, .eccpos = { 8, 9, 10, 13, 14, 15 }, @@ -139,16 +141,72 @@ static struct nand_ecclayout rb922gs_nand_ecclayout = { .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; +#else + +static int rb922gs_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rb922gs_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rb922gs_nand_ecclayout_ops = { + .ecc = rb922gs_ooblayout_ecc, + .free = rb922gs_ooblayout_free, +}; +#endif /* < 4.6 */ + static int rb922gs_nand_scan_fixup(struct mtd_info *mtd) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) struct nand_chip *chip = mtd->priv; +#endif if (mtd->writesize == 512) { /* * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot * will not be able to find the kernel that we load. */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) chip->ecc.layout = &rb922gs_nand_ecclayout; +#else + mtd_set_ooblayout(mtd, &rb922gs_nand_ecclayout_ops); +#endif } return 0; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c index e940d6cc1..9eaeaa7f9 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -146,6 +147,7 @@ static void rb95x_nand_select_chip(int chip_no) ndelay(500); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) static struct nand_ecclayout rb95x_nand_ecclayout = { .eccbytes = 6, .eccpos = { 8, 9, 10, 13, 14, 15 }, @@ -153,6 +155,56 @@ static struct nand_ecclayout rb95x_nand_ecclayout = { .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; +#else + +static int rb95x_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rb95x_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rb95x_nand_ecclayout_ops = { + .ecc = rb95x_ooblayout_ecc, + .free = rb95x_ooblayout_free, +}; +#endif /* < 4.6 */ + static int rb95x_nand_scan_fixup(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; @@ -162,7 +214,11 @@ static int rb95x_nand_scan_fixup(struct mtd_info *mtd) * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot * will not be able to find the kernel that we load. */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) chip->ecc.layout = &rb95x_nand_ecclayout; +#else + mtd_set_ooblayout(mtd, &rb95x_nand_ecclayout_ops); +#endif } chip->options = NAND_NO_SUBPAGE_WRITE; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c index 9b4c53a57..58e3138b5 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c @@ -267,7 +267,7 @@ static struct gpio_led rb962_leds_gpio[] __initdata = { }, }; -static const struct ar8327_led_info rb962_leds_ar8327[] __initconst = { +static const struct ar8327_led_info rb962_leds_ar8327[] = { AR8327_LED_INFO(PHY0_0, HW, "rb:green:port1"), AR8327_LED_INFO(PHY1_0, HW, "rb:green:port2"), AR8327_LED_INFO(PHY2_0, HW, "rb:green:port3"), diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbsxtlite.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbsxtlite.c index 62063e06a..d2edfc9c7 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbsxtlite.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbsxtlite.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -163,6 +164,7 @@ static void rbsxtlite_nand_select_chip(int chip_no) ndelay(500); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) static struct nand_ecclayout rbsxtlite_nand_ecclayout = { .eccbytes = 6, .eccpos = { 8, 9, 10, 13, 14, 15 }, @@ -170,16 +172,72 @@ static struct nand_ecclayout rbsxtlite_nand_ecclayout = { .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; +#else + +static int rbsxtlite_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rbsxtlite_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rbsxtlite_nand_ecclayout_ops = { + .ecc = rbsxtlite_ooblayout_ecc, + .free = rbsxtlite_ooblayout_free, +}; +#endif /* < 4.6 */ + static int rbsxtlite_nand_scan_fixup(struct mtd_info *mtd) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) struct nand_chip *chip = mtd->priv; +#endif if (mtd->writesize == 512) { /* * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot * will not be able to find the kernel that we load. */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) chip->ecc.layout = &rbsxtlite_nand_ecclayout; +#else + mtd_set_ooblayout(mtd, &rbsxtlite_nand_ecclayout_ops); +#endif } return 0; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c index 3afc71462..cb5dc1dd2 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c @@ -107,7 +107,7 @@ static struct gpio_keys_button wdr4300_gpio_keys[] __initdata = { }, }; -static const struct ar8327_led_info wdr4300_leds_ar8327[] __initconst = { +static const struct ar8327_led_info wdr4300_leds_ar8327[] = { AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v4.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v4.c index cb224f461..b1539c5d7 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v4.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v4.c @@ -57,7 +57,7 @@ #define TL_WR1043_V4_KEYS_POLL_INTERVAL 20 /* msecs */ #define TL_WR1043_V4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043_V4_KEYS_POLL_INTERVAL) -#define TL_WR1043_V4_MAC_LOCATION 0x1ff80174 +#define TL_WR1043_V4_MAC_LOCATION 0x1ff50008 #define TL_WR1043_V4_EEPROM_ADDR 0x1fff0000 #define TL_WR1043_V4_WMAC_CALDATA_OFFSET 0x1000 diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c index 72910400c..76f6a0759 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c @@ -148,7 +148,7 @@ static struct spi_gpio_platform_data tl_wr942n_v1_spi_data = { .num_chipselect = 1, }; -static u8 tl_wr942n_v1_ssr_initdata[] __initdata = { +static u8 tl_wr942n_v1_ssr_initdata[] = { BIT(TL_WR942N_V1_SSR_BIT_7) | BIT(TL_WR942N_V1_SSR_BIT_6) | BIT(TL_WR942N_V1_SSR_BIT_5) | diff --git a/target/linux/ar71xx/files/drivers/gpio/gpio-nxp-74hc153.c b/target/linux/ar71xx/files/drivers/gpio/gpio-nxp-74hc153.c index 8c01efe4a..1355e3ff6 100644 --- a/target/linux/ar71xx/files/drivers/gpio/gpio-nxp-74hc153.c +++ b/target/linux/ar71xx/files/drivers/gpio/gpio-nxp-74hc153.c @@ -168,7 +168,11 @@ static int nxp_74hc153_probe(struct platform_device *pdev) gc->base = pdata->gpio_base; gc->ngpio = NXP_74HC153_NUM_GPIOS; gc->label = dev_name(nxp->parent); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) gc->dev = nxp->parent; +#else + gc->parent = nxp->parent; +#endif gc->owner = THIS_MODULE; err = gpiochip_add(&nxp->gpio_chip); diff --git a/target/linux/ar71xx/files/drivers/leds/leds-nu801.c b/target/linux/ar71xx/files/drivers/leds/leds-nu801.c index f04df61c0..11e892778 100644 --- a/target/linux/ar71xx/files/drivers/leds/leds-nu801.c +++ b/target/linux/ar71xx/files/drivers/leds/leds-nu801.c @@ -98,7 +98,7 @@ static void led_nu801_set(struct led_classdev *led_cdev, } } -static int __init led_nu801_create(struct led_nu801_data *controller, +static int led_nu801_create(struct led_nu801_data *controller, struct device *parent, int index, enum led_brightness brightness, @@ -131,7 +131,7 @@ err: return ret; } -static int __init +static int led_nu801_create_chain(const struct led_nu801_template *template, struct led_nu801_data *controller, struct device *parent) @@ -237,7 +237,7 @@ static void led_nu801_delete_chain(struct led_nu801_data *controller) kfree(led_chain); } -static struct led_nu801_data * __init +static struct led_nu801_data * leds_nu801_create_of(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node, *child; @@ -307,7 +307,7 @@ err: return NULL; } -static int __init led_nu801_probe(struct platform_device *pdev) +static int led_nu801_probe(struct platform_device *pdev) { struct led_nu801_platform_data *pdata = pdev->dev.platform_data; struct led_nu801_data *controllers; diff --git a/target/linux/ar71xx/files/drivers/mtd/cybertan_part.c b/target/linux/ar71xx/files/drivers/mtd/cybertan_part.c index 391411f8d..4d33c19b7 100644 --- a/target/linux/ar71xx/files/drivers/mtd/cybertan_part.c +++ b/target/linux/ar71xx/files/drivers/mtd/cybertan_part.c @@ -28,6 +28,7 @@ #include #include +#include struct cybertan_header { char magic[4]; @@ -82,7 +83,11 @@ struct firmware_header { #define NVRAM_LEN 0x10000 static int cybertan_parse_partitions(struct mtd_info *master, +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) struct mtd_partition **pparts, +#else + const struct mtd_partition **pparts, +#endif struct mtd_part_parser_data *data) { struct firmware_header *header; diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/ar934x_nfc.c b/target/linux/ar71xx/files/drivers/mtd/nand/ar934x_nfc.c index a47fc0468..a135e0f52 100644 --- a/target/linux/ar71xx/files/drivers/mtd/nand/ar934x_nfc.c +++ b/target/linux/ar71xx/files/drivers/mtd/nand/ar934x_nfc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -187,7 +188,9 @@ nfc_debug_data(const char *label, void *data, int len) {} #endif /* AR934X_NFC_DEBUG_DATA */ struct ar934x_nfc { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) struct mtd_info mtd; +#endif struct nand_chip nand_chip; struct device *parent; void __iomem *base; @@ -259,7 +262,22 @@ ar934x_nfc_get_platform_data(struct ar934x_nfc *nfc) static inline struct ar934x_nfc *mtd_to_ar934x_nfc(struct mtd_info *mtd) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) return container_of(mtd, struct ar934x_nfc, mtd); +#else + struct nand_chip *chip = mtd_to_nand(mtd); + + return container_of(chip, struct ar934x_nfc, nand_chip); +#endif +} + +static struct mtd_info *ar934x_nfc_to_mtd(struct ar934x_nfc *nfc) +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + return &nfc->mtd; +#else + return nand_to_mtd(&nfc->nand_chip); +#endif } static inline bool ar934x_nfc_use_irq(struct ar934x_nfc *nfc) @@ -648,7 +666,7 @@ ar934x_nfc_cmdfunc(struct mtd_info *mtd, unsigned int command, int column, int page_addr) { struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - struct nand_chip *nand = mtd->priv; + struct nand_chip *nand = &nfc->nand_chip; nfc->read_id = false; if (command != NAND_CMD_PAGEPROG) @@ -1241,6 +1259,7 @@ ar934x_nfc_init_tail(struct mtd_info *mtd) return err; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) static struct nand_ecclayout ar934x_nfc_oob_64_hwecc = { .eccbytes = 28, .eccpos = { @@ -1261,19 +1280,60 @@ static struct nand_ecclayout ar934x_nfc_oob_64_hwecc = { }, }; +#else + +static int ar934x_nfc_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + if (section) + return -ERANGE; + + oobregion->offset = 20; + oobregion->length = 28; + + return 0; +} + +static int ar934x_nfc_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 4; + oobregion->length = 16; + return 0; + case 1: + oobregion->offset = 48; + oobregion->length = 16; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops ar934x_nfc_ecclayout_ops = { + .ecc = ar934x_nfc_ooblayout_ecc, + .free = ar934x_nfc_ooblayout_free, +}; +#endif /* < 4.6 */ + static int ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc) { struct nand_chip *nand = &nfc->nand_chip; + struct mtd_info *mtd = ar934x_nfc_to_mtd(nfc); u32 ecc_cap; u32 ecc_thres; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0) + struct mtd_oob_region oobregion; +#endif - if (!config_enabled(CONFIG_MTD_NAND_AR934X_HW_ECC)) { + if (!IS_ENABLED(CONFIG_MTD_NAND_AR934X_HW_ECC)) { dev_err(nfc->parent, "hardware ECC support is disabled\n"); return -EINVAL; } - switch (nfc->mtd.writesize) { + switch (mtd->writesize) { case 2048: /* * Writing a subpage separately is not supported, because @@ -1284,17 +1344,25 @@ ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc) nand->ecc.size = 512; nand->ecc.bytes = 7; nand->ecc.strength = 4; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) nand->ecc.layout = &ar934x_nfc_oob_64_hwecc; +#else + mtd_set_ooblayout(mtd, &ar934x_nfc_ecclayout_ops); +#endif break; default: dev_err(nfc->parent, "hardware ECC is not available for %d byte pages\n", - nfc->mtd.writesize); + mtd->writesize); return -EINVAL; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) BUG_ON(!nand->ecc.layout); +#else + BUG_ON(!mtd->ooblayout->ecc); +#endif switch (nand->ecc.strength) { case 4: @@ -1309,12 +1377,17 @@ ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc) } nfc->ecc_thres = ecc_thres; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) nfc->ecc_oob_pos = nand->ecc.layout->eccpos[0]; +#else + mtd->ooblayout->ecc(mtd, 0, &oobregion); + nfc->ecc_oob_pos = oobregion.offset; +#endif nfc->ecc_ctrl_reg = ecc_cap << AR934X_NFC_ECC_CTRL_ECC_CAP_S; nfc->ecc_ctrl_reg |= ecc_thres << AR934X_NFC_ECC_CTRL_ERR_THRES_S; - nfc->ecc_offset_reg = nfc->mtd.writesize + nfc->ecc_oob_pos; + nfc->ecc_offset_reg = mtd->writesize + nfc->ecc_oob_pos; nand->ecc.mode = NAND_ECC_HW; nand->ecc.read_page = ar934x_nfc_read_page; @@ -1382,9 +1455,11 @@ ar934x_nfc_probe(struct platform_device *pdev) nfc->swap_dma = pdata->swap_dma; nand = &nfc->nand_chip; - mtd = &nfc->mtd; + mtd = ar934x_nfc_to_mtd(nfc); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) mtd->priv = nand; +#endif mtd->owner = THIS_MODULE; if (pdata->name) mtd->name = pdata->name; @@ -1429,10 +1504,18 @@ ar934x_nfc_probe(struct platform_device *pdev) switch (pdata->ecc_mode) { case AR934X_NFC_ECC_SOFT: nand->ecc.mode = NAND_ECC_SOFT; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0) + nand->ecc.algo = NAND_ECC_HAMMING; +#endif break; case AR934X_NFC_ECC_SOFT_BCH: +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) nand->ecc.mode = NAND_ECC_SOFT_BCH; +#else + nand->ecc.mode = NAND_ECC_SOFT; + nand->ecc.algo = NAND_ECC_BCH; +#endif break; case AR934X_NFC_ECC_HW: @@ -1474,10 +1557,12 @@ static int ar934x_nfc_remove(struct platform_device *pdev) { struct ar934x_nfc *nfc; + struct mtd_info *mtd; nfc = platform_get_drvdata(pdev); if (nfc) { - nand_release(&nfc->mtd); + mtd = ar934x_nfc_to_mtd(nfc); + nand_release(mtd); ar934x_nfc_free_buf(nfc); free_irq(nfc->irq, nfc); } diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/rb4xx_nand.c b/target/linux/ar71xx/files/drivers/mtd/nand/rb4xx_nand.c index 96ec5dd1e..b397575f7 100644 --- a/target/linux/ar71xx/files/drivers/mtd/nand/rb4xx_nand.c +++ b/target/linux/ar71xx/files/drivers/mtd/nand/rb4xx_nand.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -41,6 +42,7 @@ struct rb4xx_nand_info { struct mtd_info mtd; }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) /* * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader * will not be able to find the kernel that we load. @@ -52,6 +54,56 @@ static struct nand_ecclayout rb4xx_nand_ecclayout = { .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; +#else + +static int rb4xx_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rb4xx_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rb4xx_nand_ecclayout_ops = { + .ecc = rb4xx_ooblayout_ecc, + .free = rb4xx_ooblayout_free, +}; +#endif /* < 4.6 */ + static struct mtd_partition rb4xx_nand_partitions[] = { { .name = "booter", @@ -229,7 +281,11 @@ static int rb4xx_nand_probe(struct platform_device *pdev) } if (info->mtd.writesize == 512) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) info->chip.ecc.layout = &rb4xx_nand_ecclayout; +#else + mtd_set_ooblayout(&info->mtd, &rb4xx_nand_ecclayout_ops); +#endif ret = nand_scan_tail(&info->mtd); if (ret) { diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c b/target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c index 0604c5a23..f8a6722cb 100644 --- a/target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c +++ b/target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -49,6 +50,7 @@ static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) return container_of(mtd, struct rb750_nand_info, mtd); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) /* * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader * will not be able to find the kernel that we load. @@ -60,6 +62,56 @@ static struct nand_ecclayout rb750_nand_ecclayout = { .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; +#else + +static int rb750_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rb750_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rb750_nand_ecclayout_ops = { + .ecc = rb750_ooblayout_ecc, + .free = rb750_ooblayout_free, +}; +#endif /* < 4.6 */ + static struct mtd_partition rb750_nand_partitions[] = { { .name = "booter", @@ -292,7 +344,11 @@ static int rb750_nand_probe(struct platform_device *pdev) } if (info->mtd.writesize == 512) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) info->chip.ecc.layout = &rb750_nand_ecclayout; +#else + mtd_set_ooblayout(&info->mtd, &rb750_nand_ecclayout_ops); +#endif ret = nand_scan_tail(&info->mtd); if (ret) { diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c b/target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c index 1308e18ba..15b1816ae 100644 --- a/target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c +++ b/target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -56,6 +57,7 @@ static inline struct rb91x_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) return container_of(mtd, struct rb91x_nand_info, mtd); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) /* * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader * will not be able to find the kernel that we load. @@ -67,6 +69,56 @@ static struct nand_ecclayout rb91x_nand_ecclayout = { .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; +#else + +static int rb91x_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rb91x_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rb91x_nand_ecclayout_ops = { + .ecc = rb91x_ooblayout_ecc, + .free = rb91x_ooblayout_free, +}; +#endif /* < 4.6 */ + static struct mtd_partition rb91x_nand_partitions[] = { { .name = "booter", @@ -334,7 +386,11 @@ static int rb91x_nand_probe(struct platform_device *pdev) return ret; if (rbni->mtd.writesize == 512) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) rbni->chip.ecc.layout = &rb91x_nand_ecclayout; +#else + mtd_set_ooblayout(&rbni->mtd, &rb91x_nand_ecclayout_ops); +#endif ret = nand_scan_tail(&rbni->mtd); if (ret) diff --git a/target/linux/ar71xx/files/drivers/mtd/tplinkpart.c b/target/linux/ar71xx/files/drivers/mtd/tplinkpart.c index ac1efa1c2..1b94163b8 100644 --- a/target/linux/ar71xx/files/drivers/mtd/tplinkpart.c +++ b/target/linux/ar71xx/files/drivers/mtd/tplinkpart.c @@ -15,6 +15,7 @@ #include #include +#include #define TPLINK_NUM_PARTS 5 #define TPLINK_HEADER_V1 0x01000000 @@ -109,7 +110,11 @@ static int tplink_check_rootfs_magic(struct mtd_info *mtd, size_t offset) } static int tplink_parse_partitions_offset(struct mtd_info *master, +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) struct mtd_partition **pparts, +#else + const struct mtd_partition **pparts, +#endif struct mtd_part_parser_data *data, size_t offset) { @@ -181,7 +186,11 @@ err: } static int tplink_parse_partitions(struct mtd_info *master, +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) struct mtd_partition **pparts, +#else + const struct mtd_partition **pparts, +#endif struct mtd_part_parser_data *data) { return tplink_parse_partitions_offset(master, pparts, data, @@ -189,7 +198,11 @@ static int tplink_parse_partitions(struct mtd_info *master, } static int tplink_parse_64k_partitions(struct mtd_info *master, +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) struct mtd_partition **pparts, +#else + const struct mtd_partition **pparts, +#endif struct mtd_part_parser_data *data) { return tplink_parse_partitions_offset(master, pparts, data, diff --git a/target/linux/ar71xx/files/drivers/net/dsa/mv88e6063.c b/target/linux/ar71xx/files/drivers/net/dsa/mv88e6063.c index b9e9af35b..5b6da713f 100644 --- a/target/linux/ar71xx/files/drivers/net/dsa/mv88e6063.c +++ b/target/linux/ar71xx/files/drivers/net/dsa/mv88e6063.c @@ -17,6 +17,7 @@ #include #include #include +#include #define REG_BASE 0x10 #define REG_PHY(p) (REG_BASE + (p)) @@ -26,11 +27,12 @@ static int reg_read(struct dsa_switch *ds, int addr, int reg) { -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) - return mdiobus_read(ds->master_mii_bus, addr, reg); -#else +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); return mdiobus_read(bus, addr, reg); +#else + struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->dev); + return mdiobus_read(bus, addr, reg); #endif } @@ -47,14 +49,22 @@ static int reg_read(struct dsa_switch *ds, int addr, int reg) static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) { -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) - return mdiobus_write(ds->master_mii_bus, addr, reg, val); -#else +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); return mdiobus_write(bus, addr, reg, val); +#else + struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->dev); + return mdiobus_write(bus, addr, reg, val); #endif } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0) +static enum dsa_tag_protocol mv88e6063_get_tag_protocol(struct dsa_switch *ds) +{ + return DSA_TAG_PROTO_TRAILER; +} +#endif + #define REG_WRITE(addr, reg, val) \ ({ \ int __ret; \ @@ -64,16 +74,20 @@ static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) return __ret; \ }) -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) -static char *mv88e6063_probe(struct mii_bus *bus, int sw_addr) -{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static char *mv88e6063_drv_probe(struct device *host_dev, int sw_addr) #else -static char *mv88e6063_probe(struct device *host_dev, int sw_addr) +static const char *mv88e6063_drv_probe(struct device *dsa_dev, + struct device *host_dev, int sw_addr, + void **_priv) +#endif { struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev); -#endif int ret; + if (!bus) + return NULL; + ret = mdiobus_read(bus, REG_PORT(0), 0x03); if (ret >= 0) { ret &= 0xfff0; @@ -163,7 +177,11 @@ static int mv88e6063_setup_port(struct dsa_switch *ds, int p) REG_WRITE(addr, 0x06, ((p & 0xf) << 12) | (dsa_is_cpu_port(ds, p) ? +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) ds->phys_port_mask : +#else + ds->enabled_port_mask : +#endif (1 << ds->dst->cpu_port))); /* @@ -240,72 +258,32 @@ mv88e6063_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) return reg_write(ds, addr, regnum, val); } -static void mv88e6063_poll_link(struct dsa_switch *ds) -{ - int i; - - for (i = 0; i < DSA_MAX_PORTS; i++) { - struct net_device *dev; - int uninitialized_var(port_status); - int link; - int speed; - int duplex; - int fc; - - dev = ds->ports[i]; - if (dev == NULL) - continue; - - link = 0; - if (dev->flags & IFF_UP) { - port_status = reg_read(ds, REG_PORT(i), 0x00); - if (port_status < 0) - continue; - - link = !!(port_status & 0x1000); - } - - if (!link) { - if (netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link down\n", dev->name); - netif_carrier_off(dev); - } - continue; - } - - speed = (port_status & 0x0100) ? 100 : 10; - duplex = (port_status & 0x0200) ? 1 : 0; - fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0; - - if (!netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " - "flow control %sabled\n", dev->name, - speed, duplex ? "full" : "half", - fc ? "en" : "dis"); - netif_carrier_on(dev); - } - } -} - -static struct dsa_switch_driver mv88e6063_switch_driver = { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,9,0) +static struct dsa_switch_driver mv88e6063_switch_ops = { +#else +static struct dsa_switch_ops mv88e6063_switch_ops = { +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) .tag_protocol = htons(ETH_P_TRAILER), - .probe = mv88e6063_probe, +#else + .get_tag_protocol = mv88e6063_get_tag_protocol, +#endif + .probe = mv88e6063_drv_probe, .setup = mv88e6063_setup, .set_addr = mv88e6063_set_addr, .phy_read = mv88e6063_phy_read, .phy_write = mv88e6063_phy_write, - .poll_link = mv88e6063_poll_link, }; static int __init mv88e6063_init(void) { - register_switch_driver(&mv88e6063_switch_driver); + register_switch_driver(&mv88e6063_switch_ops); return 0; } module_init(mv88e6063_init); static void __exit mv88e6063_cleanup(void) { - unregister_switch_driver(&mv88e6063_switch_driver); + unregister_switch_driver(&mv88e6063_switch_ops); } module_exit(mv88e6063_cleanup); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 566e9513d..ae1bdf606 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -1089,7 +1089,7 @@ next: while ((skb = __skb_dequeue(&queue)) != NULL) { skb->protocol = eth_type_trans(skb, dev); - netif_receive_skb(skb); + napi_gro_receive(&ag->napi, skb); } DBG("%s: rx finish, curr=%u, dirty=%u, done=%d\n", @@ -1141,7 +1141,7 @@ static int ag71xx_poll(struct napi_struct *napi, int limit) DBG("%s: disable polling mode, rx=%d, tx=%d,limit=%d\n", dev->name, rx_done, tx_done, limit); - napi_complete(napi); + napi_complete_done(napi, rx_done); /* enable interrupts */ spin_lock_irqsave(&ag->lock, flags); @@ -1160,7 +1160,7 @@ oom: pr_info("%s: out of memory\n", dev->name); mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); - napi_complete(napi); + napi_complete_done(napi, rx_done); return 0; } diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c index b63a4b7f9..291547656 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c @@ -254,7 +254,11 @@ static int ag71xx_mdio_probe(struct platform_device *pdev) am->mii_bus->read = ag71xx_mdio_read; am->mii_bus->write = ag71xx_mdio_write; am->mii_bus->reset = ag71xx_mdio_reset; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) am->mii_bus->irq = am->mii_irq; +#else + memcpy(am->mii_bus->irq, am->mii_irq, sizeof(am->mii_bus->irq)); +#endif am->mii_bus->priv = am; am->mii_bus->parent = &pdev->dev; snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev)); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c index 9de77e924..12fa2e301 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c @@ -112,6 +112,7 @@ static int ag71xx_phy_connect_multi(struct ag71xx *ag) if (!(pdata->phy_mask & (1 << phy_addr))) continue; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) if (ag->mii_bus->phy_map[phy_addr] == NULL) continue; @@ -122,6 +123,18 @@ static int ag71xx_phy_connect_multi(struct ag71xx *ag) if (phydev == NULL) phydev = ag->mii_bus->phy_map[phy_addr]; +#else + if (ag->mii_bus->mdio_map[phy_addr] == NULL) + continue; + + DBG("%s: PHY found at %s, uid=%08x\n", + dev_name(dev), + dev_name(&ag->mii_bus->mdio_map[phy_addr]->dev), + ag->mii_bus->mdio_map[phy_addr]->phy_id); + + if (phydev == NULL) + phydev = mdiobus_get_phy(ag->mii_bus, phy_addr); +#endif } if (!phydev) { @@ -130,13 +143,21 @@ static int ag71xx_phy_connect_multi(struct ag71xx *ag) return -ENODEV; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) ag->phy_dev = phy_connect(ag->dev, dev_name(&phydev->dev), +#else + ag->phy_dev = phy_connect(ag->dev, phydev_name(phydev), +#endif &ag71xx_phy_link_adjust, pdata->phy_if_mode); if (IS_ERR(ag->phy_dev)) { dev_err(dev, "could not connect to PHY at %s\n", +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) dev_name(&phydev->dev)); +#else + phydev_name(phydev)); +#endif return PTR_ERR(ag->phy_dev); } @@ -149,7 +170,12 @@ static int ag71xx_phy_connect_multi(struct ag71xx *ag) phydev->advertising = phydev->supported; dev_info(dev, "connected to PHY at %s [uid=%08x, driver=%s]\n", - dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) + dev_name(&phydev->dev), +#else + phydev_name(phydev), +#endif + phydev->phy_id, phydev->drv->name); ag->link = 0; ag->speed = 0; diff --git a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c b/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c index 0534c7c37..18af83b67 100644 --- a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c +++ b/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c @@ -21,6 +21,7 @@ #include #include #include +#include #include @@ -246,7 +247,11 @@ static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base) cpld->chip.base = base; cpld->chip.ngpio = CPLD_NUM_GPIOS; cpld->chip.can_sleep = 1; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) cpld->chip.dev = &cpld->spi->dev; +#else + cpld->chip.parent = &cpld->spi->dev; +#endif cpld->chip.owner = THIS_MODULE; err = gpiochip_add(&cpld->chip); diff --git a/target/linux/ar71xx/generic/config-default b/target/linux/ar71xx/generic/config-default index 45169689e..e69de29bb 100644 --- a/target/linux/ar71xx/generic/config-default +++ b/target/linux/ar71xx/generic/config-default @@ -1 +0,0 @@ -CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd" diff --git a/target/linux/ar71xx/image/generic.mk b/target/linux/ar71xx/image/generic.mk index 3352d156a..6f5a7016e 100644 --- a/target/linux/ar71xx/image/generic.mk +++ b/target/linux/ar71xx/image/generic.mk @@ -229,6 +229,26 @@ define Device/dragino2 endef TARGET_DEVICES += dragino2 +define Device/ew-dorin + DEVICE_TITLE := Embedded Wireless Dorin Platform + DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea + BOARDNAME = EW-DORIN + CONSOLE := ttyATH0,115200 + IMAGE_SIZE = 16000k + MTDPARTS = spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro +endef +TARGET_DEVICES += ew-dorin + +define Device/ew-dorin-router + DEVICE_TITLE := Embedded Wireless Dorin Router Platform + DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea + BOARDNAME = EW-DORIN-ROUTER + CONSOLE := ttyATH0,115200 + IMAGE_SIZE = 16000k + MTDPARTS = spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro +endef +TARGET_DEVICES += ew-dorin-router + define Device/weio DEVICE_TITLE := WeIO DEVICE_PACKAGES := kmod-usb-core kmod-usb2 diff --git a/target/linux/ar71xx/image/legacy-devices.mk b/target/linux/ar71xx/image/legacy-devices.mk index 77230249a..e418282dd 100644 --- a/target/linux/ar71xx/image/legacy-devices.mk +++ b/target/linux/ar71xx/image/legacy-devices.mk @@ -132,24 +132,6 @@ define LegacyDevice/DB120 endef LEGACY_DEVICES += DB120 -define LegacyDevice/EWDORINAP - DEVICE_TITLE := Embedded Wireless Dorin Platform (4MB flash) - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-usb-storage -endef -LEGACY_DEVICES += EWDORINAP - -define LegacyDevice/EWDORINRT - DEVICE_TITLE := Embedded Wireless Dorin Router - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-usb-storage -endef -LEGACY_DEVICES += EWDORINRT - -define LegacyDevice/EWDORIN16M - DEVICE_TITLE := Embedded Wireless Dorin Platform (16MB flash) - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-usb-storage -endef -LEGACY_DEVICES += EWDORIN16M - define LegacyDevice/HORNETUBx2 DEVICE_TITLE := ALFA Network Hornet-UB-x2 board (16MB flash, 64MB ram) DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport diff --git a/target/linux/ar71xx/image/legacy.mk b/target/linux/ar71xx/image/legacy.mk index b400e5ddb..701116be4 100644 --- a/target/linux/ar71xx/image/legacy.mk +++ b/target/linux/ar71xx/image/legacy.mk @@ -258,8 +258,6 @@ cameo_ap94_mtdlayout_fat=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,7808k(firmw esr900_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),13248k(rootfs),1024k(manufacture)ro,64k(backup)ro,320k(storage)ro,64k(caldata)ro,14656k@0x40000(firmware) esr1750_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),13248k(rootfs),1024k(manufacture)ro,64k(backup)ro,320k(storage)ro,64k(caldata)ro,14656k@0x40000(firmware) epg5000_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),13248k(rootfs),1024k(manufacture)ro,64k(backup)ro,320k(storage)ro,64k(caldata)ro,14656k@0x40000(firmware) -ew-dorin_mtdlayout_4M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),3712k(firmware),64k(art)ro -ew-dorin_mtdlayout_16M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro f9k1115v2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),14464k(rootfs),1408k(kernel),64k(nvram)ro,64k(envram)ro,64k(art)ro,15872k@0x50000(firmware) dlrtdev_mtdlayout=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,6208k(firmware),64k(caldata)ro,640k(certs),960k(unknown)ro,64k@0x7f0000(caldata_copy) dlrtdev_mtdlayout_fat=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,7168k(firmware),640k(certs),64k(caldata)ro,64k@0x660000(caldata_orig),6208k@0x50000(firmware_orig) @@ -897,9 +895,6 @@ $(eval $(call SingleProfile,AthLzma,64k,AP152_16M,ap152-16M,AP152,ttyS0,115200,$ $(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,ttyS0,115200,$$(bxu2000n2_mtdlayout),RKuImage)) $(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage)) $(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage)) -$(eval $(call SingleProfile,AthLzma,64k,EWDORINAP,ew-dorin,EW-DORIN,ttyATH0,115200,$$(ew-dorin_mtdlayout_4M),KRuImage,65536)) -$(eval $(call SingleProfile,AthLzma,64k,EWDORINRT,ew-dorin-router,EW-DORIN-ROUTER,ttyATH0,115200,$$(ew-dorin_mtdlayout_4M),KRuImage,65536)) -$(eval $(call SingleProfile,AthLzma,64k,EWDORIN16M,ew-dorin-16M,EW-DORIN,ttyATH0,115200,$$(ew-dorin_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,HORNETUBx2,hornet-ub-x2,HORNET-UB,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,TUBE2H16M,tube2h-16M,TUBE2H,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536)) $(eval $(call SingleProfile,AthLzma,64k,WLR8100,wlr8100,WLR8100,ttyS0,115200,$$(wlr8100_mtdlayout),KRuImage)) diff --git a/target/linux/ar71xx/image/tp-link.mk b/target/linux/ar71xx/image/tp-link.mk index 74540b92a..94cb7f373 100644 --- a/target/linux/ar71xx/image/tp-link.mk +++ b/target/linux/ar71xx/image/tp-link.mk @@ -76,7 +76,7 @@ define Device/tplink-8m IMAGE_SIZE := 7936k endef -define Device/tplink-8mlzma +define Device/tplink-4mlzma $(Device/tplink) TPLINK_FLASHLAYOUT := 4Mlzma IMAGE_SIZE := 3904k @@ -486,6 +486,7 @@ endef define Device/tl-wa850re-v1 $(Device/tplink-8mlzma) DEVICE_TITLE := TP-LINK TL-WA850RE v1 + DEVICE_PACKAGES := rssileds BOARDNAME := TL-WA850RE DEVICE_PROFILE := TLWA850 TPLINK_HWID := 0x08500001 diff --git a/target/linux/ar71xx/mikrotik/config-default b/target/linux/ar71xx/mikrotik/config-default index d448560eb..e333166e9 100644 --- a/target/linux/ar71xx/mikrotik/config-default +++ b/target/linux/ar71xx/mikrotik/config-default @@ -212,11 +212,10 @@ CONFIG_ATH79_MACH_RBSXTLITE=y # CONFIG_ATH79_MACH_ZCN_1523H is not set # CONFIG_ATH79_NVRAM is not set CONFIG_ATH79_ROUTERBOOT=y -CONFIG_CMDLINE="rootfstype=squashfs noinitrd" CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_GPIO_LATCH=y -# CONFIG_LANTIQ_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set CONFIG_LEDS_RB750=y CONFIG_LZO_DECOMPRESS=y # CONFIG_MTD_CFI is not set diff --git a/target/linux/ar71xx/nand/config-default b/target/linux/ar71xx/nand/config-default index 2d3b06f69..fc243c500 100644 --- a/target/linux/ar71xx/nand/config-default +++ b/target/linux/ar71xx/nand/config-default @@ -209,12 +209,11 @@ CONFIG_ATH79_MACH_Z1=y # CONFIG_ATH79_MACH_ZBT_WE1526 is not set # CONFIG_ATH79_MACH_ZCN_1523H is not set CONFIG_BCH=y -CONFIG_CMDLINE="rootfstype=squashfs noinitrd" CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y +# CONFIG_INTEL_XWAY_PHY is not set # CONFIG_IP17XX_PHY is not set -# CONFIG_LANTIQ_PHY is not set CONFIG_LEDS_NU801=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y diff --git a/target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch b/target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch index 2244f882e..efc8502bc 100644 --- a/target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch +++ b/target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch @@ -42,7 +42,7 @@ Signed-off-by: Felix Fietkau */ if (phydev->state == PHY_NOLINK) { - if (priv->gpiod_reset && !priv->phy_reset) { -+ if ((priv->gpiod_reset || pdata->has_reset_gpio) && ++ if ((priv->gpiod_reset || (pdata && pdata->has_reset_gpio)) && + !priv->phy_reset) { struct at803x_context context; @@ -52,7 +52,7 @@ Signed-off-by: Felix Fietkau - msleep(1); - gpiod_set_value(priv->gpiod_reset, 0); - msleep(1); -+ if (pdata->has_reset_gpio) { ++ if (pdata && pdata->has_reset_gpio) { + gpio_set_value_cansleep(pdata->reset_gpio, 0); + msleep(1); + gpio_set_value_cansleep(pdata->reset_gpio, 1); diff --git a/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch b/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch index 1a78af077..740ffec4a 100644 --- a/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch +++ b/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch @@ -29,7 +29,7 @@ #include #include -@@ -170,6 +173,51 @@ static void __init ar913x_usb_setup(void +@@ -170,6 +173,67 @@ static void __init ar913x_usb_setup(void &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); } @@ -46,22 +46,29 @@ + iounmap(usb_ctrl_base); +} + -+static void __init ar933x_ci_usb_setup(void) ++static void __init ar9xxx_ci_usb_setup(void) +{ + struct ci_hdrc_platform_data ci_pdata; + enum usb_dr_mode dr_mode; -+ u32 bootstrap; ++ bool host_mode = true; + -+ bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & AR933X_BOOTSTRAP_USB_MODE_HOST) { ++ if (soc_is_ar933x()) ++ host_mode = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) & ++ AR933X_BOOTSTRAP_USB_MODE_HOST; ++ else if (soc_is_ar934x() || soc_is_qca955x()) ++ host_mode = !(ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP) & ++ AR934X_BOOTSTRAP_USB_MODE_DEVICE); ++ ++ if (host_mode) { + dr_mode = USB_DR_MODE_HOST; + } else { + dr_mode = USB_DR_MODE_PERIPHERAL; -+ ar933x_usb_setup_ctrl_config(); ++ if (soc_is_ar933x()) ++ ar933x_usb_setup_ctrl_config(); + } + + memset(&ci_pdata, 0, sizeof(ci_pdata)); -+ ci_pdata.name = "ci_hdrc_ar933x"; ++ ci_pdata.name = "ci_hdrc_ar9xxx"; + ci_pdata.capoffset = DEF_CAPOFFSET; + ci_pdata.dr_mode = dr_mode; + ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP; @@ -76,17 +83,41 @@ + AR933X_EHCI_BASE, AR933X_EHCI_SIZE, + ATH79_CPU_IRQ(3), + &ci_pdata, sizeof(ci_pdata)); ++ ++ if (!host_mode) ++ return; ++ ++ ath79_usb_register("ehci-platform", -1, ++ AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ++ ATH79_CPU_IRQ(3), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ +} + static void __init ar933x_usb_setup(void) { ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); -@@ -185,6 +233,8 @@ static void __init ar933x_usb_setup(void - AR933X_EHCI_BASE, AR933X_EHCI_SIZE, - ATH79_CPU_IRQ(3), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ -+ ar933x_ci_usb_setup(); +@@ -181,10 +245,7 @@ static void __init ar933x_usb_setup(void + ath79_device_reset_clear(AR933X_RESET_USB_PHY); + mdelay(10); + +- ath79_usb_register("ehci-platform", -1, +- AR933X_EHCI_BASE, AR933X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ar9xxx_ci_usb_setup(); } static void enable_tx_tx_idp_violation_fix(unsigned base) +@@ -230,10 +291,7 @@ static void __init ar934x_usb_setup(void + if (ath79_soc_rev >= 3) + ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; + +- ath79_usb_register("ehci-platform", -1, +- AR934X_EHCI_BASE, AR934X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ar9xxx_ci_usb_setup(); + } + + static void __init qca953x_usb_setup(void) diff --git a/target/linux/ar71xx/patches-4.9/001-spi-cs-gpio.patch b/target/linux/ar71xx/patches-4.9/001-spi-cs-gpio.patch new file mode 100644 index 000000000..7a0b669e4 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/001-spi-cs-gpio.patch @@ -0,0 +1,20 @@ +--- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h ++++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h +@@ -14,6 +14,7 @@ + struct ath79_spi_platform_data { + unsigned bus_num; + unsigned num_chipselect; ++ int *cs_gpios; + }; + + #endif /* _ATH79_SPI_PLATFORM_H */ +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -231,6 +231,7 @@ static int ath79_spi_probe(struct platfo + if (pdata) { + master->bus_num = pdata->bus_num; + master->num_chipselect = pdata->num_chipselect; ++ master->cs_gpios = pdata->cs_gpios; + } + + sp->bitbang.master = master; diff --git a/target/linux/ar71xx/patches-4.9/002-add_back_gpio_function_select.patch b/target/linux/ar71xx/patches-4.9/002-add_back_gpio_function_select.patch new file mode 100644 index 000000000..5b26a640e --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/002-add_back_gpio_function_select.patch @@ -0,0 +1,92 @@ +--- /dev/null ++++ b/arch/mips/ath79/gpio.c +@@ -0,0 +1,59 @@ ++/* ++ * Atheros AR71XX/AR724X/AR913X GPIO API support ++ * ++ * Copyright (C) 2010-2011 Jaiganesh Narayanan ++ * Copyright (C) 2008-2011 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include "common.h" ++ ++void __iomem *ath79_gpio_base; ++EXPORT_SYMBOL_GPL(ath79_gpio_base); ++ ++static void __iomem *ath79_gpio_get_function_reg(void) ++{ ++ u32 reg = 0; ++ ++ if (soc_is_ar71xx() || ++ soc_is_ar724x() || ++ soc_is_ar913x() || ++ soc_is_ar933x()) ++ reg = AR71XX_GPIO_REG_FUNC; ++ else if (soc_is_ar934x()) ++ reg = AR934X_GPIO_REG_FUNC; ++ else ++ BUG(); ++ ++ return ath79_gpio_base + reg; ++} ++ ++void ath79_gpio_function_setup(u32 set, u32 clear) ++{ ++ void __iomem *reg = ath79_gpio_get_function_reg(); ++ ++ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); ++ /* flush write */ ++ __raw_readl(reg); ++} ++ ++void ath79_gpio_function_enable(u32 mask) ++{ ++ ath79_gpio_function_setup(mask, 0); ++} ++ ++void ath79_gpio_function_disable(u32 mask) ++{ ++ ath79_gpio_function_setup(0, mask); ++} +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -118,6 +118,7 @@ static inline int soc_is_qca955x(void) + void ath79_ddr_wb_flush(unsigned int reg); + void ath79_ddr_set_pci_windows(void); + ++extern void __iomem *ath79_gpio_base; + extern void __iomem *ath79_pll_base; + extern void __iomem *ath79_reset_base; + +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -156,4 +156,5 @@ void __init ath79_gpio_init(void) + } + + platform_device_register(&ath79_gpio_device); ++ ath79_gpio_base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); + } +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -24,6 +24,9 @@ unsigned long ath79_get_sys_clk_rate(con + + void ath79_ddr_ctrl_init(void); + ++void ath79_gpio_function_enable(u32 mask); ++void ath79_gpio_function_disable(u32 mask); ++void ath79_gpio_function_setup(u32 set, u32 clear); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ diff --git a/target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch b/target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch new file mode 100644 index 000000000..e6e972b7e --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch @@ -0,0 +1,15 @@ +HACK: register the GPIO driver earlier to ensure that gpio_request calls +from mach files succeed. + +--- a/drivers/gpio/gpio-ath79.c ++++ b/drivers/gpio/gpio-ath79.c +@@ -322,4 +322,8 @@ static struct platform_driver ath79_gpio + .remove = ath79_gpio_remove, + }; + +-module_platform_driver(ath79_gpio_driver); ++static int __init ath79_gpio_init(void) ++{ ++ return platform_driver_register(&ath79_gpio_driver); ++} ++postcore_initcall(ath79_gpio_init); diff --git a/target/linux/ar71xx/patches-4.9/100-MIPS-ath79-Avoid-using-unitialized-reg-variable.patch b/target/linux/ar71xx/patches-4.9/100-MIPS-ath79-Avoid-using-unitialized-reg-variable.patch new file mode 100644 index 000000000..8d5b08998 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/100-MIPS-ath79-Avoid-using-unitialized-reg-variable.patch @@ -0,0 +1,42 @@ +From 8b7a76e72fc819753878cd5684e243f33f847c79 Mon Sep 17 00:00:00 2001 +From: Markos Chandras +Date: Wed, 21 Aug 2013 11:47:22 +0100 +Subject: [PATCH] MIPS: ath79: Avoid using unitialized 'reg' variable + +Fixes the following build error: +arch/mips/include/asm/mach-ath79/ath79.h:139:20: error: 'reg' may be used +uninitialized in this function [-Werror=maybe-uninitialized] +arch/mips/ath79/common.c:62:6: note: 'reg' was declared here +In file included from arch/mips/ath79/common.c:20:0: +arch/mips/ath79/common.c: In function 'ath79_device_reset_clear': +arch/mips/include/asm/mach-ath79/ath79.h:139:20: +error: 'reg' may be used uninitialized in this function +[-Werror=maybe-uninitialized] +arch/mips/ath79/common.c:90:6: note: 'reg' was declared here + +Signed-off-by: Markos Chandras +Acked-by: Gabor Juhos +--- + arch/mips/ath79/common.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -106,7 +106,7 @@ void ath79_device_reset_set(u32 mask) + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; + else +- BUG(); ++ panic("Reset register not defined for this SOC"); + + spin_lock_irqsave(&ath79_device_reset_lock, flags); + t = ath79_reset_rr(reg); +@@ -134,7 +134,7 @@ void ath79_device_reset_clear(u32 mask) + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; + else +- BUG(); ++ panic("Reset register not defined for this SOC"); + + spin_lock_irqsave(&ath79_device_reset_lock, flags); + t = ath79_reset_rr(reg); diff --git a/target/linux/ar71xx/patches-4.9/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch b/target/linux/ar71xx/patches-4.9/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch new file mode 100644 index 000000000..64fb545b2 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch @@ -0,0 +1,23 @@ +From: Felix Fietkau +Date: Wed, 18 May 2016 18:03:31 +0200 +Subject: [PATCH] MIPS: ath79: fix register address in ath79_ddr_wb_flush() + +ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets +need to be a multiple of 4. + +Cc: Alban Bedel +Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") +Signed-off-by: Felix Fietkau +--- + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); + + void ath79_ddr_wb_flush(u32 reg) + { +- void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg; ++ void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg * 4; + + /* Flush the DDR write buffer. */ + __raw_writel(0x1, flush_reg); diff --git a/target/linux/ar71xx/patches-4.9/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch b/target/linux/ar71xx/patches-4.9/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch new file mode 100644 index 000000000..3c355cd21 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch @@ -0,0 +1,70 @@ +From: Felix Fietkau +Date: Fri, 9 Dec 2016 20:09:16 +0100 +Subject: [PATCH] spi: spi-ath79: support multiple internal chip select + lines + +Several devices with multiple flash chips use the internal chip select +lines. Don't assume that chip select 1 and above are GPIO lines. + +Signed-off-by: Felix Fietkau +--- + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -78,14 +78,16 @@ static void ath79_spi_chipselect(struct + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } + +- if (spi->chip_select) { ++ if (gpio_is_valid(spi->cs_gpio)) { + /* SPI is normally active-low */ + gpio_set_value(spi->cs_gpio, cs_high); + } else { ++ u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); ++ + if (cs_high) +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; ++ sp->ioc_base |= cs_bit; + else +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; ++ sp->ioc_base &= ~cs_bit; + + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } +@@ -118,11 +120,8 @@ static int ath79_spi_setup_cs(struct spi + struct ath79_spi *sp = ath79_spidev_to_sp(spi); + int status; + +- if (spi->chip_select && !gpio_is_valid(spi->cs_gpio)) +- return -EINVAL; +- + status = 0; +- if (spi->chip_select) { ++ if (gpio_is_valid(spi->cs_gpio)) { + unsigned long flags; + + flags = GPIOF_DIR_OUT; +@@ -134,10 +133,12 @@ static int ath79_spi_setup_cs(struct spi + status = gpio_request_one(spi->cs_gpio, flags, + dev_name(&spi->dev)); + } else { ++ u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); ++ + if (spi->mode & SPI_CS_HIGH) +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; ++ sp->ioc_base &= ~cs_bit; + else +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; ++ sp->ioc_base |= cs_bit; + + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } +@@ -147,7 +148,7 @@ static int ath79_spi_setup_cs(struct spi + + static void ath79_spi_cleanup_cs(struct spi_device *spi) + { +- if (spi->chip_select) { ++ if (gpio_is_valid(spi->cs_gpio)) { + gpio_free(spi->cs_gpio); + } + } diff --git a/target/linux/ar71xx/patches-4.9/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch b/target/linux/ar71xx/patches-4.9/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch new file mode 100644 index 000000000..11b6a8310 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch @@ -0,0 +1,19 @@ +From: Felix Fietkau +Date: Fri, 9 Dec 2016 20:11:35 +0100 +Subject: [PATCH] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip + select + +Signed-off-by: Felix Fietkau +--- + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -80,7 +80,7 @@ static void ath79_spi_chipselect(struct + + if (gpio_is_valid(spi->cs_gpio)) { + /* SPI is normally active-low */ +- gpio_set_value(spi->cs_gpio, cs_high); ++ gpio_set_value_cansleep(spi->cs_gpio, cs_high); + } else { + u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); + diff --git a/target/linux/ar71xx/patches-4.9/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch b/target/linux/ar71xx/patches-4.9/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch new file mode 100644 index 000000000..e785b30ef --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch @@ -0,0 +1,29 @@ +From 0f15814bcdf59f10b708a3fba636acb089e9a4f1 Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Thu, 30 Mar 2017 15:34:39 +0200 +Subject: [PATCH] MIPS: ath79: fix AR724X_PLL_REG_PCIE_CONFIG offset + +According to the QCA u-boot source the "PCIE Phase Lock Loop +Configuration (PCIE_PLL_CONFIG)" register is for all SoCs except the +QCA955X and QCA956X at offset 0x10. + +Since the PCIE PLL config register is only defined for the AR724x fix +only this value. The value is wrong since the day it was added and isn't +yet used by any driver. + +Signed-off-by: Mathias Kresin +--- + arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -167,7 +167,7 @@ + #define AR71XX_AHB_DIV_MASK 0x7 + + #define AR724X_PLL_REG_CPU_CONFIG 0x00 +-#define AR724X_PLL_REG_PCIE_CONFIG 0x18 ++#define AR724X_PLL_REG_PCIE_CONFIG 0x10 + + #define AR724X_PLL_FB_SHIFT 0 + #define AR724X_PLL_FB_MASK 0x3ff diff --git a/target/linux/ar71xx/patches-4.9/106-02-MIPS-ath79-do-AR724x-PCIe-root-complex-init.patch b/target/linux/ar71xx/patches-4.9/106-02-MIPS-ath79-do-AR724x-PCIe-root-complex-init.patch new file mode 100644 index 000000000..3af99bf3b --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/106-02-MIPS-ath79-do-AR724x-PCIe-root-complex-init.patch @@ -0,0 +1,113 @@ +From 460f382c278fe66059a773c41cbcd0db86d53983 Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Thu, 13 Apr 2017 09:47:42 +0200 +Subject: [PATCH] MIPS: pci-ar724x: get PCIe controller out of reset + +The ar724x pci driver expects the PCIe controller to be brought out of +reset by the bootloader. + +At least the AVM Fritz 300E bootloader doesn't take care of releasing +the different PCIe controller related resets which causes an endless +hang as soon as either the PCIE Reset register (0x180f0018) or the PCI +Application Control register (0x180f0000) is read from. + +Do the full "PCIE Root Complex Initialization Sequence" if the PCIe +host controller is still in reset during probing. + +The QCA u-boot sleeps 10ms after the PCIE Application Control bit is +set to ready. It has been shown that 10ms might not be enough time if +PCIe should be used right after setting the bit. During my tests it +took up to 20ms till the link was up. Giving the link up to 100ms +should work for all cases. + +Signed-off-by: Mathias Kresin +--- + arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 ++ + arch/mips/pci/pci-ar724x.c | 42 ++++++++++++++++++++++++++ + 2 files changed, 45 insertions(+) + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -169,6 +169,9 @@ + #define AR724X_PLL_REG_CPU_CONFIG 0x00 + #define AR724X_PLL_REG_PCIE_CONFIG 0x10 + ++#define AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS BIT(16) ++#define AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET BIT(25) ++ + #define AR724X_PLL_FB_SHIFT 0 + #define AR724X_PLL_FB_MASK 0x3ff + #define AR724X_PLL_REF_DIV_SHIFT 10 +--- a/arch/mips/pci/pci-ar724x.c ++++ b/arch/mips/pci/pci-ar724x.c +@@ -12,14 +12,18 @@ + #include + #include + #include ++#include + #include + #include + #include + ++#define AR724X_PCI_REG_APP 0x0 + #define AR724X_PCI_REG_RESET 0x18 + #define AR724X_PCI_REG_INT_STATUS 0x4c + #define AR724X_PCI_REG_INT_MASK 0x50 + ++#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0) ++ + #define AR724X_PCI_RESET_LINK_UP BIT(0) + + #define AR724X_PCI_INT_DEV0 BIT(14) +@@ -325,6 +329,37 @@ static void ar724x_pci_irq_init(struct a + apc); + } + ++static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc) ++{ ++ u32 ppl, app; ++ int wait = 0; ++ ++ /* deassert PCIe host controller and PCIe PHY reset */ ++ ath79_device_reset_clear(AR724X_RESET_PCIE); ++ ath79_device_reset_clear(AR724X_RESET_PCIE_PHY); ++ ++ /* remove the reset of the PCIE PLL */ ++ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); ++ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; ++ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ ++ /* deassert bypass for the PCIE PLL */ ++ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); ++ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; ++ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ ++ /* set PCIE Application Control to ready */ ++ app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); ++ app |= AR724X_PCI_APP_LTSSM_ENABLE; ++ __raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP); ++ ++ /* wait up to 100ms for PHY link up */ ++ do { ++ mdelay(10); ++ wait++; ++ } while (wait < 10 && !ar724x_pci_check_link(apc)); ++} ++ + static int ar724x_pci_probe(struct platform_device *pdev) + { + struct ar724x_pci_controller *apc; +@@ -383,6 +418,13 @@ static int ar724x_pci_probe(struct platf + apc->pci_controller.io_resource = &apc->io_res; + apc->pci_controller.mem_resource = &apc->mem_res; + ++ /* ++ * Do the full PCIE Root Complex Initialization Sequence if the PCIe ++ * host controller is in reset. ++ */ ++ if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE) ++ ar724x_pci_hw_init(apc); ++ + apc->link_up = ar724x_pci_check_link(apc); + if (!apc->link_up) + dev_warn(&pdev->dev, "PCIe link is down\n"); diff --git a/target/linux/ar71xx/patches-4.9/200-MIPS-ath79-fix-ar933x-wmac-reset.patch b/target/linux/ar71xx/patches-4.9/200-MIPS-ath79-fix-ar933x-wmac-reset.patch new file mode 100644 index 000000000..b7ae0ce64 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/200-MIPS-ath79-fix-ar933x-wmac-reset.patch @@ -0,0 +1,30 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -62,10 +62,26 @@ static void __init ar913x_wmac_setup(voi + + static int ar933x_wmac_reset(void) + { ++ int retries = 20; ++ + ath79_device_reset_set(AR933X_RESET_WMAC); + ath79_device_reset_clear(AR933X_RESET_WMAC); + +- return 0; ++ while (1) { ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0) ++ return 0; ++ ++ if (retries-- == 0) ++ break; ++ ++ udelay(10000); ++ } ++ ++ pr_err("ar933x: WMAC reset timed out"); ++ return -ETIMEDOUT; + } + + static int ar933x_r1_get_wmac_revision(void) diff --git a/target/linux/ar71xx/patches-4.9/201-ar913x_wmac_external_reset.patch b/target/linux/ar71xx/patches-4.9/201-ar913x_wmac_external_reset.patch new file mode 100644 index 000000000..9b704a3c4 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/201-ar913x_wmac_external_reset.patch @@ -0,0 +1,31 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -44,7 +44,7 @@ static struct platform_device ath79_wmac + }, + }; + +-static void __init ar913x_wmac_setup(void) ++static int ar913x_wmac_reset(void) + { + /* reset the WMAC */ + ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); +@@ -53,10 +53,19 @@ static void __init ar913x_wmac_setup(voi + ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); + mdelay(10); + ++ return 0; ++} ++ ++static void __init ar913x_wmac_setup(void) ++{ ++ ar913x_wmac_reset(); ++ + ath79_wmac_resources[0].start = AR913X_WMAC_BASE; + ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; + ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); + ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); ++ ++ ath79_wmac_data.external_reset = ar913x_wmac_reset; + } + + diff --git a/target/linux/ar71xx/patches-4.9/202-MIPS-ath79-ar934x-wmac-revision.patch b/target/linux/ar71xx/patches-4.9/202-MIPS-ath79-ar934x-wmac-revision.patch new file mode 100644 index 000000000..0f8016f84 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/202-MIPS-ath79-ar934x-wmac-revision.patch @@ -0,0 +1,11 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -139,6 +139,8 @@ static void ar934x_wmac_setup(void) + ath79_wmac_data.is_clk_25mhz = false; + else + ath79_wmac_data.is_clk_25mhz = true; ++ ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; + } + + static void qca955x_wmac_setup(void) diff --git a/target/linux/ar71xx/patches-4.9/203-MIPS-ath79-fix-restart.patch b/target/linux/ar71xx/patches-4.9/203-MIPS-ath79-fix-restart.patch new file mode 100644 index 000000000..48f4d95e7 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/203-MIPS-ath79-fix-restart.patch @@ -0,0 +1,20 @@ +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -40,6 +40,7 @@ static char ath79_sys_type[ATH79_SYS_TYP + + static void ath79_restart(char *command) + { ++ local_irq_disable(); + ath79_device_reset_set(AR71XX_RESET_FULL_CHIP); + for (;;) + if (cpu_wait) +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -135,6 +135,7 @@ static inline u32 ath79_pll_rr(unsigned + static inline void ath79_reset_wr(unsigned reg, u32 val) + { + __raw_writel(val, ath79_reset_base + reg); ++ (void) __raw_readl(ath79_reset_base + reg); /* flush */ + } + + static inline u32 ath79_reset_rr(unsigned reg) diff --git a/target/linux/ar71xx/patches-4.9/220-add_cpu_feature_overrides.patch b/target/linux/ar71xx/patches-4.9/220-add_cpu_feature_overrides.patch new file mode 100644 index 000000000..d925f9262 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/220-add_cpu_feature_overrides.patch @@ -0,0 +1,28 @@ +--- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h ++++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h +@@ -36,6 +36,7 @@ + #define cpu_has_mdmx 0 + #define cpu_has_mips3d 0 + #define cpu_has_smartmips 0 ++#define cpu_has_rixi 0 + + #define cpu_has_mips32r1 1 + #define cpu_has_mips32r2 1 +@@ -43,6 +44,7 @@ + #define cpu_has_mips64r2 0 + + #define cpu_has_mipsmt 0 ++#define cpu_has_userlocal 0 + + #define cpu_has_64bits 0 + #define cpu_has_64bit_zero_reg 0 +@@ -51,5 +53,9 @@ + + #define cpu_dcache_line_size() 32 + #define cpu_icache_line_size() 32 ++#define cpu_has_vtag_icache 0 ++#define cpu_has_dc_aliases 1 ++#define cpu_has_ic_fills_f_dc 0 ++#define cpu_has_pindexed_dcache 0 + + #endif /* __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H */ diff --git a/target/linux/ar71xx/patches-4.9/300-MIPS-add-MIPS_MACHINE_NONAME-macro.patch b/target/linux/ar71xx/patches-4.9/300-MIPS-add-MIPS_MACHINE_NONAME-macro.patch new file mode 100644 index 000000000..0bc64b7a1 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/300-MIPS-add-MIPS_MACHINE_NONAME-macro.patch @@ -0,0 +1,21 @@ +--- a/arch/mips/include/asm/mips_machine.h ++++ b/arch/mips/include/asm/mips_machine.h +@@ -36,6 +36,18 @@ static struct mips_machine machine_##_ty + .mach_setup = _setup, \ + }; + ++#define MIPS_MACHINE_NONAME(_type, _id, _setup) \ ++static const char machine_id_##_type[] __initconst \ ++ __aligned(1) = _id; \ ++static struct mips_machine machine_##_type \ ++ __used __section(.mips.machines.init) = \ ++{ \ ++ .mach_type = _type, \ ++ .mach_id = machine_id_##_type, \ ++ .mach_name = NULL, \ ++ .mach_setup = _setup, \ ++}; ++ + extern long __mips_machines_start; + extern long __mips_machines_end; + diff --git a/target/linux/ar71xx/patches-4.9/310-lib-add-rle-decompression.patch b/target/linux/ar71xx/patches-4.9/310-lib-add-rle-decompression.patch new file mode 100644 index 000000000..d8480125a --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/310-lib-add-rle-decompression.patch @@ -0,0 +1,124 @@ +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -247,6 +247,9 @@ config LZMA_COMPRESS + config LZMA_DECOMPRESS + tristate + ++config RLE_DECOMPRESS ++ tristate ++ + # + # These all provide a common interface (hence the apparent duplication with + # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) +--- a/lib/Makefile ++++ b/lib/Makefile +@@ -120,6 +120,7 @@ obj-$(CONFIG_XZ_DEC) += xz/ + obj-$(CONFIG_RAID6_PQ) += raid6/ + obj-$(CONFIG_LZMA_COMPRESS) += lzma/ + obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/ ++obj-$(CONFIG_RLE_DECOMPRESS) += rle.o + + lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o + lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o +--- /dev/null ++++ b/include/linux/rle.h +@@ -0,0 +1,18 @@ ++#ifndef _RLE_H_ ++#define _RLE_H_ ++ ++#ifdef CONFIG_RLE_DECOMPRESS ++int rle_decode(const unsigned char *src, size_t srclen, ++ unsigned char *dst, size_t dstlen, ++ size_t *src_done, size_t *dst_done); ++#else ++static inline int ++rle_decode(const unsigned char *src, size_t srclen, ++ unsigned char *dst, size_t dstlen, ++ size_t *src_done, size_t *dst_done) ++{ ++ return -ENOTSUPP; ++} ++#endif /* CONFIG_RLE_DECOMPRESS */ ++ ++#endif /* _RLE_H_ */ +--- /dev/null ++++ b/lib/rle.c +@@ -0,0 +1,78 @@ ++/* ++ * RLE decoding routine ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++int rle_decode(const unsigned char *src, size_t srclen, ++ unsigned char *dst, size_t dstlen, ++ size_t *src_done, size_t *dst_done) ++{ ++ size_t srcpos, dstpos; ++ int ret; ++ ++ srcpos = 0; ++ dstpos = 0; ++ ret = -EINVAL; ++ ++ /* sanity checks */ ++ if (!src || !srclen || !dst || !dstlen) ++ goto out; ++ ++ while (1) { ++ char count; ++ ++ if (srcpos >= srclen) ++ break; ++ ++ count = (char) src[srcpos++]; ++ if (count == 0) { ++ ret = 0; ++ break; ++ } ++ ++ if (count > 0) { ++ unsigned char c; ++ ++ if (srcpos >= srclen) ++ break; ++ ++ c = src[srcpos++]; ++ ++ while (count--) { ++ if (dstpos >= dstlen) ++ break; ++ ++ dst[dstpos++] = c; ++ } ++ } else { ++ count *= -1; ++ ++ while (count--) { ++ if (srcpos >= srclen) ++ break; ++ if (dstpos >= dstlen) ++ break; ++ dst[dstpos++] = src[srcpos++]; ++ } ++ } ++ } ++ ++out: ++ if (src_done) ++ *src_done = srcpos; ++ if (dst_done) ++ *dst_done = dstpos; ++ ++ return ret; ++} ++ ++EXPORT_SYMBOL_GPL(rle_decode); diff --git a/target/linux/ar71xx/patches-4.9/401-mtd-physmap-add-lock-unlock.patch b/target/linux/ar71xx/patches-4.9/401-mtd-physmap-add-lock-unlock.patch new file mode 100644 index 000000000..db7b3ca83 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/401-mtd-physmap-add-lock-unlock.patch @@ -0,0 +1,94 @@ +--- a/drivers/mtd/maps/physmap.c ++++ b/drivers/mtd/maps/physmap.c +@@ -31,6 +31,66 @@ struct physmap_flash_info { + int vpp_refcnt; + }; + ++static struct platform_device *physmap_map2pdev(struct map_info *map) ++{ ++ return (struct platform_device *) map->map_priv_1; ++} ++ ++static void physmap_lock(struct map_info *map) ++{ ++ struct platform_device *pdev; ++ struct physmap_flash_data *physmap_data; ++ ++ pdev = physmap_map2pdev(map); ++ physmap_data = pdev->dev.platform_data; ++ physmap_data->lock(pdev); ++} ++ ++static void physmap_unlock(struct map_info *map) ++{ ++ struct platform_device *pdev; ++ struct physmap_flash_data *physmap_data; ++ ++ pdev = physmap_map2pdev(map); ++ physmap_data = pdev->dev.platform_data; ++ physmap_data->unlock(pdev); ++} ++ ++static map_word physmap_flash_read_lock(struct map_info *map, unsigned long ofs) ++{ ++ map_word ret; ++ ++ physmap_lock(map); ++ ret = inline_map_read(map, ofs); ++ physmap_unlock(map); ++ ++ return ret; ++} ++ ++static void physmap_flash_write_lock(struct map_info *map, map_word d, ++ unsigned long ofs) ++{ ++ physmap_lock(map); ++ inline_map_write(map, d, ofs); ++ physmap_unlock(map); ++} ++ ++static void physmap_flash_copy_from_lock(struct map_info *map, void *to, ++ unsigned long from, ssize_t len) ++{ ++ physmap_lock(map); ++ inline_map_copy_from(map, to, from, len); ++ physmap_unlock(map); ++} ++ ++static void physmap_flash_copy_to_lock(struct map_info *map, unsigned long to, ++ const void *from, ssize_t len) ++{ ++ physmap_lock(map); ++ inline_map_copy_to(map, to, from, len); ++ physmap_unlock(map); ++} ++ + static int physmap_flash_remove(struct platform_device *dev) + { + struct physmap_flash_info *info; +@@ -153,6 +213,13 @@ static int physmap_flash_probe(struct pl + + simple_map_init(&info->map[i]); + ++ if (physmap_data->lock && physmap_data->unlock) { ++ info->map[i].read = physmap_flash_read_lock; ++ info->map[i].write = physmap_flash_write_lock; ++ info->map[i].copy_from = physmap_flash_copy_from_lock; ++ info->map[i].copy_to = physmap_flash_copy_to_lock; ++ } ++ + probe_type = rom_probe_types; + if (physmap_data->probe_type == NULL) { + for (; info->mtd[i] == NULL && *probe_type != NULL; probe_type++) +--- a/include/linux/mtd/physmap.h ++++ b/include/linux/mtd/physmap.h +@@ -25,6 +25,8 @@ struct physmap_flash_data { + unsigned int width; + int (*init)(struct platform_device *); + void (*exit)(struct platform_device *); ++ void (*lock)(struct platform_device *); ++ void (*unlock)(struct platform_device *); + void (*set_vpp)(struct platform_device *, int); + unsigned int nr_parts; + unsigned int pfow_base; diff --git a/target/linux/ar71xx/patches-4.9/402-mtd-SST39VF6401B-support.patch b/target/linux/ar71xx/patches-4.9/402-mtd-SST39VF6401B-support.patch new file mode 100644 index 000000000..0d483ab1a --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/402-mtd-SST39VF6401B-support.patch @@ -0,0 +1,29 @@ +--- a/drivers/mtd/chips/jedec_probe.c ++++ b/drivers/mtd/chips/jedec_probe.c +@@ -148,6 +148,7 @@ + #define SST39LF160 0x2782 + #define SST39VF1601 0x234b + #define SST39VF3201 0x235b ++#define SST39VF6401B 0x236d + #define SST39WF1601 0x274b + #define SST39WF1602 0x274a + #define SST39LF512 0x00D4 +@@ -1569,6 +1570,18 @@ static const struct amd_flash_info jedec + ERASEINFO(0x10000,64), + } + }, { ++ .mfr_id = CFI_MFR_SST, ++ .dev_id = SST39VF6401B, ++ .name = "SST 39VF6401B", ++ .devtypes = CFI_DEVICETYPE_X16, ++ .uaddr = MTD_UADDR_0xAAAA_0x5555, ++ .dev_size = SIZE_8MiB, ++ .cmd_set = P_ID_AMD_STD, ++ .nr_regions = 1, ++ .regions = { ++ ERASEINFO(0x10000,128) ++ } ++ }, { + .mfr_id = CFI_MFR_ST, + .dev_id = M29F800AB, + .name = "ST M29F800AB", diff --git a/target/linux/ar71xx/patches-4.9/403-mtd_fix_cfi_cmdset_0002_status_check.patch b/target/linux/ar71xx/patches-4.9/403-mtd_fix_cfi_cmdset_0002_status_check.patch new file mode 100644 index 000000000..415d835ee --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/403-mtd_fix_cfi_cmdset_0002_status_check.patch @@ -0,0 +1,69 @@ +--- a/drivers/mtd/chips/cfi_cmdset_0002.c ++++ b/drivers/mtd/chips/cfi_cmdset_0002.c +@@ -1630,8 +1630,8 @@ static int __xipram do_write_oneword(str + break; + } + +- if (chip_ready(map, adr)) +- break; ++ if (chip_good(map, adr, datum)) ++ goto enable_xip; + + /* Latency issues. Drop the lock, wait a while and retry */ + UDELAY(map, chip, adr, 1); +@@ -1647,6 +1647,8 @@ static int __xipram do_write_oneword(str + + ret = -EIO; + } ++ ++ enable_xip: + xip_enable(map, chip, adr); + op_done: + if (mode == FL_OTP_WRITE) +@@ -2225,7 +2227,6 @@ static int cfi_amdstd_panic_write(struct + return 0; + } + +- + /* + * Handle devices with one erase region, that only implement + * the chip erase command. +@@ -2289,8 +2290,8 @@ static int __xipram do_erase_chip(struct + chip->erase_suspended = 0; + } + +- if (chip_ready(map, adr)) +- break; ++ if (chip_good(map, adr, map_word_ff(map))) ++ goto op_done; + + if (time_after(jiffies, timeo)) { + printk(KERN_WARNING "MTD %s(): software timeout\n", +@@ -2310,6 +2311,7 @@ static int __xipram do_erase_chip(struct + ret = -EIO; + } + ++ op_done: + chip->state = FL_READY; + xip_enable(map, chip, adr); + DISABLE_VPP(map); +@@ -2378,9 +2380,9 @@ static int __xipram do_erase_oneblock(st + chip->erase_suspended = 0; + } + +- if (chip_ready(map, adr)) { ++ if (chip_good(map, adr, map_word_ff(map))) { + xip_enable(map, chip, adr); +- break; ++ goto op_done; + } + + if (time_after(jiffies, timeo)) { +@@ -2402,6 +2404,7 @@ static int __xipram do_erase_oneblock(st + ret = -EIO; + } + ++ op_done: + chip->state = FL_READY; + DISABLE_VPP(map); + put_chip(map, chip, adr); diff --git a/target/linux/ar71xx/patches-4.9/404-mtd-cybertan-trx-parser.patch b/target/linux/ar71xx/patches-4.9/404-mtd-cybertan-trx-parser.patch new file mode 100644 index 000000000..6c2322e07 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/404-mtd-cybertan-trx-parser.patch @@ -0,0 +1,25 @@ +--- a/drivers/mtd/Kconfig ++++ b/drivers/mtd/Kconfig +@@ -178,6 +178,12 @@ menu "Partition parsers" + source "drivers/mtd/parsers/Kconfig" + endmenu + ++config MTD_CYBERTAN_PARTS ++ tristate "Cybertan partitioning support" ++ depends on ATH79 ++ ---help--- ++ Cybertan partitioning support ++ + config MTD_MYLOADER_PARTS + tristate "MyLoader partition parsing" + depends on ADM5120 || ATH25 || ATH79 +--- a/drivers/mtd/Makefile ++++ b/drivers/mtd/Makefile +@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63 + obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o + obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o + obj-y += parsers/ ++obj-$(CONFIG_MTD_CYBERTAN_PARTS) += cybertan_part.o + + # 'Users' - code which presents functionality to userspace. + obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o diff --git a/target/linux/ar71xx/patches-4.9/405-mtd-tp-link-partition-parser.patch b/target/linux/ar71xx/patches-4.9/405-mtd-tp-link-partition-parser.patch new file mode 100644 index 000000000..a53d9501e --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/405-mtd-tp-link-partition-parser.patch @@ -0,0 +1,25 @@ +--- a/drivers/mtd/Kconfig ++++ b/drivers/mtd/Kconfig +@@ -200,6 +200,12 @@ config MTD_MYLOADER_PARTS + You will still need the parsing functions to be called by the driver + for your particular device. It won't happen automatically. + ++config MTD_TPLINK_PARTS ++ tristate "TP-Link AR7XXX/AR9XXX partitioning support" ++ depends on ATH79 ++ ---help--- ++ TBD. ++ + comment "User Modules And Translation Layers" + + # +--- a/drivers/mtd/Makefile ++++ b/drivers/mtd/Makefile +@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63 + obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o + obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o + obj-y += parsers/ ++obj-$(CONFIG_MTD_TPLINK_PARTS) += tplinkpart.o + obj-$(CONFIG_MTD_CYBERTAN_PARTS) += cybertan_part.o + + # 'Users' - code which presents functionality to userspace. diff --git a/target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch b/target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch new file mode 100644 index 000000000..4fa957e70 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch @@ -0,0 +1,34 @@ +--- a/drivers/mtd/devices/m25p80.c ++++ b/drivers/mtd/devices/m25p80.c +@@ -192,6 +192,7 @@ static ssize_t m25p80_read(struct spi_no + */ + static int m25p_probe(struct spi_device *spi) + { ++ struct mtd_part_parser_data ppdata = {0,}; + struct flash_platform_data *data; + struct m25p *flash; + struct spi_nor *nor; +@@ -244,8 +245,11 @@ static int m25p_probe(struct spi_device + if (ret) + return ret; + +- return mtd_device_register(&nor->mtd, data ? data->parts : NULL, +- data ? data->nr_parts : 0); ++ return mtd_device_parse_register(&nor->mtd, ++ data ? data->part_probes : NULL, ++ &ppdata, ++ data ? data->parts : NULL, ++ data ? data->nr_parts : 0); + } + + +--- a/include/linux/spi/flash.h ++++ b/include/linux/spi/flash.h +@@ -24,6 +24,7 @@ struct flash_platform_data { + unsigned int nr_parts; + + char *type; ++ const char **part_probes; + + /* we'll likely add more ... use JEDEC IDs, etc */ + }; diff --git a/target/linux/ar71xx/patches-4.9/408-mtd-redboot_partition_scan.patch b/target/linux/ar71xx/patches-4.9/408-mtd-redboot_partition_scan.patch new file mode 100644 index 000000000..cd41e7ceb --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/408-mtd-redboot_partition_scan.patch @@ -0,0 +1,44 @@ +--- a/drivers/mtd/redboot.c ++++ b/drivers/mtd/redboot.c +@@ -76,12 +76,18 @@ static int parse_redboot_partitions(stru + static char nullstring[] = "unallocated"; + #endif + ++ buf = vmalloc(master->erasesize); ++ if (!buf) ++ return -ENOMEM; ++ ++ restart: + if ( directory < 0 ) { + offset = master->size + directory * master->erasesize; + while (mtd_block_isbad(master, offset)) { + if (!offset) { + nogood: + printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); ++ vfree(buf); + return -EIO; + } + offset -= master->erasesize; +@@ -94,10 +100,6 @@ static int parse_redboot_partitions(stru + goto nogood; + } + } +- buf = vmalloc(master->erasesize); +- +- if (!buf) +- return -ENOMEM; + + printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", + master->name, offset); +@@ -170,6 +172,11 @@ static int parse_redboot_partitions(stru + } + if (i == numslots) { + /* Didn't find it */ ++ if (offset + master->erasesize < master->size) { ++ /* not at the end of the flash yet, maybe next block :) */ ++ directory++; ++ goto restart; ++ } + printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", + master->name); + ret = 0; diff --git a/target/linux/ar71xx/patches-4.9/409-mtd-rb4xx_nand_driver.patch b/target/linux/ar71xx/patches-4.9/409-mtd-rb4xx_nand_driver.patch new file mode 100644 index 000000000..93d34b882 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/409-mtd-rb4xx_nand_driver.patch @@ -0,0 +1,21 @@ +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -569,4 +569,8 @@ config MTD_NAND_MTK + Enables support for NAND controller on MTK SoCs. + This controller is found on mt27xx, mt81xx, mt65xx SoCs. + ++config MTD_NAND_RB4XX ++ tristate "NAND flash driver for RouterBoard 4xx series" ++ depends on MTD_NAND && ATH79_MACH_RB4XX ++ + endif # MTD_NAND +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -33,6 +33,7 @@ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx27 + obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o + obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o + obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o ++obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o + obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o + obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o + obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o diff --git a/target/linux/ar71xx/patches-4.9/410-mtd-rb750-nand-driver.patch b/target/linux/ar71xx/patches-4.9/410-mtd-rb750-nand-driver.patch new file mode 100644 index 000000000..9ea879c8e --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/410-mtd-rb750-nand-driver.patch @@ -0,0 +1,21 @@ +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -573,4 +573,8 @@ config MTD_NAND_RB4XX + tristate "NAND flash driver for RouterBoard 4xx series" + depends on MTD_NAND && ATH79_MACH_RB4XX + ++config MTD_NAND_RB750 ++ tristate "NAND flash driver for the RouterBoard 750" ++ depends on MTD_NAND && ATH79_MACH_RB750 ++ + endif # MTD_NAND +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -34,6 +34,7 @@ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx + obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o + obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o + obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o ++obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o + obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o + obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o + obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o diff --git a/target/linux/ar71xx/patches-4.9/411-mtd-cfi_cmdset_0002-force-word-write.patch b/target/linux/ar71xx/patches-4.9/411-mtd-cfi_cmdset_0002-force-word-write.patch new file mode 100644 index 000000000..7f5b2f55a --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/411-mtd-cfi_cmdset_0002-force-word-write.patch @@ -0,0 +1,61 @@ +--- a/drivers/mtd/chips/cfi_cmdset_0002.c ++++ b/drivers/mtd/chips/cfi_cmdset_0002.c +@@ -40,7 +40,7 @@ + #include + + #define AMD_BOOTLOC_BUG +-#define FORCE_WORD_WRITE 0 ++#define FORCE_WORD_WRITE 1 + + #define MAX_WORD_RETRIES 3 + +@@ -51,7 +51,9 @@ + + static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); + static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); ++#if !FORCE_WORD_WRITE + static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); ++#endif + static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *); + static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *); + static void cfi_amdstd_sync (struct mtd_info *); +@@ -202,6 +204,7 @@ static void fixup_amd_bootblock(struct m + } + #endif + ++#if !FORCE_WORD_WRITE + static void fixup_use_write_buffers(struct mtd_info *mtd) + { + struct map_info *map = mtd->priv; +@@ -211,6 +214,7 @@ static void fixup_use_write_buffers(stru + mtd->_write = cfi_amdstd_write_buffers; + } + } ++#endif /* !FORCE_WORD_WRITE */ + + /* Atmel chips don't use the same PRI format as AMD chips */ + static void fixup_convert_atmel_pri(struct mtd_info *mtd) +@@ -1789,6 +1793,7 @@ static int cfi_amdstd_write_words(struct + /* + * FIXME: interleaved mode not tested, and probably not supported! + */ ++#if !FORCE_WORD_WRITE + static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, + unsigned long adr, const u_char *buf, + int len) +@@ -1917,7 +1922,6 @@ static int __xipram do_write_buffer(stru + return ret; + } + +- + static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) + { +@@ -1992,6 +1996,7 @@ static int cfi_amdstd_write_buffers(stru + + return 0; + } ++#endif /* !FORCE_WORD_WRITE */ + + /* + * Wait for the flash chip to become ready to write data diff --git a/target/linux/ar71xx/patches-4.9/413-mtd-ar934x-nand-driver.patch b/target/linux/ar71xx/patches-4.9/413-mtd-ar934x-nand-driver.patch new file mode 100644 index 000000000..9f9c339e6 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/413-mtd-ar934x-nand-driver.patch @@ -0,0 +1,25 @@ +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -577,4 +577,12 @@ config MTD_NAND_RB750 + tristate "NAND flash driver for the RouterBoard 750" + depends on MTD_NAND && ATH79_MACH_RB750 + ++config MTD_NAND_AR934X ++ tristate "NAND flash driver for the Qualcomm Atheros AR934x/QCA955x SoCs" ++ depends on (SOC_AR934X || SOC_QCA955X) ++ ++config MTD_NAND_AR934X_HW_ECC ++ bool "Hardware ECC support for the AR934X NAND Controller (EXPERIMENTAL)" ++ depends on MTD_NAND_AR934X ++ + endif # MTD_NAND +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -13,6 +13,7 @@ obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams- + obj-$(CONFIG_MTD_NAND_DENALI) += denali.o + obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o + obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o ++obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nfc.o + obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o + obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o + obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o diff --git a/target/linux/ar71xx/patches-4.9/414-mtd-rb91x-nand-driver.patch b/target/linux/ar71xx/patches-4.9/414-mtd-rb91x-nand-driver.patch new file mode 100644 index 000000000..d1b61f096 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/414-mtd-rb91x-nand-driver.patch @@ -0,0 +1,23 @@ +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -577,6 +577,10 @@ config MTD_NAND_RB750 + tristate "NAND flash driver for the RouterBoard 750" + depends on MTD_NAND && ATH79_MACH_RB750 + ++config MTD_NAND_RB91X ++ tristate "NAND flash driver for the RouterBOARD 91x series" ++ depends on MTD_NAND && ATH79_MACH_RB91X ++ + config MTD_NAND_AR934X + tristate "NAND flash driver for the Qualcomm Atheros AR934x/QCA955x SoCs" + depends on (SOC_AR934X || SOC_QCA955X) +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -36,6 +36,7 @@ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nan + obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o + obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o + obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o ++obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o + obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o + obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o + obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o diff --git a/target/linux/ar71xx/patches-4.9/420-net-ar71xx_mac_driver.patch b/target/linux/ar71xx/patches-4.9/420-net-ar71xx_mac_driver.patch new file mode 100644 index 000000000..feb2e6a39 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/420-net-ar71xx_mac_driver.patch @@ -0,0 +1,28 @@ +--- a/drivers/net/ethernet/atheros/Kconfig ++++ b/drivers/net/ethernet/atheros/Kconfig +@@ -5,7 +5,7 @@ + config NET_VENDOR_ATHEROS + bool "Atheros devices" + default y +- depends on PCI ++ depends on (PCI || ATH79) + ---help--- + If you have a network (Ethernet) card belonging to this class, say Y. + +@@ -78,4 +78,6 @@ config ALX + To compile this driver as a module, choose M here. The module + will be called alx. + ++source drivers/net/ethernet/atheros/ag71xx/Kconfig ++ + endif # NET_VENDOR_ATHEROS +--- a/drivers/net/ethernet/atheros/Makefile ++++ b/drivers/net/ethernet/atheros/Makefile +@@ -2,6 +2,7 @@ + # Makefile for the Atheros network device drivers. + # + ++obj-$(CONFIG_AG71XX) += ag71xx/ + obj-$(CONFIG_ATL1) += atlx/ + obj-$(CONFIG_ATL2) += atlx/ + obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ar71xx/patches-4.9/423-dsa-add-88e6063-driver.patch b/target/linux/ar71xx/patches-4.9/423-dsa-add-88e6063-driver.patch new file mode 100644 index 000000000..1df93e996 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/423-dsa-add-88e6063-driver.patch @@ -0,0 +1,24 @@ +--- a/drivers/net/dsa/Kconfig ++++ b/drivers/net/dsa/Kconfig +@@ -9,6 +9,13 @@ config NET_DSA_MV88E6060 + This enables support for the Marvell 88E6060 ethernet switch + chip. + ++config NET_DSA_MV88E6063 ++ bool "Marvell 88E6063 ethernet switch chip support" ++ select NET_DSA_TAG_TRAILER ++ ---help--- ++ This enables support for the Marvell 88E6063 ethernet switch ++ chip ++ + config NET_DSA_BCM_SF2 + tristate "Broadcom Starfighter 2 Ethernet switch support" + depends on HAS_IOMEM && NET_DSA +--- a/drivers/net/dsa/Makefile ++++ b/drivers/net/dsa/Makefile +@@ -1,4 +1,5 @@ + obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o ++obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o + obj-$(CONFIG_NET_DSA_BCM_SF2) += bcm_sf2.o + obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o + diff --git a/target/linux/ar71xx/patches-4.9/430-drivers-link-spi-before-mtd.patch b/target/linux/ar71xx/patches-4.9/430-drivers-link-spi-before-mtd.patch new file mode 100644 index 000000000..a86245459 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/430-drivers-link-spi-before-mtd.patch @@ -0,0 +1,12 @@ +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -77,8 +77,8 @@ obj-$(CONFIG_SCSI) += scsi/ + obj-y += nvme/ + obj-$(CONFIG_ATA) += ata/ + obj-$(CONFIG_TARGET_CORE) += target/ +-obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPI) += spi/ ++obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPMI) += spmi/ + obj-$(CONFIG_HSI) += hsi/ + obj-y += net/ diff --git a/target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch b/target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch new file mode 100644 index 000000000..e896d0bdf --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch @@ -0,0 +1,25 @@ +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -533,6 +533,12 @@ config SPI_QUP + This driver can also be built as a module. If so, the module + will be called spi_qup. + ++config SPI_RB4XX ++ tristate "Mikrotik RB4XX SPI master" ++ depends on SPI_MASTER && ATH79_MACH_RB4XX ++ help ++ SPI controller driver for the Mikrotik RB4xx series boards. ++ + config SPI_S3C24XX + tristate "Samsung S3C24XX series SPI" + depends on ARCH_S3C24XX +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -72,6 +72,7 @@ obj-$(CONFIG_SPI_PPC4xx) += spi-ppc4xx. + spi-pxa2xx-platform-objs := spi-pxa2xx.o spi-pxa2xx-dma.o + obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o + obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o ++obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o + obj-$(CONFIG_SPI_QUP) += spi-qup.o + obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o + obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o diff --git a/target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch b/target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch new file mode 100644 index 000000000..c44acab32 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch @@ -0,0 +1,26 @@ +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -761,6 +761,13 @@ config SPI_TLE62X0 + sysfs interface, with each line presented as a kind of GPIO + exposing both switch control and diagnostic feedback. + ++config SPI_RB4XX_CPLD ++ tristate "MikroTik RB4XX CPLD driver" ++ depends on ATH79_MACH_RB4XX ++ help ++ SPI driver for the Xilinx CPLD chip present on the ++ MikroTik RB4xx boards. ++ + # + # Add new SPI protocol masters in alphabetical order above this line + # +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -73,6 +73,7 @@ spi-pxa2xx-platform-objs := spi-pxa2xx. + obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o + obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o + obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o ++obj-$(CONFIG_SPI_RB4XX_CPLD) += spi-rb4xx-cpld.o + obj-$(CONFIG_SPI_QUP) += spi-qup.o + obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o + obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o diff --git a/target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch b/target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch new file mode 100644 index 000000000..f9f1f7a1e --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch @@ -0,0 +1,24 @@ +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -768,6 +768,11 @@ config SPI_RB4XX_CPLD + SPI driver for the Xilinx CPLD chip present on the + MikroTik RB4xx boards. + ++config SPI_VSC7385 ++ tristate "Vitesse VSC7385 ethernet switch driver" ++ help ++ SPI driver for the Vitesse VSC7385 ethernet switch. ++ + # + # Add new SPI protocol masters in alphabetical order above this line + # +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -99,6 +99,7 @@ spi-thunderx-objs := spi-cavium.o spi- + obj-$(CONFIG_SPI_THUNDERX) += spi-thunderx.o + obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o + obj-$(CONFIG_SPI_TXX9) += spi-txx9.o ++obj-$(CONFIG_SPI_VSC7385) += spi-vsc7385.o + obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o + obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o + obj-$(CONFIG_SPI_XLP) += spi-xlp.o diff --git a/target/linux/ar71xx/patches-4.9/440-leds-wndr3700-usb-led-driver.patch b/target/linux/ar71xx/patches-4.9/440-leds-wndr3700-usb-led-driver.patch new file mode 100644 index 000000000..0bf5b1a7d --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/440-leds-wndr3700-usb-led-driver.patch @@ -0,0 +1,26 @@ +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -659,6 +659,13 @@ config LEDS_MLXCPLD + This option enabled support for the LEDs on the Mellanox + boards. Say Y to enabled these. + ++config LEDS_WNDR3700_USB ++ tristate "NETGEAR WNDR3700 USB LED driver" ++ depends on LEDS_CLASS && ATH79_MACH_WNDR3700 ++ help ++ This option enables support for the USB LED found on the ++ NETGEAR WNDR3700 board. ++ + comment "LED Triggers" + source "drivers/leds/trigger/Kconfig" + +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -48,6 +48,7 @@ obj-$(CONFIG_LEDS_DA9052) += leds-da905 + obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o + obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o + obj-$(CONFIG_LEDS_PWM) += leds-pwm.o ++obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o + obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o + obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o + obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o diff --git a/target/linux/ar71xx/patches-4.9/441-leds-rb750-led-driver.patch b/target/linux/ar71xx/patches-4.9/441-leds-rb750-led-driver.patch new file mode 100644 index 000000000..777a0df91 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/441-leds-rb750-led-driver.patch @@ -0,0 +1,23 @@ +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -666,6 +666,10 @@ config LEDS_WNDR3700_USB + This option enables support for the USB LED found on the + NETGEAR WNDR3700 board. + ++config LEDS_RB750 ++ tristate "LED driver for the Mikrotik RouterBOARD 750" ++ depends on LEDS_CLASS && ATH79_MACH_RB750 ++ + comment "LED Triggers" + source "drivers/leds/trigger/Kconfig" + +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -55,6 +55,7 @@ obj-$(CONFIG_LEDS_LT3593) += leds-lt359 + obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o + obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o + obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o ++obj-$(CONFIG_LEDS_RB750) += leds-rb750.o + obj-$(CONFIG_LEDS_NS2) += leds-ns2.o + obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o + obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o diff --git a/target/linux/ar71xx/patches-4.9/450-gpio-nxp-74hc153-gpio-chip-driver.patch b/target/linux/ar71xx/patches-4.9/450-gpio-nxp-74hc153-gpio-chip-driver.patch new file mode 100644 index 000000000..41cf75a55 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/450-gpio-nxp-74hc153-gpio-chip-driver.patch @@ -0,0 +1,25 @@ +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -1211,4 +1211,12 @@ config GPIO_VIPERBOARD + + endmenu + ++comment "Other GPIO expanders" ++ ++config GPIO_NXP_74HC153 ++ tristate "NXP 74HC153 Dual 4-input multiplexer" ++ help ++ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This ++ provides a GPIO interface supporting input mode only. ++ + endif +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -83,6 +83,7 @@ obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o + obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o + obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o + obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o ++obj-$(CONFIG_GPIO_NXP_74HC153) += gpio-nxp-74hc153.o + obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o + obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o + obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o diff --git a/target/linux/ar71xx/patches-4.9/451-gpio-74x164-improve-platform-device-support.patch b/target/linux/ar71xx/patches-4.9/451-gpio-74x164-improve-platform-device-support.patch new file mode 100644 index 000000000..d9cfa888f --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/451-gpio-74x164-improve-platform-device-support.patch @@ -0,0 +1,117 @@ +--- a/drivers/gpio/gpio-74x164.c ++++ b/drivers/gpio/gpio-74x164.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -103,9 +104,16 @@ static int gen_74x164_direction_output(s + static int gen_74x164_probe(struct spi_device *spi) + { + struct gen_74x164_chip *chip; ++ struct gen_74x164_chip_platform_data *pdata = spi->dev.platform_data; ++ struct device_node *np = spi->dev.of_node; + u32 nregs; + int ret; + ++ if (!np && !pdata) { ++ dev_err(&spi->dev, "No configuration data available.\n"); ++ return -EINVAL; ++ } ++ + /* + * bits_per_word cannot be configured in platform data + */ +@@ -115,17 +123,23 @@ static int gen_74x164_probe(struct spi_d + if (ret < 0) + return ret; + +- if (of_property_read_u32(spi->dev.of_node, "registers-number", +- &nregs)) { +- dev_err(&spi->dev, +- "Missing registers-number property in the DT.\n"); +- return -EINVAL; +- } ++ if (np) { ++ if (of_property_read_u32(np, "registers-number", &nregs)) { ++ dev_err(&spi->dev, ++ "Missing registers-number property in the DT.\n"); ++ return -EINVAL; ++ } ++ } else if (pdata) { ++ nregs = pdata->num_registers; ++ } + + chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL); + if (!chip) + return -ENOMEM; + ++ if (pdata && pdata->init_data) ++ memcpy(chip->buffer, pdata->init_data, chip->registers); ++ + spi_set_drvdata(spi, chip); + + chip->gpio_chip.label = spi->modalias; +@@ -133,7 +147,11 @@ static int gen_74x164_probe(struct spi_d + chip->gpio_chip.get = gen_74x164_get_value; + chip->gpio_chip.set = gen_74x164_set_value; + chip->gpio_chip.set_multiple = gen_74x164_set_multiple; +- chip->gpio_chip.base = -1; ++ if (np) ++ chip->gpio_chip.base = -1; ++ else if (pdata) ++ chip->gpio_chip.base = pdata->base; ++ + + chip->registers = nregs; + chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; +@@ -170,17 +188,19 @@ static int gen_74x164_remove(struct spi_ + return 0; + } + ++#ifdef CONFIG_OF + static const struct of_device_id gen_74x164_dt_ids[] = { + { .compatible = "fairchild,74hc595" }, + { .compatible = "nxp,74lvc594" }, + {}, + }; + MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); ++#endif + + static struct spi_driver gen_74x164_driver = { + .driver = { + .name = "74x164", +- .of_match_table = gen_74x164_dt_ids, ++ .of_match_table = of_match_ptr(gen_74x164_dt_ids), + }, + .probe = gen_74x164_probe, + .remove = gen_74x164_remove, +--- /dev/null ++++ b/include/linux/spi/74x164.h +@@ -0,0 +1,13 @@ ++#ifndef LINUX_SPI_74X164_H ++#define LINUX_SPI_74X164_H ++ ++struct gen_74x164_chip_platform_data { ++ /* number assigned to the first GPIO */ ++ unsigned base; ++ /* number of chained registers */ ++ unsigned num_registers; ++ /* address of a buffer containing initial data */ ++ u8 *init_data; ++}; ++ ++#endif +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -1154,7 +1154,6 @@ menu "SPI GPIO expanders" + + config GPIO_74X164 + tristate "74x164 serial-in/parallel-out 8-bits shift register" +- depends on OF_GPIO + help + Driver for 74x164 compatible serial-in/parallel-out 8-outputs + shift registers. This driver can be used to provide access diff --git a/target/linux/ar71xx/patches-4.9/452-gpio-add-gpio-latch-driver.patch b/target/linux/ar71xx/patches-4.9/452-gpio-add-gpio-latch-driver.patch new file mode 100644 index 000000000..5ddf6de92 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/452-gpio-add-gpio-latch-driver.patch @@ -0,0 +1,22 @@ +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -1218,4 +1218,9 @@ config GPIO_NXP_74HC153 + Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This + provides a GPIO interface supporting input mode only. + ++config GPIO_LATCH ++ tristate "GPIO latch driver" ++ help ++ Say yes here to enable a GPIO latch driver. ++ + endif +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -56,6 +56,7 @@ obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz + obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o + obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o + obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o ++obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o + obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o + obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o + obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o diff --git a/target/linux/ar71xx/patches-4.9/461-spi-ath79-add-fast-flash-read.patch b/target/linux/ar71xx/patches-4.9/461-spi-ath79-add-fast-flash-read.patch new file mode 100644 index 000000000..0dc73a8b5 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/461-spi-ath79-add-fast-flash-read.patch @@ -0,0 +1,54 @@ +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -102,9 +102,6 @@ static void ath79_spi_enable(struct ath7 + /* save CTRL register */ + sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); + sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); +- +- /* TODO: setup speed? */ +- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); + } + + static void ath79_spi_disable(struct ath79_spi *sp) +@@ -205,6 +202,33 @@ static u32 ath79_spi_txrx_mode0(struct s + return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); + } + ++static int ath79_spi_read_flash_data(struct spi_device *spi, ++ struct spi_flash_read_message *msg) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(spi); ++ ++ if (msg->addr_width > 3) ++ return -EOPNOTSUPP; ++ ++ if (spi->chip_select || gpio_is_valid(spi->cs_gpio)) ++ return -EOPNOTSUPP; ++ ++ /* disable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); ++ ++ memcpy_fromio(msg->buf, sp->base + msg->from, msg->len); ++ ++ /* enable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); ++ ++ /* restore IOC register */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); ++ ++ msg->retlen = msg->len; ++ ++ return 0; ++} ++ + static int ath79_spi_probe(struct platform_device *pdev) + { + struct spi_master *master; +@@ -234,6 +258,7 @@ static int ath79_spi_probe(struct platfo + master->num_chipselect = pdata->num_chipselect; + master->cs_gpios = pdata->cs_gpios; + } ++ master->spi_flash_read = ath79_spi_read_flash_data; + + sp->bitbang.master = master; + sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ar71xx/patches-4.9/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ar71xx/patches-4.9/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch new file mode 100644 index 000000000..520c65205 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch @@ -0,0 +1,111 @@ +--- /dev/null ++++ b/arch/mips/include/asm/mach-ath79/mangle-port.h +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h ++ * Copyright (C) 2003, 2004 Ralf Baechle ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H ++#define __ASM_MACH_ATH79_MANGLE_PORT_H ++ ++#ifdef CONFIG_PCI ++extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); ++extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); ++#else ++#define ath79_pci_swizzle_b(port) (port) ++#define ath79_pci_swizzle_w(port) (port) ++#endif ++ ++#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) ++#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) ++#define __swizzle_addr_l(port) (port) ++#define __swizzle_addr_q(port) (port) ++ ++# define ioswabb(a, x) (x) ++# define __mem_ioswabb(a, x) (x) ++# define ioswabw(a, x) (x) ++# define __mem_ioswabw(a, x) cpu_to_le16(x) ++# define ioswabl(a, x) (x) ++# define __mem_ioswabl(a, x) cpu_to_le32(x) ++# define ioswabq(a, x) (x) ++# define __mem_ioswabq(a, x) cpu_to_le64(x) ++ ++#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ +--- a/arch/mips/ath79/pci.c ++++ b/arch/mips/ath79/pci.c +@@ -13,6 +13,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -25,6 +26,9 @@ static int (*ath79_pci_plat_dev_init)(st + static const struct ath79_pci_irq *ath79_pci_irq_map __initdata; + static unsigned ath79_pci_nr_irqs __initdata; + ++static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); ++static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); ++ + static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = { + { + .slot = 17, +@@ -212,12 +216,50 @@ ath79_register_pci_ar724x(int id, + return pdev; + } + ++static inline bool ar71xx_is_pci_addr(unsigned long port) ++{ ++ unsigned long phys = CPHYSADDR(port); ++ ++ return (phys >= AR71XX_PCI_MEM_BASE && ++ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); ++} ++ ++static unsigned long ar71xx_pci_swizzle_b(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; ++} ++ ++static unsigned long ar71xx_pci_swizzle_w(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; ++} ++ ++unsigned long ath79_pci_swizzle_b(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_b) ++ return __ath79_pci_swizzle_b(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_b); ++ ++unsigned long ath79_pci_swizzle_w(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_w) ++ return __ath79_pci_swizzle_w(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_w); ++ + int __init ath79_register_pci(void) + { + struct platform_device *pdev = NULL; + + if (soc_is_ar71xx()) { + pdev = ath79_register_pci_ar71xx(); ++ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; ++ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; + } else if (soc_is_ar724x()) { + pdev = ath79_register_pci_ar724x(-1, + AR724X_PCI_CFG_BASE, diff --git a/target/linux/ar71xx/patches-4.9/490-usb-ehci-add-quirks-for-qca-socs.patch b/target/linux/ar71xx/patches-4.9/490-usb-ehci-add-quirks-for-qca-socs.patch new file mode 100644 index 000000000..8a05adb05 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/490-usb-ehci-add-quirks-for-qca-socs.patch @@ -0,0 +1,103 @@ +--- a/drivers/usb/host/ehci-hcd.c ++++ b/drivers/usb/host/ehci-hcd.c +@@ -252,6 +252,37 @@ int ehci_reset(struct ehci_hcd *ehci) + command |= CMD_RESET; + dbg_cmd (ehci, "reset", command); + ehci_writel(ehci, command, &ehci->regs->command); ++ ++ if (ehci->qca_force_host_mode) { ++ u32 usbmode; ++ ++ udelay(1000); ++ ++ usbmode = ehci_readl(ehci, &ehci->regs->usbmode); ++ usbmode |= USBMODE_CM_HC | (1 << 4); ++ ehci_writel(ehci, usbmode, &ehci->regs->usbmode); ++ ++ ehci_dbg(ehci, "forced host mode, usbmode: %08x\n", ++ ehci_readl(ehci, &ehci->regs->usbmode)); ++ } ++ ++ if (ehci->qca_force_16bit_ptw) { ++ u32 port_status; ++ ++ udelay(1000); ++ ++ /* enable 16-bit UTMI interface */ ++ port_status = ehci_readl(ehci, &ehci->regs->port_status[0]); ++ port_status |= BIT(28); ++ ehci_writel(ehci, port_status, &ehci->regs->port_status[0]); ++ ++ ehci_dbg(ehci, "16-bit UTMI interface enabled, status: %08x\n", ++ ehci_readl(ehci, &ehci->regs->port_status[0])); ++ } ++ ++ if (ehci->reset_notifier) ++ ehci->reset_notifier(ehci_to_hcd(ehci)); ++ + ehci->rh_state = EHCI_RH_HALTED; + ehci->next_statechange = jiffies; + retval = ehci_handshake(ehci, &ehci->regs->command, +--- a/drivers/usb/host/ehci.h ++++ b/drivers/usb/host/ehci.h +@@ -231,6 +231,10 @@ struct ehci_hcd { /* one per controlle + unsigned need_oc_pp_cycle:1; /* MPC834X port power */ + unsigned imx28_write_fix:1; /* For Freescale i.MX28 */ + unsigned ignore_oc:1; ++ unsigned qca_force_host_mode:1; ++ unsigned qca_force_16bit_ptw:1; /* force 16 bit UTMI */ ++ ++ void (*reset_notifier)(struct usb_hcd *hcd); + + /* required for usb32 quirk */ + #define OHCI_CTRL_HCFS (3 << 6) +--- a/include/linux/usb/ehci_pdriver.h ++++ b/include/linux/usb/ehci_pdriver.h +@@ -50,6 +50,8 @@ struct usb_ehci_pdata { + unsigned reset_on_resume:1; + unsigned dma_mask_64:1; + unsigned ignore_oc:1; ++ unsigned qca_force_host_mode:1; ++ unsigned qca_force_16bit_ptw:1; + + /* Turn on all power and clocks */ + int (*power_on)(struct platform_device *pdev); +@@ -59,6 +61,7 @@ struct usb_ehci_pdata { + * turn off everything else */ + void (*power_suspend)(struct platform_device *pdev); + int (*pre_setup)(struct usb_hcd *hcd); ++ void (*reset_notifier)(struct platform_device *pdev); + }; + + #endif /* __USB_CORE_EHCI_PDRIVER_H */ +--- a/drivers/usb/host/ehci-platform.c ++++ b/drivers/usb/host/ehci-platform.c +@@ -52,6 +52,14 @@ struct ehci_platform_priv { + + static const char hcd_name[] = "ehci-platform"; + ++static void ehci_platform_reset_notifier(struct usb_hcd *hcd) ++{ ++ struct platform_device *pdev = to_platform_device(hcd->self.controller); ++ struct usb_ehci_pdata *pdata = pdev->dev.platform_data; ++ ++ pdata->reset_notifier(pdev); ++} ++ + static int ehci_platform_reset(struct usb_hcd *hcd) + { + struct platform_device *pdev = to_platform_device(hcd->self.controller); +@@ -261,6 +269,13 @@ static int ehci_platform_probe(struct pl + priv->reset_on_resume = true; + if (pdata->ignore_oc) + ehci->ignore_oc = 1; ++ if (pdata->qca_force_host_mode) ++ ehci->qca_force_host_mode = 1; ++ if (pdata->qca_force_16bit_ptw) ++ ehci->qca_force_16bit_ptw = 1; ++ ++ if (pdata->reset_notifier) ++ ehci->reset_notifier = ehci_platform_reset_notifier; + + #ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO + if (ehci->big_endian_mmio) { diff --git a/target/linux/ar71xx/patches-4.9/500-MIPS-fw-myloader.patch b/target/linux/ar71xx/patches-4.9/500-MIPS-fw-myloader.patch new file mode 100644 index 000000000..bcb19372e --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/500-MIPS-fw-myloader.patch @@ -0,0 +1,22 @@ +--- a/arch/mips/Makefile ++++ b/arch/mips/Makefile +@@ -213,6 +213,7 @@ cflags-$(toolchain-virt) += -DTOOLCHAIN + # + libs-$(CONFIG_FW_ARC) += arch/mips/fw/arc/ + libs-$(CONFIG_FW_CFE) += arch/mips/fw/cfe/ ++libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/ + libs-$(CONFIG_FW_SNIPROM) += arch/mips/fw/sni/ + libs-y += arch/mips/fw/lib/ + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -1144,6 +1144,9 @@ config MIPS_MSC + config MIPS_NILE4 + bool + ++config MYLOADER ++ bool ++ + config SYNC_R4K + bool + diff --git a/target/linux/ar71xx/patches-4.9/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch b/target/linux/ar71xx/patches-4.9/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch new file mode 100644 index 000000000..12ab3b50d --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch @@ -0,0 +1,70 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -22,6 +23,7 @@ + #include + #include "dev-wmac.h" + ++static u8 ath79_wmac_mac[ETH_ALEN]; + static struct ath9k_platform_data ath79_wmac_data; + + static struct resource ath79_wmac_resources[] = { +@@ -161,7 +163,7 @@ static void qca955x_wmac_setup(void) + ath79_wmac_data.is_clk_25mhz = true; + } + +-void __init ath79_register_wmac(u8 *cal_data) ++void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) + ar913x_wmac_setup(); +@@ -178,5 +180,10 @@ void __init ath79_register_wmac(u8 *cal_ + memcpy(ath79_wmac_data.eeprom_data, cal_data, + sizeof(ath79_wmac_data.eeprom_data)); + ++ if (mac_addr) { ++ memcpy(ath79_wmac_mac, mac_addr, sizeof(ath79_wmac_mac)); ++ ath79_wmac_data.macaddr = ath79_wmac_mac; ++ } ++ + platform_device_register(&ath79_wmac_device); + } +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -12,6 +12,6 @@ + #ifndef _ATH79_DEV_WMAC_H + #define _ATH79_DEV_WMAC_H + +-void ath79_register_wmac(u8 *cal_data); ++void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); + + #endif /* _ATH79_DEV_WMAC_H */ +--- a/arch/mips/ath79/mach-db120.c ++++ b/arch/mips/ath79/mach-db120.c +@@ -128,7 +128,7 @@ static void __init db120_setup(void) + ath79_register_spi(&db120_spi_data, db120_spi_info, + ARRAY_SIZE(db120_spi_info)); + ath79_register_usb(); +- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); ++ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); + db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); + } + +--- a/arch/mips/ath79/mach-ap121.c ++++ b/arch/mips/ath79/mach-ap121.c +@@ -85,7 +85,7 @@ static void __init ap121_setup(void) + ath79_register_spi(&ap121_spi_data, ap121_spi_info, + ARRAY_SIZE(ap121_spi_info)); + ath79_register_usb(); +- ath79_register_wmac(cal_data); ++ ath79_register_wmac(cal_data, NULL); + } + + MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", diff --git a/target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch b/target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch new file mode 100644 index 000000000..c0e96b272 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch @@ -0,0 +1,42 @@ +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -145,6 +145,7 @@ static inline u32 ath79_reset_rr(unsigne + + void ath79_device_reset_set(u32 mask); + void ath79_device_reset_clear(u32 mask); ++u32 ath79_device_reset_get(u32 mask); + + void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3); + void ath79_misc_irq_init(void __iomem *regs, int irq, +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -142,3 +142,29 @@ void ath79_device_reset_clear(u32 mask) + spin_unlock_irqrestore(&ath79_device_reset_lock, flags); + } + EXPORT_SYMBOL_GPL(ath79_device_reset_clear); ++ ++u32 ath79_device_reset_get(u32 mask) ++{ ++ unsigned long flags; ++ u32 reg; ++ u32 ret; ++ ++ if (soc_is_ar71xx()) ++ reg = AR71XX_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar724x()) ++ reg = AR724X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar913x()) ++ reg = AR913X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar933x()) ++ reg = AR933X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar934x()) ++ reg = AR934X_RESET_REG_RESET_MODULE; ++ else ++ BUG(); ++ ++ spin_lock_irqsave(&ath79_device_reset_lock, flags); ++ ret = ath79_reset_rr(reg); ++ spin_unlock_irqrestore(&ath79_device_reset_lock, flags); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(ath79_device_reset_get); diff --git a/target/linux/ar71xx/patches-4.9/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-4.9/505-MIPS-ath79-add-ath79_gpio_function_select.patch new file mode 100644 index 000000000..278e78153 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/505-MIPS-ath79-add-ath79_gpio_function_select.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -27,6 +27,7 @@ void ath79_ddr_ctrl_init(void); + void ath79_gpio_function_enable(u32 mask); + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); ++void ath79_gpio_output_select(unsigned gpio, u8 val); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -57,3 +57,26 @@ void ath79_gpio_function_disable(u32 mas + { + ath79_gpio_function_setup(0, mask); + } ++ ++void __init ath79_gpio_output_select(unsigned gpio, u8 val) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned int reg; ++ u32 t, s; ++ ++ BUG_ON(!soc_is_ar934x()); ++ ++ if (gpio >= AR934X_GPIO_COUNT) ++ return; ++ ++ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); ++ s = 8 * (gpio % 4); ++ ++ t = __raw_readl(base + reg); ++ t &= ~(0xff << s); ++ t |= val << s; ++ __raw_writel(t, base + reg); ++ ++ /* flush write */ ++ (void) __raw_readl(base + reg); ++} diff --git a/target/linux/ar71xx/patches-4.9/506-MIPS-ath79-prom-parse-redboot-args.patch b/target/linux/ar71xx/patches-4.9/506-MIPS-ath79-prom-parse-redboot-args.patch new file mode 100644 index 000000000..46beeffee --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/506-MIPS-ath79-prom-parse-redboot-args.patch @@ -0,0 +1,42 @@ +--- a/arch/mips/ath79/prom.c ++++ b/arch/mips/ath79/prom.c +@@ -22,10 +22,39 @@ + + #include "common.h" + ++static char ath79_cmdline_buf[COMMAND_LINE_SIZE] __initdata; ++ ++static void __init ath79_prom_append_cmdline(const char *name, ++ const char *value) ++{ ++ snprintf(ath79_cmdline_buf, sizeof(ath79_cmdline_buf), ++ " %s=%s", name, value); ++ strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); ++} ++ + void __init prom_init(void) + { ++ const char *env; ++ + fw_init_cmdline(); + ++ env = fw_getenv("ethaddr"); ++ if (env) ++ ath79_prom_append_cmdline("ethaddr", env); ++ ++ env = fw_getenv("board"); ++ if (env) { ++ /* Workaround for buggy bootloaders */ ++ if (strcmp(env, "RouterStation") == 0 || ++ strcmp(env, "Ubiquiti AR71xx-based board") == 0) ++ env = "UBNT-RS"; ++ ++ if (strcmp(env, "RouterStation PRO") == 0) ++ env = "UBNT-RSPRO"; ++ ++ ath79_prom_append_cmdline("board", env); ++ } ++ + #ifdef CONFIG_BLK_DEV_INITRD + /* Read the initrd address from the firmware environment */ + initrd_start = fw_getenvl("initrd_start"); diff --git a/target/linux/ar71xx/patches-4.9/507-MIPS-ath79-prom-add-myloader-support.patch b/target/linux/ar71xx/patches-4.9/507-MIPS-ath79-prom-add-myloader-support.patch new file mode 100644 index 000000000..17a97335d --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/507-MIPS-ath79-prom-add-myloader-support.patch @@ -0,0 +1,55 @@ +--- a/arch/mips/ath79/prom.c ++++ b/arch/mips/ath79/prom.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + #include "common.h" + +@@ -32,10 +33,44 @@ static void __init ath79_prom_append_cmd + strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); + } + ++static int __init ath79_prom_init_myloader(void) ++{ ++ struct myloader_info *mylo; ++ char mac_buf[32]; ++ unsigned char *mac; ++ ++ mylo = myloader_get_info(); ++ if (!mylo) ++ return 0; ++ ++ switch (mylo->did) { ++ case DEVID_COMPEX_WP543: ++ ath79_prom_append_cmdline("board", "WP543"); ++ break; ++ case DEVID_COMPEX_WPE72: ++ ath79_prom_append_cmdline("board", "WPE72"); ++ break; ++ default: ++ pr_warn("prom: unknown device id: %x\n", mylo->did); ++ return 0; ++ } ++ ++ mac = mylo->macs[0]; ++ snprintf(mac_buf, sizeof(mac_buf), "%02x:%02x:%02x:%02x:%02x:%02x", ++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); ++ ++ ath79_prom_append_cmdline("ethaddr", mac_buf); ++ ++ return 1; ++} ++ + void __init prom_init(void) + { + const char *env; + ++ if (ath79_prom_init_myloader()) ++ return; ++ + fw_init_cmdline(); + + env = fw_getenv("ethaddr"); diff --git a/target/linux/ar71xx/patches-4.9/508-MIPS-ath79-prom-image-command-line-hack.patch b/target/linux/ar71xx/patches-4.9/508-MIPS-ath79-prom-image-command-line-hack.patch new file mode 100644 index 000000000..cfa5e72ee --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/508-MIPS-ath79-prom-image-command-line-hack.patch @@ -0,0 +1,73 @@ +--- a/arch/mips/ath79/prom.c ++++ b/arch/mips/ath79/prom.c +@@ -33,6 +33,41 @@ static void __init ath79_prom_append_cmd + strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); + } + ++#ifdef CONFIG_IMAGE_CMDLINE_HACK ++extern char __image_cmdline[]; ++ ++static int __init ath79_use_image_cmdline(void) ++{ ++ char *p = __image_cmdline; ++ int replace = 0; ++ ++ if (*p == '-') { ++ replace = 1; ++ p++; ++ } ++ ++ if (*p == '\0') ++ return 0; ++ ++ if (replace) { ++ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); ++ } else { ++ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); ++ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); ++ } ++ ++ /* Validate and setup environment pointer */ ++ if (fw_arg2 < CKSEG0) ++ _fw_envp = NULL; ++ else ++ _fw_envp = (int *)fw_arg2; ++ ++ return 1; ++} ++#else ++static inline int ath79_use_image_cmdline(void) { return 0; } ++#endif ++ + static int __init ath79_prom_init_myloader(void) + { + struct myloader_info *mylo; +@@ -61,6 +96,8 @@ static int __init ath79_prom_init_myload + + ath79_prom_append_cmdline("ethaddr", mac_buf); + ++ ath79_use_image_cmdline(); ++ + return 1; + } + +@@ -71,7 +108,8 @@ void __init prom_init(void) + if (ath79_prom_init_myloader()) + return; + +- fw_init_cmdline(); ++ if (!ath79_use_image_cmdline()) ++ fw_init_cmdline(); + + env = fw_getenv("ethaddr"); + if (env) +--- a/arch/mips/fw/lib/cmdline.c ++++ b/arch/mips/fw/lib/cmdline.c +@@ -35,6 +35,7 @@ void __init fw_init_cmdline(void) + else + _fw_envp = (int *)fw_arg2; + ++ arcs_cmdline[0] = '\0'; + for (i = 1; i < fw_argc; i++) { + strlcat(arcs_cmdline, fw_argv(i), COMMAND_LINE_SIZE); + if (i < (fw_argc - 1)) diff --git a/target/linux/ar71xx/patches-4.9/509-MIPS-ath79-process-board-kernel-option.patch b/target/linux/ar71xx/patches-4.9/509-MIPS-ath79-process-board-kernel-option.patch new file mode 100644 index 000000000..3091ab69b --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/509-MIPS-ath79-process-board-kernel-option.patch @@ -0,0 +1,11 @@ +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -283,6 +283,8 @@ void __init plat_time_init(void) + mips_hpt_frequency = cpu_clk_rate / 2; + } + ++__setup("board=", mips_machtype_setup); ++ + static int __init ath79_setup(void) + { + if (mips_machtype == ATH79_MACH_GENERIC_OF) diff --git a/target/linux/ar71xx/patches-4.9/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch b/target/linux/ar71xx/patches-4.9/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch new file mode 100644 index 000000000..2d2235e29 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch @@ -0,0 +1,14 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -24,7 +24,10 @@ + #include "dev-wmac.h" + + static u8 ath79_wmac_mac[ETH_ALEN]; +-static struct ath9k_platform_data ath79_wmac_data; ++ ++static struct ath9k_platform_data ath79_wmac_data = { ++ .led_pin = -1, ++}; + + static struct resource ath79_wmac_resources[] = { + { diff --git a/target/linux/ar71xx/patches-4.9/520-MIPS-ath79-enable-UART-function.patch b/target/linux/ar71xx/patches-4.9/520-MIPS-ath79-enable-UART-function.patch new file mode 100644 index 000000000..c8649b749 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/520-MIPS-ath79-enable-UART-function.patch @@ -0,0 +1,18 @@ +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -81,6 +81,15 @@ void __init ath79_register_uart(void) + + uart_clk_rate = ath79_get_sys_clk_rate("uart"); + ++ if (soc_is_ar71xx()) ++ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN); ++ else if (soc_is_ar724x()) ++ ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN); ++ else if (soc_is_ar913x()) ++ ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN); ++ else if (soc_is_ar933x()) ++ ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN); ++ + if (soc_is_ar71xx() || + soc_is_ar724x() || + soc_is_ar913x() || diff --git a/target/linux/ar71xx/patches-4.9/521-MIPS-ath79-enable-UART-for-early_serial.patch b/target/linux/ar71xx/patches-4.9/521-MIPS-ath79-enable-UART-for-early_serial.patch new file mode 100644 index 000000000..e546ff26f --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/521-MIPS-ath79-enable-UART-for-early_serial.patch @@ -0,0 +1,61 @@ +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -58,6 +58,46 @@ static void prom_putchar_dummy(unsigned + /* nothing to do */ + } + ++static void prom_enable_uart(u32 id) ++{ ++ void __iomem *gpio_base; ++ u32 uart_en; ++ u32 t; ++ ++ switch (id) { ++ case REV_ID_MAJOR_AR71XX: ++ uart_en = AR71XX_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR7240: ++ case REV_ID_MAJOR_AR7241: ++ case REV_ID_MAJOR_AR7242: ++ uart_en = AR724X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR913X: ++ uart_en = AR913X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR9330: ++ case REV_ID_MAJOR_AR9331: ++ uart_en = AR933X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR9341: ++ case REV_ID_MAJOR_AR9342: ++ case REV_ID_MAJOR_AR9344: ++ /* TODO */ ++ default: ++ return; ++ } ++ ++ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE)); ++ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC); ++ t |= uart_en; ++ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC); ++} ++ + static void prom_putchar_init(void) + { + void __iomem *base; +@@ -88,8 +128,10 @@ static void prom_putchar_init(void) + + default: + _prom_putchar = prom_putchar_dummy; +- break; ++ return; + } ++ ++ prom_enable_uart(id); + } + + void prom_putchar(unsigned char ch) diff --git a/target/linux/ar71xx/patches-4.9/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch b/target/linux/ar71xx/patches-4.9/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch new file mode 100644 index 000000000..2d5559cb9 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch @@ -0,0 +1,21 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -190,3 +190,9 @@ void __init ath79_register_wmac(u8 *cal_ + + platform_device_register(&ath79_wmac_device); + } ++ ++void __init ath79_register_wmac_simple(void) ++{ ++ ath79_register_wmac(NULL, NULL); ++ ath79_wmac_data.eeprom_name = "soc_wmac.eeprom"; ++} +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -13,5 +13,6 @@ + #define _ATH79_DEV_WMAC_H + + void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); ++void ath79_register_wmac_simple(void); + + #endif /* _ATH79_DEV_WMAC_H */ diff --git a/target/linux/ar71xx/patches-4.9/523-MIPS-ath79-OTP-support.patch b/target/linux/ar71xx/patches-4.9/523-MIPS-ath79-OTP-support.patch new file mode 100644 index 000000000..d11d418f1 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/523-MIPS-ath79-OTP-support.patch @@ -0,0 +1,192 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -166,6 +166,149 @@ static void qca955x_wmac_setup(void) + ath79_wmac_data.is_clk_25mhz = true; + } + ++#define AR93XX_WMAC_SIZE \ ++ (soc_is_ar934x() ? AR934X_WMAC_SIZE : AR933X_WMAC_SIZE) ++#define AR93XX_WMAC_BASE \ ++ (soc_is_ar934x() ? AR934X_WMAC_BASE : AR933X_WMAC_BASE) ++ ++#define AR93XX_OTP_BASE \ ++ (soc_is_ar934x() ? AR934X_OTP_BASE : AR9300_OTP_BASE) ++#define AR93XX_OTP_STATUS \ ++ (soc_is_ar934x() ? AR934X_OTP_STATUS : AR9300_OTP_STATUS) ++#define AR93XX_OTP_READ_DATA \ ++ (soc_is_ar934x() ? AR934X_OTP_READ_DATA : AR9300_OTP_READ_DATA) ++ ++static bool __init ++ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) ++{ ++ int timeout = 1000; ++ u32 val; ++ ++ __raw_readl(base + AR93XX_OTP_BASE + (4 * addr)); ++ while (timeout--) { ++ val = __raw_readl(base + AR93XX_OTP_STATUS); ++ if ((val & AR9300_OTP_STATUS_TYPE) == AR9300_OTP_STATUS_VALID) ++ break; ++ ++ udelay(10); ++ } ++ ++ if (!timeout) ++ return false; ++ ++ *data = __raw_readl(base + AR93XX_OTP_READ_DATA); ++ return true; ++} ++ ++static bool __init ++ar93xx_wmac_otp_read(void __iomem *base, int addr, u8 *dest, int len) ++{ ++ u32 data; ++ int i; ++ ++ for (i = 0; i < len; i++) { ++ int offset = 8 * ((addr - i) % 4); ++ ++ if (!ar93xx_wmac_otp_read_word(base, (addr - i) / 4, &data)) ++ return false; ++ ++ dest[i] = (data >> offset) & 0xff; ++ } ++ ++ return true; ++} ++ ++static bool __init ++ar93xx_wmac_otp_uncompress(void __iomem *base, int addr, int len, u8 *dest, ++ int dest_start, int dest_len) ++{ ++ int dest_bytes = 0; ++ int offset = 0; ++ int end = addr - len; ++ u8 hdr[2]; ++ ++ while (addr > end) { ++ if (!ar93xx_wmac_otp_read(base, addr, hdr, 2)) ++ return false; ++ ++ addr -= 2; ++ offset += hdr[0]; ++ ++ if (offset <= dest_start + dest_len && ++ offset + len >= dest_start) { ++ int data_offset = 0; ++ int dest_offset = 0; ++ int copy_len; ++ ++ if (offset < dest_start) ++ data_offset = dest_start - offset; ++ else ++ dest_offset = offset - dest_start; ++ ++ copy_len = len - data_offset; ++ if (copy_len > dest_len - dest_offset) ++ copy_len = dest_len - dest_offset; ++ ++ ar93xx_wmac_otp_read(base, addr - data_offset, ++ dest + dest_offset, ++ copy_len); ++ ++ dest_bytes += copy_len; ++ } ++ addr -= hdr[1]; ++ } ++ return !!dest_bytes; ++} ++ ++bool __init ar93xx_wmac_read_mac_address(u8 *dest) ++{ ++ void __iomem *base; ++ bool ret = false; ++ int addr = 0x1ff; ++ unsigned int len; ++ u32 hdr_u32; ++ u8 *hdr = (u8 *) &hdr_u32; ++ u8 mac[6] = { 0x00, 0x02, 0x03, 0x04, 0x05, 0x06 }; ++ int mac_start = 2, mac_end = 8; ++ ++ BUG_ON(!soc_is_ar933x() && !soc_is_ar934x()); ++ base = ioremap_nocache(AR93XX_WMAC_BASE, AR93XX_WMAC_SIZE); ++ while (addr > sizeof(hdr_u32)) { ++ if (!ar93xx_wmac_otp_read(base, addr, hdr, sizeof(hdr_u32))) ++ break; ++ ++ if (hdr_u32 == 0 || hdr_u32 == ~0) ++ break; ++ ++ len = (hdr[1] << 4) | (hdr[2] >> 4); ++ addr -= 4; ++ ++ switch (hdr[0] >> 5) { ++ case 0: ++ if (len < mac_end) ++ break; ++ ++ ar93xx_wmac_otp_read(base, addr - mac_start, mac, 6); ++ ret = true; ++ break; ++ case 3: ++ ret |= ar93xx_wmac_otp_uncompress(base, addr, len, mac, ++ mac_start, 6); ++ break; ++ default: ++ break; ++ } ++ ++ addr -= len + 2; ++ } ++ ++ iounmap(base); ++ if (ret) ++ memcpy(dest, mac, 6); ++ ++ return ret; ++} ++ + void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -14,5 +14,6 @@ + + void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); + void ath79_register_wmac_simple(void); ++bool ar93xx_wmac_read_mac_address(u8 *dest); + + #endif /* _ATH79_DEV_WMAC_H */ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -112,6 +112,14 @@ + #define QCA955X_EHCI1_BASE 0x1b400000 + #define QCA955X_EHCI_SIZE 0x1000 + ++#define AR9300_OTP_BASE 0x14000 ++#define AR9300_OTP_STATUS 0x15f18 ++#define AR9300_OTP_STATUS_TYPE 0x7 ++#define AR9300_OTP_STATUS_VALID 0x4 ++#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 ++#define AR9300_OTP_STATUS_SM_BUSY 0x1 ++#define AR9300_OTP_READ_DATA 0x15f1c ++ + /* + * DDR_CTRL block + */ +@@ -149,6 +157,13 @@ + #define AR934X_DDR_REG_FLUSH_PCIE 0xa8 + #define AR934X_DDR_REG_FLUSH_WMAC 0xac + ++#define AR934X_OTP_BASE 0x30000 ++#define AR934X_OTP_STATUS 0x31018 ++#define AR934X_OTP_READ_DATA 0x3101c ++#define AR934X_OTP_INTF2_ADDRESS 0x31008 ++#define AR934X_OTP_INTF3_ADDRESS 0x3100c ++#define AR934X_OTP_PGENB_SETUP_HOLD_TIME_ADDRESS 0x31034 ++ + /* + * PLL block + */ diff --git a/target/linux/ar71xx/patches-4.9/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch b/target/linux/ar71xx/patches-4.9/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch new file mode 100644 index 000000000..91e037e24 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch @@ -0,0 +1,31 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -309,6 +309,16 @@ bool __init ar93xx_wmac_read_mac_address + return ret; + } + ++void __init ath79_wmac_disable_2ghz(void) ++{ ++ ath79_wmac_data.disable_2ghz = true; ++} ++ ++void __init ath79_wmac_disable_5ghz(void) ++{ ++ ath79_wmac_data.disable_5ghz = true; ++} ++ + void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -14,6 +14,9 @@ + + void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); + void ath79_register_wmac_simple(void); ++void ath79_wmac_disable_2ghz(void); ++void ath79_wmac_disable_5ghz(void); ++ + bool ar93xx_wmac_read_mac_address(u8 *dest); + + #endif /* _ATH79_DEV_WMAC_H */ diff --git a/target/linux/ar71xx/patches-4.9/525-MIPS-ath79-enable-qca-usb-quirks.patch b/target/linux/ar71xx/patches-4.9/525-MIPS-ath79-enable-qca-usb-quirks.patch new file mode 100644 index 000000000..0e33674ad --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/525-MIPS-ath79-enable-qca-usb-quirks.patch @@ -0,0 +1,101 @@ +--- a/arch/mips/ath79/dev-usb.c ++++ b/arch/mips/ath79/dev-usb.c +@@ -37,6 +37,8 @@ static struct usb_ehci_pdata ath79_ehci_ + static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { + .caps_offset = 0x100, + .has_tt = 1, ++ .qca_force_host_mode = 1, ++ .qca_force_16bit_ptw = 1, + }; + + static void __init ath79_usb_register(const char *name, int id, +@@ -159,6 +161,9 @@ static void __init ar913x_usb_setup(void + ath79_device_reset_clear(AR913X_RESET_USB_PHY); + mdelay(10); + ++ ath79_ehci_pdata_v2.qca_force_host_mode = 0; ++ ath79_ehci_pdata_v2.qca_force_16bit_ptw = 0; ++ + ath79_usb_register("ehci-platform", -1, + AR913X_EHCI_BASE, AR913X_EHCI_SIZE, + ATH79_CPU_IRQ(3), +@@ -182,14 +187,34 @@ static void __init ar933x_usb_setup(void + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + +-static void __init ar934x_usb_setup(void) ++static void enable_tx_tx_idp_violation_fix(unsigned base) + { +- u32 bootstrap; ++ void __iomem *phy_reg; ++ u32 t; ++ ++ phy_reg = ioremap(base, 4); ++ if (!phy_reg) ++ return; ++ ++ t = ioread32(phy_reg); ++ t &= ~0xff; ++ t |= 0x58; ++ iowrite32(t, phy_reg); ++ ++ iounmap(phy_reg); ++} + +- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); +- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) ++static void ar934x_usb_reset_notifier(struct platform_device *pdev) ++{ ++ if (pdev->id != -1) + return; + ++ enable_tx_tx_idp_violation_fix(0x18116c94); ++ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); ++} ++ ++static void __init ar934x_usb_setup(void) ++{ + ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); + udelay(1000); + +@@ -202,14 +227,40 @@ static void __init ar934x_usb_setup(void + ath79_device_reset_clear(AR934X_RESET_USB_HOST); + udelay(1000); + ++ if (ath79_soc_rev >= 3) ++ ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; ++ + ath79_usb_register("ehci-platform", -1, + AR934X_EHCI_BASE, AR934X_EHCI_SIZE, + ATH79_CPU_IRQ(3), + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + ++static void qca955x_usb_reset_notifier(struct platform_device *pdev) ++{ ++ u32 base; ++ ++ switch (pdev->id) { ++ case 0: ++ base = 0x18116c94; ++ break; ++ ++ case 1: ++ base = 0x18116e54; ++ break; ++ ++ default: ++ return; ++ } ++ ++ enable_tx_tx_idp_violation_fix(base); ++ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); ++} ++ + static void __init qca955x_usb_setup(void) + { ++ ath79_ehci_pdata_v2.reset_notifier = qca955x_usb_reset_notifier; ++ + ath79_usb_register("ehci-platform", 0, + QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, + ATH79_IP3_IRQ(0), diff --git a/target/linux/ar71xx/patches-4.9/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-4.9/601-MIPS-ath79-add-more-register-defines.patch new file mode 100644 index 000000000..d0f5b7890 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/601-MIPS-ath79-add-more-register-defines.patch @@ -0,0 +1,455 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -20,6 +20,10 @@ + #include + + #define AR71XX_APB_BASE 0x18000000 ++#define AR71XX_GE0_BASE 0x19000000 ++#define AR71XX_GE0_SIZE 0x10000 ++#define AR71XX_GE1_BASE 0x1a000000 ++#define AR71XX_GE1_SIZE 0x10000 + #define AR71XX_EHCI_BASE 0x1b000000 + #define AR71XX_EHCI_SIZE 0x1000 + #define AR71XX_OHCI_BASE 0x1c000000 +@@ -39,6 +43,8 @@ + #define AR71XX_PLL_SIZE 0x100 + #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) + #define AR71XX_RESET_SIZE 0x100 ++#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000) ++#define AR71XX_MII_SIZE 0x100 + + #define AR71XX_PCI_MEM_BASE 0x10000000 + #define AR71XX_PCI_MEM_SIZE 0x07000000 +@@ -81,15 +87,21 @@ + + #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) + #define AR933X_UART_SIZE 0x14 ++#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define AR933X_GMAC_SIZE 0x04 + #define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) + #define AR933X_WMAC_SIZE 0x20000 + #define AR933X_EHCI_BASE 0x1b000000 + #define AR933X_EHCI_SIZE 0x1000 + ++#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define AR934X_GMAC_SIZE 0x14 + #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) + #define AR934X_WMAC_SIZE 0x20000 + #define AR934X_EHCI_BASE 0x1b000000 + #define AR934X_EHCI_SIZE 0x200 ++#define AR934X_NFC_BASE 0x1b000200 ++#define AR934X_NFC_SIZE 0xb8 + #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) + #define AR934X_SRIF_SIZE 0x1000 + +@@ -106,11 +118,15 @@ + #define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) + #define QCA955X_PCI_CTRL_SIZE 0x100 + ++#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define QCA955X_GMAC_SIZE 0x40 + #define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) + #define QCA955X_WMAC_SIZE 0x20000 + #define QCA955X_EHCI0_BASE 0x1b000000 + #define QCA955X_EHCI1_BASE 0x1b400000 + #define QCA955X_EHCI_SIZE 0x1000 ++#define QCA955X_NFC_BASE 0x1b800200 ++#define QCA955X_NFC_SIZE 0xb8 + + #define AR9300_OTP_BASE 0x14000 + #define AR9300_OTP_STATUS 0x15f18 +@@ -181,6 +197,9 @@ + #define AR71XX_AHB_DIV_SHIFT 20 + #define AR71XX_AHB_DIV_MASK 0x7 + ++#define AR71XX_ETH0_PLL_SHIFT 17 ++#define AR71XX_ETH1_PLL_SHIFT 19 ++ + #define AR724X_PLL_REG_CPU_CONFIG 0x00 + #define AR724X_PLL_REG_PCIE_CONFIG 0x10 + +@@ -196,6 +215,8 @@ + #define AR724X_DDR_DIV_SHIFT 22 + #define AR724X_DDR_DIV_MASK 0x3 + ++#define AR7242_PLL_REG_ETH0_INT_CLOCK 0x2c ++ + #define AR913X_PLL_REG_CPU_CONFIG 0x00 + #define AR913X_PLL_REG_ETH_CONFIG 0x04 + #define AR913X_PLL_REG_ETH0_INT_CLOCK 0x14 +@@ -208,6 +229,9 @@ + #define AR913X_AHB_DIV_SHIFT 19 + #define AR913X_AHB_DIV_MASK 0x1 + ++#define AR913X_ETH0_PLL_SHIFT 20 ++#define AR913X_ETH1_PLL_SHIFT 22 ++ + #define AR933X_PLL_CPU_CONFIG_REG 0x00 + #define AR933X_PLL_CLOCK_CTRL_REG 0x08 + +@@ -229,6 +253,8 @@ + #define AR934X_PLL_CPU_CONFIG_REG 0x00 + #define AR934X_PLL_DDR_CONFIG_REG 0x04 + #define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 ++#define AR934X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 ++#define AR934X_PLL_ETH_XMII_CONTROL_REG 0x2c + + #define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 + #define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f +@@ -261,9 +287,13 @@ + #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) + #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) ++ + #define QCA955X_PLL_CPU_CONFIG_REG 0x00 + #define QCA955X_PLL_DDR_CONFIG_REG 0x04 + #define QCA955X_PLL_CLK_CTRL_REG 0x08 ++#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 ++#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 + + #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 + #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f +@@ -388,16 +418,83 @@ + #define AR913X_RESET_USB_HOST BIT(5) + #define AR913X_RESET_USB_PHY BIT(4) + ++#define AR933X_RESET_GE1_MDIO BIT(23) ++#define AR933X_RESET_GE0_MDIO BIT(22) ++#define AR933X_RESET_GE1_MAC BIT(13) + #define AR933X_RESET_WMAC BIT(11) ++#define AR933X_RESET_GE0_MAC BIT(9) + #define AR933X_RESET_USB_HOST BIT(5) + #define AR933X_RESET_USB_PHY BIT(4) + #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) + ++#define AR934X_RESET_HOST BIT(31) ++#define AR934X_RESET_SLIC BIT(30) ++#define AR934X_RESET_HDMA BIT(29) ++#define AR934X_RESET_EXTERNAL BIT(28) ++#define AR934X_RESET_RTC BIT(27) ++#define AR934X_RESET_PCIE_EP_INT BIT(26) ++#define AR934X_RESET_CHKSUM_ACC BIT(25) ++#define AR934X_RESET_FULL_CHIP BIT(24) ++#define AR934X_RESET_GE1_MDIO BIT(23) ++#define AR934X_RESET_GE0_MDIO BIT(22) ++#define AR934X_RESET_CPU_NMI BIT(21) ++#define AR934X_RESET_CPU_COLD BIT(20) ++#define AR934X_RESET_HOST_RESET_INT BIT(19) ++#define AR934X_RESET_PCIE_EP BIT(18) ++#define AR934X_RESET_UART1 BIT(17) ++#define AR934X_RESET_DDR BIT(16) ++#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) ++#define AR934X_RESET_NANDF BIT(14) ++#define AR934X_RESET_GE1_MAC BIT(13) ++#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12) + #define AR934X_RESET_USB_PHY_ANALOG BIT(11) ++#define AR934X_RESET_HOST_DMA_INT BIT(10) ++#define AR934X_RESET_GE0_MAC BIT(9) ++#define AR934X_RESET_ETH_SWITCH BIT(8) ++#define AR934X_RESET_PCIE_PHY BIT(7) ++#define AR934X_RESET_PCIE BIT(6) + #define AR934X_RESET_USB_HOST BIT(5) + #define AR934X_RESET_USB_PHY BIT(4) + #define AR934X_RESET_USBSUS_OVERRIDE BIT(3) ++#define AR934X_RESET_LUT BIT(2) ++#define AR934X_RESET_MBOX BIT(1) ++#define AR934X_RESET_I2S BIT(0) ++ ++#define QCA955X_RESET_HOST BIT(31) ++#define QCA955X_RESET_SLIC BIT(30) ++#define QCA955X_RESET_HDMA BIT(29) ++#define QCA955X_RESET_EXTERNAL BIT(28) ++#define QCA955X_RESET_RTC BIT(27) ++#define QCA955X_RESET_PCIE_EP_INT BIT(26) ++#define QCA955X_RESET_CHKSUM_ACC BIT(25) ++#define QCA955X_RESET_FULL_CHIP BIT(24) ++#define QCA955X_RESET_GE1_MDIO BIT(23) ++#define QCA955X_RESET_GE0_MDIO BIT(22) ++#define QCA955X_RESET_CPU_NMI BIT(21) ++#define QCA955X_RESET_CPU_COLD BIT(20) ++#define QCA955X_RESET_HOST_RESET_INT BIT(19) ++#define QCA955X_RESET_PCIE_EP BIT(18) ++#define QCA955X_RESET_UART1 BIT(17) ++#define QCA955X_RESET_DDR BIT(16) ++#define QCA955X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) ++#define QCA955X_RESET_NANDF BIT(14) ++#define QCA955X_RESET_GE1_MAC BIT(13) ++#define QCA955X_RESET_SGMII_ANALOG BIT(12) ++#define QCA955X_RESET_USB_PHY_ANALOG BIT(11) ++#define QCA955X_RESET_HOST_DMA_INT BIT(10) ++#define QCA955X_RESET_GE0_MAC BIT(9) ++#define QCA955X_RESET_SGMII BIT(8) ++#define QCA955X_RESET_PCIE_PHY BIT(7) ++#define QCA955X_RESET_PCIE BIT(6) ++#define QCA955X_RESET_USB_HOST BIT(5) ++#define QCA955X_RESET_USB_PHY BIT(4) ++#define QCA955X_RESET_USBSUS_OVERRIDE BIT(3) ++#define QCA955X_RESET_LUT BIT(2) ++#define QCA955X_RESET_MBOX BIT(1) ++#define QCA955X_RESET_I2S BIT(0) + ++#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) ++#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) + #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) + + #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) +@@ -539,8 +636,22 @@ + #define AR71XX_GPIO_REG_INT_ENABLE 0x24 + #define AR71XX_GPIO_REG_FUNC 0x28 + ++#define AR934X_GPIO_REG_OUT_FUNC0 0x2c ++#define AR934X_GPIO_REG_OUT_FUNC1 0x30 ++#define AR934X_GPIO_REG_OUT_FUNC2 0x34 ++#define AR934X_GPIO_REG_OUT_FUNC3 0x38 ++#define AR934X_GPIO_REG_OUT_FUNC4 0x3c ++#define AR934X_GPIO_REG_OUT_FUNC5 0x40 + #define AR934X_GPIO_REG_FUNC 0x6c + ++#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c ++#define QCA955X_GPIO_REG_OUT_FUNC1 0x30 ++#define QCA955X_GPIO_REG_OUT_FUNC2 0x34 ++#define QCA955X_GPIO_REG_OUT_FUNC3 0x38 ++#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c ++#define QCA955X_GPIO_REG_OUT_FUNC5 0x40 ++#define QCA955X_GPIO_REG_FUNC 0x6c ++ + #define AR71XX_GPIO_COUNT 16 + #define AR7240_GPIO_COUNT 18 + #define AR7241_GPIO_COUNT 20 +@@ -570,4 +681,235 @@ + #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 + #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 + ++#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) ++#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) ++#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) ++#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12) ++#define AR71XX_GPIO_FUNC_UART_EN BIT(8) ++#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4) ++#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0) ++ ++#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19) ++#define AR724X_GPIO_FUNC_SPI_EN BIT(18) ++#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14) ++#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) ++#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12) ++#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11) ++#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10) ++#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9) ++#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) ++#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) ++#define AR724X_GPIO_FUNC_UART_EN BIT(1) ++#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) ++ ++#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22) ++#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) ++#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20) ++#define AR913X_GPIO_FUNC_I2S_MCKEN BIT(19) ++#define AR913X_GPIO_FUNC_I2S1_EN BIT(18) ++#define AR913X_GPIO_FUNC_I2S0_EN BIT(17) ++#define AR913X_GPIO_FUNC_SLIC_EN BIT(16) ++#define AR913X_GPIO_FUNC_UART_RTSCTS_EN BIT(9) ++#define AR913X_GPIO_FUNC_UART_EN BIT(8) ++#define AR913X_GPIO_FUNC_USB_CLK_EN BIT(4) ++ ++#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31) ++#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30) ++#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29) ++#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27) ++#define AR933X_GPIO_FUNC_I2SO_EN BIT(26) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23) ++#define AR933X_GPIO_FUNC_SPI_EN BIT(18) ++#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14) ++#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) ++#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) ++#define AR933X_GPIO_FUNC_UART_EN BIT(1) ++#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) ++ ++#define AR934X_GPIO_FUNC_CLK_OBS7_EN BIT(9) ++#define AR934X_GPIO_FUNC_CLK_OBS6_EN BIT(8) ++#define AR934X_GPIO_FUNC_CLK_OBS5_EN BIT(7) ++#define AR934X_GPIO_FUNC_CLK_OBS4_EN BIT(6) ++#define AR934X_GPIO_FUNC_CLK_OBS3_EN BIT(5) ++#define AR934X_GPIO_FUNC_CLK_OBS2_EN BIT(4) ++#define AR934X_GPIO_FUNC_CLK_OBS1_EN BIT(3) ++#define AR934X_GPIO_FUNC_CLK_OBS0_EN BIT(2) ++#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1) ++ ++#define AR934X_GPIO_OUT_GPIO 0 ++#define AR934X_GPIO_OUT_SPI_CS1 7 ++#define AR934X_GPIO_OUT_LED_LINK0 41 ++#define AR934X_GPIO_OUT_LED_LINK1 42 ++#define AR934X_GPIO_OUT_LED_LINK2 43 ++#define AR934X_GPIO_OUT_LED_LINK3 44 ++#define AR934X_GPIO_OUT_LED_LINK4 45 ++#define AR934X_GPIO_OUT_EXT_LNA0 46 ++#define AR934X_GPIO_OUT_EXT_LNA1 47 ++ ++#define QCA955X_GPIO_FUNC_CLK_OBS7_EN BIT(9) ++#define QCA955X_GPIO_FUNC_CLK_OBS6_EN BIT(8) ++#define QCA955X_GPIO_FUNC_CLK_OBS5_EN BIT(7) ++#define QCA955X_GPIO_FUNC_CLK_OBS4_EN BIT(6) ++#define QCA955X_GPIO_FUNC_CLK_OBS3_EN BIT(5) ++#define QCA955X_GPIO_FUNC_CLK_OBS2_EN BIT(4) ++#define QCA955X_GPIO_FUNC_CLK_OBS1_EN BIT(3) ++#define QCA955X_GPIO_FUNC_JTAG_DISABLE BIT(1) ++ ++#define QCA955X_GPIO_OUT_GPIO 0 ++#define QCA955X_MII_EXT_MDI 1 ++#define QCA955X_SLIC_DATA_OUT 3 ++#define QCA955X_SLIC_PCM_FS 4 ++#define QCA955X_SLIC_PCM_CLK 5 ++#define QCA955X_SPI_CLK 8 ++#define QCA955X_SPI_CS_0 9 ++#define QCA955X_SPI_CS_1 10 ++#define QCA955X_SPI_CS_2 11 ++#define QCA955X_SPI_MISO 12 ++#define QCA955X_I2S_CLK 13 ++#define QCA955X_I2S_WS 14 ++#define QCA955X_I2S_SD 15 ++#define QCA955X_I2S_MCK 16 ++#define QCA955X_SPDIF_OUT 17 ++#define QCA955X_UART1_TD 18 ++#define QCA955X_UART1_RTS 19 ++#define QCA955X_UART1_RD 20 ++#define QCA955X_UART1_CTS 21 ++#define QCA955X_UART0_SOUT 22 ++#define QCA955X_SPDIF2_OUT 23 ++#define QCA955X_LED_SGMII_SPEED0 24 ++#define QCA955X_LED_SGMII_SPEED1 25 ++#define QCA955X_LED_SGMII_DUPLEX 26 ++#define QCA955X_LED_SGMII_LINK_UP 27 ++#define QCA955X_SGMII_SPEED0_INVERT 28 ++#define QCA955X_SGMII_SPEED1_INVERT 29 ++#define QCA955X_SGMII_DUPLEX_INVERT 30 ++#define QCA955X_SGMII_LINK_UP_INVERT 31 ++#define QCA955X_GE1_MII_MDO 32 ++#define QCA955X_GE1_MII_MDC 33 ++#define QCA955X_SWCOM2 38 ++#define QCA955X_SWCOM3 39 ++#define QCA955X_MAC2_GPIO 40 ++#define QCA955X_MAC3_GPIO 41 ++#define QCA955X_ATT_LED 42 ++#define QCA955X_PWR_LED 43 ++#define QCA955X_TX_FRAME 44 ++#define QCA955X_RX_CLEAR_EXTERNAL 45 ++#define QCA955X_LED_NETWORK_EN 46 ++#define QCA955X_LED_POWER_EN 47 ++#define QCA955X_WMAC_GLUE_WOW 68 ++#define QCA955X_RX_CLEAR_EXTENSION 70 ++#define QCA955X_CP_NAND_CS1 73 ++#define QCA955X_USB_SUSPEND 74 ++#define QCA955X_ETH_TX_ERR 75 ++#define QCA955X_DDR_DQ_OE 76 ++#define QCA955X_CLKREQ_N_EP 77 ++#define QCA955X_CLKREQ_N_RC 78 ++#define QCA955X_CLK_OBS0 79 ++#define QCA955X_CLK_OBS1 80 ++#define QCA955X_CLK_OBS2 81 ++#define QCA955X_CLK_OBS3 82 ++#define QCA955X_CLK_OBS4 83 ++#define QCA955X_CLK_OBS5 84 ++ ++/* ++ * MII_CTRL block ++ */ ++#define AR71XX_MII_REG_MII0_CTRL 0x00 ++#define AR71XX_MII_REG_MII1_CTRL 0x04 ++ ++#define AR71XX_MII_CTRL_IF_MASK 3 ++#define AR71XX_MII_CTRL_SPEED_SHIFT 4 ++#define AR71XX_MII_CTRL_SPEED_MASK 3 ++#define AR71XX_MII_CTRL_SPEED_10 0 ++#define AR71XX_MII_CTRL_SPEED_100 1 ++#define AR71XX_MII_CTRL_SPEED_1000 2 ++ ++#define AR71XX_MII0_CTRL_IF_GMII 0 ++#define AR71XX_MII0_CTRL_IF_MII 1 ++#define AR71XX_MII0_CTRL_IF_RGMII 2 ++#define AR71XX_MII0_CTRL_IF_RMII 3 ++ ++#define AR71XX_MII1_CTRL_IF_RGMII 0 ++#define AR71XX_MII1_CTRL_IF_RMII 1 ++ ++/* ++ * AR933X GMAC interface ++ */ ++#define AR933X_GMAC_REG_ETH_CFG 0x00 ++ ++#define AR933X_ETH_CFG_RGMII_GE0 BIT(0) ++#define AR933X_ETH_CFG_MII_GE0 BIT(1) ++#define AR933X_ETH_CFG_GMII_GE0 BIT(2) ++#define AR933X_ETH_CFG_MII_GE0_MASTER BIT(3) ++#define AR933X_ETH_CFG_MII_GE0_SLAVE BIT(4) ++#define AR933X_ETH_CFG_MII_GE0_ERR_EN BIT(5) ++#define AR933X_ETH_CFG_SW_PHY_SWAP BIT(7) ++#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(8) ++#define AR933X_ETH_CFG_RMII_GE0 BIT(9) ++#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0 ++#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10) ++ ++/* ++ * AR934X GMAC Interface ++ */ ++#define AR934X_GMAC_REG_ETH_CFG 0x00 ++ ++#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0) ++#define AR934X_ETH_CFG_MII_GMAC0 BIT(1) ++#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2) ++#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3) ++#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4) ++#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5) ++#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6) ++#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7) ++#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9) ++#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10) ++#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11) ++#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12) ++#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) ++#define AR934X_ETH_CFG_RXD_DELAY BIT(14) ++#define AR934X_ETH_CFG_RXD_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_RXD_DELAY_SHIFT 14 ++#define AR934X_ETH_CFG_RDV_DELAY BIT(16) ++#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 ++ ++/* ++ * QCA955X GMAC Interface ++ */ ++ ++#define QCA955X_GMAC_REG_ETH_CFG 0x00 ++ ++#define QCA955X_ETH_CFG_RGMII_EN BIT(0) ++#define QCA955X_ETH_CFG_MII_GE0 BIT(1) ++#define QCA955X_ETH_CFG_GMII_GE0 BIT(2) ++#define QCA955X_ETH_CFG_MII_GE0_MASTER BIT(3) ++#define QCA955X_ETH_CFG_MII_GE0_SLAVE BIT(4) ++#define QCA955X_ETH_CFG_GE0_ERR_EN BIT(5) ++#define QCA955X_ETH_CFG_GE0_SGMII BIT(6) ++#define QCA955X_ETH_CFG_RMII_GE0 BIT(10) ++#define QCA955X_ETH_CFG_MII_CNTL_SPEED BIT(11) ++#define QCA955X_ETH_CFG_RMII_GE0_MASTER BIT(12) ++#define QCA955X_ETH_CFG_RXD_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_RXD_DELAY_SHIFT 14 ++#define QCA955X_ETH_CFG_RDV_DELAY BIT(16) ++#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 ++#define QCA955X_ETH_CFG_TXD_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_TXD_DELAY_SHIFT 18 ++#define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 ++ + #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-4.9/602-MIPS-ath79-add-openwrt-stuff.patch b/target/linux/ar71xx/patches-4.9/602-MIPS-ath79-add-openwrt-stuff.patch new file mode 100644 index 000000000..cbd69e337 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/602-MIPS-ath79-add-openwrt-stuff.patch @@ -0,0 +1,49 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -98,6 +98,20 @@ config SOC_QCA955X + select PCI_AR724X if PCI + def_bool n + ++config ATH79_DEV_M25P80 ++ select ATH79_DEV_SPI ++ def_bool n ++ ++config ATH79_DEV_AP9X_PCI ++ select ATH79_PCI_ATH9K_FIXUP ++ def_bool n ++ ++config ATH79_DEV_DSA ++ def_bool n ++ ++config ATH79_DEV_ETH ++ def_bool n ++ + config PCI_AR724X + def_bool n + +@@ -107,6 +121,10 @@ config ATH79_DEV_GPIO_BUTTONS + config ATH79_DEV_LEDS_GPIO + def_bool n + ++config ATH79_DEV_NFC ++ depends on (SOC_AR934X || SOC_QCA955X) ++ def_bool n ++ + config ATH79_DEV_SPI + def_bool n + +@@ -117,4 +135,14 @@ config ATH79_DEV_WMAC + depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) + def_bool n + ++config ATH79_NVRAM ++ def_bool n ++ ++config ATH79_PCI_ATH9K_FIXUP ++ def_bool n ++ ++config ATH79_ROUTERBOOT ++ select LZO_DECOMPRESS ++ def_bool n ++ + endif diff --git a/target/linux/ar71xx/patches-4.9/603-MIPS-ath79-ap121-fixes.patch b/target/linux/ar71xx/patches-4.9/603-MIPS-ath79-ap121-fixes.patch new file mode 100644 index 000000000..773a858ae --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/603-MIPS-ath79-ap121-fixes.patch @@ -0,0 +1,149 @@ +--- a/arch/mips/ath79/mach-ap121.c ++++ b/arch/mips/ath79/mach-ap121.c +@@ -1,19 +1,21 @@ + /* + * Atheros AP121 board support + * +- * Copyright (C) 2011 Gabor Juhos ++ * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +-#include "machtypes.h" ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" ++#include "dev-m25p80.h" + #include "dev-spi.h" + #include "dev-usb.h" + #include "dev-wmac.h" ++#include "machtypes.h" + + #define AP121_GPIO_LED_WLAN 0 + #define AP121_GPIO_LED_USB 1 +@@ -24,7 +26,14 @@ + #define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ + #define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) + +-#define AP121_CAL_DATA_ADDR 0x1fff1000 ++#define AP121_MAC0_OFFSET 0x0000 ++#define AP121_MAC1_OFFSET 0x0006 ++#define AP121_CALDATA_OFFSET 0x1000 ++#define AP121_WMAC_MAC_OFFSET 0x1002 ++ ++#define AP121_MINI_GPIO_LED_WLAN 0 ++#define AP121_MINI_GPIO_BTN_JUMPSTART 12 ++#define AP121_MINI_GPIO_BTN_RESET 11 + + static struct gpio_led ap121_leds_gpio[] __initdata = { + { +@@ -58,35 +67,78 @@ static struct gpio_keys_button ap121_gpi + } + }; + +-static struct spi_board_info ap121_spi_info[] = { ++static struct gpio_led ap121_mini_leds_gpio[] __initdata = { + { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l1606e", +- } ++ .name = "ap121:green:wlan", ++ .gpio = AP121_MINI_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, + }; + +-static struct ath79_spi_platform_data ap121_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, ++static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = { ++ { ++ .desc = "jumpstart button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP121_MINI_GPIO_BTN_JUMPSTART, ++ .active_low = 1, ++ }, ++ { ++ .desc = "reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP121_MINI_GPIO_BTN_RESET, ++ .active_low = 1, ++ } + }; + ++static void __init ap121_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_wmac(art + AP121_CALDATA_OFFSET, ++ art + AP121_WMAC_MAC_OFFSET); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++} ++ + static void __init ap121_setup(void) + { +- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR); ++ ap121_common_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), + ap121_leds_gpio); + ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap121_gpio_keys), + ap121_gpio_keys); +- +- ath79_register_spi(&ap121_spi_data, ap121_spi_info, +- ARRAY_SIZE(ap121_spi_info)); + ath79_register_usb(); +- ath79_register_wmac(cal_data, NULL); + } + + MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", + ap121_setup); ++ ++static void __init ap121_mini_setup(void) ++{ ++ ap121_common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio), ++ ap121_mini_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap121_mini_gpio_keys), ++ ap121_mini_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI", ++ ap121_mini_setup); +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -5,9 +5,10 @@ menu "Atheros AR71XX/AR724X/AR913X machi + config ATH79_MACH_AP121 + bool "Atheros AP121 reference board" + select SOC_AR933X ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + help diff --git a/target/linux/ar71xx/patches-4.9/605-MIPS-ath79-db120-fixes.patch b/target/linux/ar71xx/patches-4.9/605-MIPS-ath79-db120-fixes.patch new file mode 100644 index 000000000..1029d4366 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/605-MIPS-ath79-db120-fixes.patch @@ -0,0 +1,204 @@ +--- a/arch/mips/ath79/mach-db120.c ++++ b/arch/mips/ath79/mach-db120.c +@@ -2,7 +2,7 @@ + * Atheros DB120 reference board support + * + * Copyright (c) 2011 Qualcomm Atheros +- * Copyright (c) 2011 Gabor Juhos ++ * Copyright (c) 2011-2012 Gabor Juhos + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above +@@ -19,16 +19,26 @@ + */ + + #include ++#include ++#include + #include ++#include + +-#include "machtypes.h" ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" + #include "dev-spi.h" + #include "dev-usb.h" + #include "dev-wmac.h" +-#include "pci.h" ++#include "machtypes.h" + ++#define DB120_GPIO_LED_USB 11 + #define DB120_GPIO_LED_WLAN_5G 12 + #define DB120_GPIO_LED_WLAN_2G 13 + #define DB120_GPIO_LED_STATUS 14 +@@ -39,8 +49,10 @@ + #define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ + #define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) + +-#define DB120_WMAC_CALDATA_OFFSET 0x1000 +-#define DB120_PCIE_CALDATA_OFFSET 0x5000 ++#define DB120_MAC0_OFFSET 0 ++#define DB120_MAC1_OFFSET 6 ++#define DB120_WMAC_CALDATA_OFFSET 0x1000 ++#define DB120_PCIE_CALDATA_OFFSET 0x5000 + + static struct gpio_led db120_leds_gpio[] __initdata = { + { +@@ -63,6 +75,11 @@ static struct gpio_led db120_leds_gpio[] + .gpio = DB120_GPIO_LED_WLAN_2G, + .active_low = 1, + }, ++ { ++ .name = "db120:green:usb", ++ .gpio = DB120_GPIO_LED_USB, ++ .active_low = 1, ++ } + }; + + static struct gpio_keys_button db120_gpio_keys[] __initdata = { +@@ -76,60 +93,85 @@ static struct gpio_keys_button db120_gpi + }, + }; + +-static struct spi_board_info db120_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "s25sl064a", +- } ++static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, + }; + +-static struct ath79_spi_platform_data db120_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, ++static struct ar8327_led_cfg db120_ar8327_led_cfg = { ++ .led_ctrl0 = 0x00000000, ++ .led_ctrl1 = 0xc737c737, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x00c30c00, ++ .open_drain = true, + }; + +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data db120_ath9k_data; +- +-static int db120_pci_plat_dev_init(struct pci_dev *dev) +-{ +- switch (PCI_SLOT(dev->devfn)) { +- case 0: +- dev->dev.platform_data = &db120_ath9k_data; +- break; +- } +- +- return 0; +-} +- +-static void __init db120_pci_init(u8 *eeprom) +-{ +- memcpy(db120_ath9k_data.eeprom_data, eeprom, +- sizeof(db120_ath9k_data.eeprom_data)); ++static struct ar8327_platform_data db120_ar8327_data = { ++ .pad0_cfg = &db120_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &db120_ar8327_led_cfg, ++}; + +- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); +- ath79_register_pci(); +-} +-#else +-static inline void db120_pci_init(u8 *eeprom) {} +-#endif /* CONFIG_PCI */ ++static struct mdio_board_info db120_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &db120_ar8327_data, ++ }, ++}; + + static void __init db120_setup(void) + { + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + ++ ath79_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO); ++ ath79_register_m25p80(NULL); ++ + ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), + db120_leds_gpio); + ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, + ARRAY_SIZE(db120_gpio_keys), + db120_gpio_keys); +- ath79_register_spi(&db120_spi_data, db120_spi_info, +- ARRAY_SIZE(db120_spi_info)); + ath79_register_usb(); + ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); +- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); ++ ap91_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0); ++ ++ mdiobus_register_board_info(db120_mdio0_info, ++ ARRAY_SIZE(db120_mdio0_info)); ++ ++ /* GMAC0 is connected to an AR8327 switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++ ++ ath79_register_nfc(); + } + + MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -42,9 +42,12 @@ config ATH79_MACH_AP81 + config ATH79_MACH_DB120 + bool "Atheros DB120 reference board" + select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_NFC + select ATH79_DEV_USB + select ATH79_DEV_WMAC + help diff --git a/target/linux/ar71xx/patches-4.9/606-MIPS-ath79-pb44-fixes.patch b/target/linux/ar71xx/patches-4.9/606-MIPS-ath79-pb44-fixes.patch new file mode 100644 index 000000000..f2943d083 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/606-MIPS-ath79-pb44-fixes.patch @@ -0,0 +1,146 @@ +--- a/arch/mips/ath79/mach-pb44.c ++++ b/arch/mips/ath79/mach-pb44.c +@@ -8,23 +8,48 @@ + * by the Free Software Foundation. + */ + ++#include + #include + #include + #include + #include + #include ++#include ++#include ++#include + +-#include "machtypes.h" ++#include ++#include ++ ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" + #include "dev-spi.h" + #include "dev-usb.h" ++#include "machtypes.h" + #include "pci.h" + + #define PB44_GPIO_I2C_SCL 0 + #define PB44_GPIO_I2C_SDA 1 + ++#define PB44_PCF8757_VSC7395_CS 0 ++#define PB44_PCF8757_STEREO_CS 1 ++#define PB44_PCF8757_SLIC_CS0 2 ++#define PB44_PCF8757_SLIC_TEST 3 ++#define PB44_PCF8757_SLIC_INT0 4 ++#define PB44_PCF8757_SLIC_INT1 5 ++#define PB44_PCF8757_SW_RESET 6 ++#define PB44_PCF8757_SW_JUMP 8 ++#define PB44_PCF8757_LED_JUMP1 9 ++#define PB44_PCF8757_LED_JUMP2 10 ++#define PB44_PCF8757_TP24 11 ++#define PB44_PCF8757_TP25 12 ++#define PB44_PCF8757_TP26 13 ++#define PB44_PCF8757_TP27 14 ++#define PB44_PCF8757_TP28 15 ++ + #define PB44_GPIO_EXP_BASE 16 ++#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS) + #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) + #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) + #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) +@@ -87,20 +112,59 @@ static struct gpio_keys_button pb44_gpio + } + }; + ++static void pb44_vsc7395_reset(void) ++{ ++ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); ++ udelay(10); ++ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); ++ mdelay(50); ++} ++ ++static struct vsc7385_platform_data pb44_vsc7395_data = { ++ .reset = pb44_vsc7395_reset, ++ .ucode_name = "vsc7395_ucode_pb44.bin", ++ .mac_cfg = { ++ .tx_ipg = 6, ++ .bit2 = 1, ++ .clk_sel = 0, ++ }, ++}; ++ ++static const char *pb44_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data pb44_flash_data = { ++ .part_probes = pb44_part_probes, ++}; ++ + static struct spi_board_info pb44_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "m25p64", ++ .platform_data = &pb44_flash_data, + }, ++ { ++ .bus_num = 0, ++ .chip_select = 1, ++ .max_speed_hz = 25000000, ++ .modalias = "spi-vsc7385", ++ .platform_data = &pb44_vsc7395_data, ++ } + }; + + static struct ath79_spi_platform_data pb44_spi_data = { + .bus_num = 0, +- .num_chipselect = 1, ++ .num_chipselect = 2, + }; + ++#define PB44_WAN_PHYMASK BIT(0) ++#define PB44_LAN_PHYMASK 0 ++#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK) ++ + static void __init pb44_init(void) + { + i2c_register_board_info(0, pb44_i2c_board_info, +@@ -116,6 +180,22 @@ static void __init pb44_init(void) + ARRAY_SIZE(pb44_spi_info)); + ath79_register_usb(); + ath79_register_pci(); ++ ++ ath79_register_mdio(0, ~PB44_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = PB44_WAN_PHYMASK; ++ ++ ath79_register_eth(0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_pll_data.pll_1000 = 0x110000; ++ ++ ath79_register_eth(1); + } + + MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -57,6 +57,7 @@ config ATH79_MACH_DB120 + config ATH79_MACH_PB44 + bool "Atheros PB44 reference board" + select SOC_AR71XX ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_SPI diff --git a/target/linux/ar71xx/patches-4.9/607-MIPS-ath79-ubnt-xm-fixes.patch b/target/linux/ar71xx/patches-4.9/607-MIPS-ath79-ubnt-xm-fixes.patch new file mode 100644 index 000000000..d667215a1 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/607-MIPS-ath79-ubnt-xm-fixes.patch @@ -0,0 +1,14 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -69,9 +69,10 @@ config ATH79_MACH_PB44 + config ATH79_MACH_UBNT_XM + bool "Ubiquiti Networks XM (rev 1.0) board" + select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 + help + Say 'Y' here if you want your kernel to support the + Ubiquiti Networks XM (rev 1.0) board. diff --git a/target/linux/ar71xx/patches-4.9/608-MIPS-ath79-ubnt-xm-add-more-boards.patch b/target/linux/ar71xx/patches-4.9/608-MIPS-ath79-ubnt-xm-add-more-boards.patch new file mode 100644 index 000000000..536c28d1c --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/608-MIPS-ath79-ubnt-xm-add-more-boards.patch @@ -0,0 +1,20 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -67,12 +67,16 @@ config ATH79_MACH_PB44 + Atheros PB44 reference board. + + config ATH79_MACH_UBNT_XM +- bool "Ubiquiti Networks XM (rev 1.0) board" ++ bool "Ubiquiti Networks XM/UniFi boards" + select SOC_AR724X ++ select SOC_AR934X + select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC + help + Say 'Y' here if you want your kernel to support the + Ubiquiti Networks XM (rev 1.0) board. diff --git a/target/linux/ar71xx/patches-4.9/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-4.9/609-MIPS-ath79-ap136-fixes.patch new file mode 100644 index 000000000..4d7902e16 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/609-MIPS-ath79-ap136-fixes.patch @@ -0,0 +1,300 @@ +--- a/arch/mips/ath79/mach-ap136.c ++++ b/arch/mips/ath79/mach-ap136.c +@@ -18,23 +18,29 @@ + * + */ + +-#include +-#include ++#include ++#include + +-#include "machtypes.h" ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" + #include "dev-gpio-buttons.h" ++#include "dev-eth.h" + #include "dev-leds-gpio.h" +-#include "dev-spi.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" + #include "dev-usb.h" + #include "dev-wmac.h" +-#include "pci.h" ++#include "machtypes.h" + +-#define AP136_GPIO_LED_STATUS_RED 14 +-#define AP136_GPIO_LED_STATUS_GREEN 19 + #define AP136_GPIO_LED_USB 4 +-#define AP136_GPIO_LED_WLAN_2G 13 + #define AP136_GPIO_LED_WLAN_5G 12 ++#define AP136_GPIO_LED_WLAN_2G 13 ++#define AP136_GPIO_LED_STATUS_RED 14 + #define AP136_GPIO_LED_WPS_RED 15 ++#define AP136_GPIO_LED_STATUS_GREEN 19 + #define AP136_GPIO_LED_WPS_GREEN 20 + + #define AP136_GPIO_BTN_WPS 16 +@@ -43,37 +49,39 @@ + #define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ + #define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) + +-#define AP136_WMAC_CALDATA_OFFSET 0x1000 +-#define AP136_PCIE_CALDATA_OFFSET 0x5000 ++#define AP136_MAC0_OFFSET 0 ++#define AP136_MAC1_OFFSET 6 ++#define AP136_WMAC_CALDATA_OFFSET 0x1000 ++#define AP136_PCIE_CALDATA_OFFSET 0x5000 + + static struct gpio_led ap136_leds_gpio[] __initdata = { + { +- .name = "qca:green:status", ++ .name = "ap136:green:status", + .gpio = AP136_GPIO_LED_STATUS_GREEN, + .active_low = 1, + }, + { +- .name = "qca:red:status", ++ .name = "ap136:red:status", + .gpio = AP136_GPIO_LED_STATUS_RED, + .active_low = 1, + }, + { +- .name = "qca:green:wps", ++ .name = "ap136:green:wps", + .gpio = AP136_GPIO_LED_WPS_GREEN, + .active_low = 1, + }, + { +- .name = "qca:red:wps", ++ .name = "ap136:red:wps", + .gpio = AP136_GPIO_LED_WPS_RED, + .active_low = 1, + }, + { +- .name = "qca:red:wlan-2g", ++ .name = "ap136:red:wlan-2g", + .gpio = AP136_GPIO_LED_WLAN_2G, + .active_low = 1, + }, + { +- .name = "qca:red:usb", ++ .name = "ap136:red:usb", + .gpio = AP136_GPIO_LED_USB, + .active_low = 1, + } +@@ -98,59 +106,151 @@ static struct gpio_keys_button ap136_gpi + }, + }; + +-static struct spi_board_info ap136_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l6405d", +- } ++static struct ar8327_pad_cfg ap136_ar8327_pad0_cfg; ++static struct ar8327_pad_cfg ap136_ar8327_pad6_cfg; ++ ++static struct ar8327_platform_data ap136_ar8327_data = { ++ .pad0_cfg = &ap136_ar8327_pad0_cfg, ++ .pad6_cfg = &ap136_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, + }; + +-static struct ath79_spi_platform_data ap136_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, ++static struct mdio_board_info ap136_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &ap136_ar8327_data, ++ }, + }; + +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data ap136_ath9k_data; ++static void __init ap136_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), ++ ap136_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap136_gpio_keys), ++ ap136_gpio_keys); ++ ++ ath79_register_usb(); ++ ath79_register_nfc(); ++ ++ ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); + +-static int ap136_pci_plat_dev_init(struct pci_dev *dev) ++ ath79_register_mdio(0, 0x0); ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0); ++ ++ mdiobus_register_board_info(ap136_mdio0_info, ++ ARRAY_SIZE(ap136_mdio0_info)); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected tot eh SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++} ++ ++static void __init ap136_010_setup(void) + { +- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) +- dev->dev.platform_data = &ap136_ath9k_data; ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + +- return 0; ++ /* GMAC0 of the AR8327 switch is connected to GMAC0 via RGMII */ ++ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; ++ ap136_ar8327_pad0_cfg.txclk_delay_en = true; ++ ap136_ar8327_pad0_cfg.rxclk_delay_en = true; ++ ap136_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; ++ ap136_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; ++ ++ /* GMAC6 of the AR8327 switch is connected to GMAC1 via SGMII */ ++ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; ++ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; ++ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ap136_common_setup(); ++ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); + } + +-static void __init ap136_pci_init(u8 *eeprom) ++MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", ++ "Atheros AP136-010 reference board", ++ ap136_010_setup); ++ ++static void __init ap136_020_common_setup(void) + { +- memcpy(ap136_ath9k_data.eeprom_data, eeprom, +- sizeof(ap136_ath9k_data.eeprom_data)); ++ /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ ++ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; ++ ap136_ar8327_pad0_cfg.sgmii_delay_en = true; ++ ++ /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */ ++ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_RGMII; ++ ap136_ar8327_pad6_cfg.txclk_delay_en = true; ++ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; ++ ap136_ar8327_pad6_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; ++ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; + +- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); +- ath79_register_pci(); ++ ath79_eth0_pll_data.pll_1000 = 0x56000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ap136_common_setup(); + } +-#else +-static inline void ap136_pci_init(u8 *eeprom) {} +-#endif /* CONFIG_PCI */ + +-static void __init ap136_setup(void) ++static void __init ap136_020_setup(void) + { + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + +- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), +- ap136_leds_gpio); +- ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(ap136_gpio_keys), +- ap136_gpio_keys); +- ath79_register_spi(&ap136_spi_data, ap136_spi_info, +- ARRAY_SIZE(ap136_spi_info)); +- ath79_register_usb(); +- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); +- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); ++ ap136_020_common_setup(); ++ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); + } + +-MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", +- "Atheros AP136-010 reference board", +- ap136_setup); ++MIPS_MACHINE(ATH79_MACH_AP136_020, "AP136-020", ++ "Atheros AP136-020 reference board", ++ ap136_020_setup); ++ ++/* ++ * AP135-020 is similar to AP136-020, any future AP135 specific init ++ * code can be added here. ++ */ ++static void __init ap135_020_setup(void) ++{ ++ ap136_leds_gpio[0].name = "ap135:green:status"; ++ ap136_leds_gpio[1].name = "ap135:red:status"; ++ ap136_leds_gpio[2].name = "ap135:green:wps"; ++ ap136_leds_gpio[3].name = "ap135:red:wps"; ++ ap136_leds_gpio[4].name = "ap135:red:wlan-2g"; ++ ap136_leds_gpio[5].name = "ap135:red:usb"; ++ ++ ap136_020_common_setup(); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP135_020, "AP135-020", ++ "Atheros AP135-020 reference board", ++ ap135_020_setup); +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -16,16 +16,17 @@ config ATH79_MACH_AP121 + Atheros AP121 reference board. + + config ATH79_MACH_AP136 +- bool "Atheros AP136 reference board" ++ bool "Atheros AP136/AP135 reference board" + select SOC_QCA955X + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_NFC + select ATH79_DEV_SPI + select ATH79_DEV_USB + select ATH79_DEV_WMAC + help + Say 'Y' here if you want your kernel to support the +- Atheros AP136 reference board. ++ Atheros AP136 or AP135 reference boards. + + config ATH79_MACH_AP81 + bool "Atheros AP81 reference board" diff --git a/target/linux/ar71xx/patches-4.9/611-MIPS-ath79-wdt-timeout.patch b/target/linux/ar71xx/patches-4.9/611-MIPS-ath79-wdt-timeout.patch new file mode 100644 index 000000000..0927d5a97 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/611-MIPS-ath79-wdt-timeout.patch @@ -0,0 +1,25 @@ +MIPS: ath79: fix maximum timeout + +If the userland tries to set a timeout higher than the max_timeout, then we should fallback to max_timeout. + +Signed-off-by: John Crispin + +--- a/drivers/watchdog/ath79_wdt.c ++++ b/drivers/watchdog/ath79_wdt.c +@@ -115,10 +115,14 @@ static inline void ath79_wdt_disable(voi + + static int ath79_wdt_set_timeout(int val) + { +- if (val < 1 || val > max_timeout) ++ if (val < 1) + return -EINVAL; + +- timeout = val; ++ if (val > max_timeout) ++ timeout = max_timeout; ++ else ++ timeout = val; ++ + ath79_wdt_keepalive(); + + return 0; diff --git a/target/linux/ar71xx/patches-4.9/612-MIPS-ath79-set-buffalo-txgain.patch b/target/linux/ar71xx/patches-4.9/612-MIPS-ath79-set-buffalo-txgain.patch new file mode 100644 index 000000000..3d100e054 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/612-MIPS-ath79-set-buffalo-txgain.patch @@ -0,0 +1,24 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -319,6 +319,11 @@ void __init ath79_wmac_disable_5ghz(void + ath79_wmac_data.disable_5ghz = true; + } + ++void __init ath79_wmac_set_tx_gain_buffalo(void) ++{ ++ ath79_wmac_data.tx_gain_buffalo = true; ++} ++ + void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -16,6 +16,7 @@ void ath79_register_wmac(u8 *cal_data, u + void ath79_register_wmac_simple(void); + void ath79_wmac_disable_2ghz(void); + void ath79_wmac_disable_5ghz(void); ++void ath79_wmac_set_tx_gain_buffalo(void); + + bool ar93xx_wmac_read_mac_address(u8 *dest); + diff --git a/target/linux/ar71xx/patches-4.9/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch b/target/linux/ar71xx/patches-4.9/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch new file mode 100644 index 000000000..5c1205d59 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch @@ -0,0 +1,76 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -18,9 +18,11 @@ + #include + #include + #include ++#include + + #include + #include ++#include "common.h" + #include "dev-wmac.h" + + static u8 ath79_wmac_mac[ETH_ALEN]; +@@ -324,6 +326,51 @@ void __init ath79_wmac_set_tx_gain_buffa + ath79_wmac_data.tx_gain_buffalo = true; + } + ++static int ath79_request_ext_lna_gpio(unsigned chain, int gpio) ++{ ++ char *label; ++ int err; ++ ++ label = kasprintf(GFP_KERNEL, "external LNA%u", chain); ++ if (!label) ++ return -ENOMEM; ++ ++ err = gpio_request_one(gpio, GPIOF_DIR_OUT | GPIOF_INIT_LOW, label); ++ if (err) { ++ pr_err("unable to request GPIO%d for external LNA%u\n", ++ gpio, chain); ++ kfree(label); ++ } ++ ++ return err; ++} ++ ++static void ar934x_set_ext_lna_gpio(unsigned chain, int gpio) ++{ ++ unsigned int sel; ++ int err; ++ ++ if (WARN_ON(chain > 1)) ++ return; ++ ++ err = ath79_request_ext_lna_gpio(chain, gpio); ++ if (err) ++ return; ++ ++ if (chain == 0) ++ sel = AR934X_GPIO_OUT_EXT_LNA0; ++ else ++ sel = AR934X_GPIO_OUT_EXT_LNA1; ++ ++ ath79_gpio_output_select(gpio, sel); ++} ++ ++void __init ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio) ++{ ++ if (soc_is_ar934x()) ++ ar934x_set_ext_lna_gpio(chain, gpio); ++} ++ + void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -17,6 +17,7 @@ void ath79_register_wmac_simple(void); + void ath79_wmac_disable_2ghz(void); + void ath79_wmac_disable_5ghz(void); + void ath79_wmac_set_tx_gain_buffalo(void); ++void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio); + + bool ar93xx_wmac_read_mac_address(u8 *dest); + diff --git a/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch new file mode 100644 index 000000000..869fdd6dd --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -0,0 +1,705 @@ +From 5300a7cd7ed2f88488ddba62947b9c6bb9663777 Mon Sep 17 00:00:00 2001 +Message-Id: <5300a7cd7ed2f88488ddba62947b9c6bb9663777.1396122227.git.mschiffer@universe-factory.net> +From: Matthias Schiffer +Date: Sat, 29 Mar 2014 20:26:08 +0100 +Subject: [PATCH 1/2] MIPS: ath79: add support for QCA953x SoC + +Note that the clock calculation looks very similar to the QCA955x, but the +meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. +--- + arch/mips/ath79/Kconfig | 6 +- + arch/mips/ath79/clock.c | 78 ++++++++++++++++++++++++++ + arch/mips/ath79/common.c | 4 ++ + arch/mips/ath79/dev-common.c | 1 + + arch/mips/ath79/dev-wmac.c | 20 +++++++ + arch/mips/ath79/early_printk.c | 1 + + arch/mips/ath79/gpio.c | 4 +- + arch/mips/ath79/irq.c | 4 ++ + arch/mips/ath79/setup.c | 8 ++- + arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 48 ++++++++++++++++ + arch/mips/include/asm/mach-ath79/ath79.h | 11 ++++ + 11 files changed, 182 insertions(+), 3 deletions(-) + +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -104,6 +104,10 @@ config SOC_AR934X + select PCI_AR724X if PCI + def_bool n + ++config SOC_QCA953X ++ select USB_ARCH_HAS_EHCI ++ def_bool n ++ + config SOC_QCA955X + select HW_HAS_PCI + select PCI_AR724X if PCI +@@ -143,7 +147,7 @@ config ATH79_DEV_USB + def_bool n + + config ATH79_DEV_WMAC +- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) ++ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X) + def_bool n + + config ATH79_NVRAM +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -356,6 +356,91 @@ static void __init ar934x_clocks_init(vo + iounmap(dpll_base); + } + ++static void __init qca953x_clocks_init(void) ++{ ++ unsigned long ref_rate; ++ unsigned long cpu_rate; ++ unsigned long ddr_rate; ++ unsigned long ahb_rate; ++ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; ++ u32 cpu_pll, ddr_pll; ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); ++ if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40) ++ ref_rate = 40 * 1000 * 1000; ++ else ++ ref_rate = 25 * 1000 * 1000; ++ ++ pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); ++ out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_REFDIV_MASK; ++ nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_NINT_MASK; ++ frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_NFRAC_MASK; ++ ++ cpu_pll = nint * ref_rate / ref_div; ++ cpu_pll += frac * (ref_rate >> 6) / ref_div; ++ cpu_pll /= (1 << out_div); ++ ++ pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); ++ out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_REFDIV_MASK; ++ nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_NINT_MASK; ++ frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_NFRAC_MASK; ++ ++ ddr_pll = nint * ref_rate / ref_div; ++ ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); ++ ddr_pll /= (1 << out_div); ++ ++ clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); ++ ++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & ++ QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS) ++ cpu_rate = ref_rate; ++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) ++ cpu_rate = cpu_pll / (postdiv + 1); ++ else ++ cpu_rate = ddr_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & ++ QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) ++ ddr_rate = ref_rate; ++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) ++ ddr_rate = ddr_pll / (postdiv + 1); ++ else ++ ddr_rate = cpu_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & ++ QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS) ++ ahb_rate = ref_rate; ++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) ++ ahb_rate = ddr_pll / (postdiv + 1); ++ else ++ ahb_rate = cpu_pll / (postdiv + 1); ++ ++ ath79_add_sys_clkdev("ref", ref_rate); ++ ath79_add_sys_clkdev("cpu", cpu_rate); ++ ath79_add_sys_clkdev("ddr", ddr_rate); ++ ath79_add_sys_clkdev("ahb", ahb_rate); ++ ++ clk_add_alias("wdt", NULL, "ref", NULL); ++ clk_add_alias("uart", NULL, "ref", NULL); ++} ++ + static void __init qca955x_clocks_init(void) + { + unsigned long ref_rate; +@@ -451,6 +536,8 @@ void __init ath79_clocks_init(void) + ar933x_clocks_init(); + else if (soc_is_ar934x()) + ar934x_clocks_init(); ++ else if (soc_is_qca953x()) ++ qca953x_clocks_init(); + else if (soc_is_qca955x()) + qca955x_clocks_init(); + else +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -103,6 +103,8 @@ void ath79_device_reset_set(u32 mask) + reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca953x()) ++ reg = QCA953X_RESET_REG_RESET_MODULE; + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; + else +@@ -131,6 +133,8 @@ void ath79_device_reset_clear(u32 mask) + reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca953x()) ++ reg = QCA953X_RESET_REG_RESET_MODULE; + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; + else +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -94,6 +94,7 @@ void __init ath79_register_uart(void) + soc_is_ar724x() || + soc_is_ar913x() || + soc_is_ar934x() || ++ soc_is_qca953x() || + soc_is_qca955x()) { + ath79_uart_data[0].uartclk = uart_clk_rate; + platform_device_register(&ath79_uart_device); +@@ -157,6 +158,9 @@ void __init ath79_gpio_init(void) + } else if (soc_is_ar934x()) { + ath79_gpio_pdata.ngpios = AR934X_GPIO_COUNT; + ath79_gpio_pdata.oe_inverted = 1; ++ } else if (soc_is_qca953x()) { ++ ath79_gpio_pdata.ngpios = QCA953X_GPIO_COUNT; ++ ath79_gpio_pdata.oe_inverted = 1; + } else if (soc_is_qca955x()) { + ath79_gpio_pdata.ngpios = QCA955X_GPIO_COUNT; + ath79_gpio_pdata.oe_inverted = 1; +--- a/arch/mips/ath79/dev-usb.c ++++ b/arch/mips/ath79/dev-usb.c +@@ -236,6 +236,30 @@ static void __init ar934x_usb_setup(void + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + ++static void __init qca953x_usb_setup(void) ++{ ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); ++ ++ ath79_device_reset_set(QCA953X_RESET_USBSUS_OVERRIDE); ++ udelay(1000); ++ ++ ath79_device_reset_clear(QCA953X_RESET_USB_PHY); ++ udelay(1000); ++ ++ ath79_device_reset_clear(QCA953X_RESET_USB_PHY_ANALOG); ++ udelay(1000); ++ ++ ath79_device_reset_clear(QCA953X_RESET_USB_HOST); ++ udelay(1000); ++ ++ ath79_usb_register("ehci-platform", -1, ++ QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE, ++ ATH79_CPU_IRQ(3), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++} ++ + static void qca955x_usb_reset_notifier(struct platform_device *pdev) + { + u32 base; +@@ -286,6 +310,8 @@ void __init ath79_register_usb(void) + ar933x_usb_setup(); + else if (soc_is_ar934x()) + ar934x_usb_setup(); ++ else if (soc_is_qca953x()) ++ qca953x_usb_setup(); + else if (soc_is_qca955x()) + qca955x_usb_setup(); + else +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -100,7 +100,7 @@ static int ar933x_wmac_reset(void) + return -ETIMEDOUT; + } + +-static int ar933x_r1_get_wmac_revision(void) ++static int ar93xx_get_soc_revision(void) + { + return ath79_soc_rev; + } +@@ -125,7 +125,7 @@ static void __init ar933x_wmac_setup(voi + ath79_wmac_data.is_clk_25mhz = true; + + if (ath79_soc_rev == 1) +- ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision; ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; + + ath79_wmac_data.external_reset = ar933x_wmac_reset; + } +@@ -150,6 +150,26 @@ static void ar934x_wmac_setup(void) + ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; + } + ++static void qca953x_wmac_setup(void) ++{ ++ u32 t; ++ ++ ath79_wmac_device.name = "qca953x_wmac"; ++ ++ ath79_wmac_resources[0].start = QCA953X_WMAC_BASE; ++ ath79_wmac_resources[0].end = QCA953X_WMAC_BASE + QCA953X_WMAC_SIZE - 1; ++ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); ++ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); ++ ++ t = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); ++ if (t & QCA953X_BOOTSTRAP_REF_CLK_40) ++ ath79_wmac_data.is_clk_25mhz = false; ++ else ++ ath79_wmac_data.is_clk_25mhz = true; ++ ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; ++} ++ + static void qca955x_wmac_setup(void) + { + u32 t; +@@ -379,6 +399,8 @@ void __init ath79_register_wmac(u8 *cal_ + ar933x_wmac_setup(); + else if (soc_is_ar934x()) + ar934x_wmac_setup(); ++ else if (soc_is_qca953x()) ++ qca953x_wmac_setup(); + else if (soc_is_qca955x()) + qca955x_wmac_setup(); + else +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -116,6 +116,8 @@ static void prom_putchar_init(void) + case REV_ID_MAJOR_AR9341: + case REV_ID_MAJOR_AR9342: + case REV_ID_MAJOR_AR9344: ++ case REV_ID_MAJOR_QCA9533: ++ case REV_ID_MAJOR_QCA9533_V2: + case REV_ID_MAJOR_QCA9556: + case REV_ID_MAJOR_QCA9558: + _prom_putchar = prom_putchar_ar71xx; +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -31,7 +31,7 @@ static void __iomem *ath79_gpio_get_func + soc_is_ar913x() || + soc_is_ar933x()) + reg = AR71XX_GPIO_REG_FUNC; +- else if (soc_is_ar934x()) ++ else if (soc_is_ar934x() || soc_is_qca953x()) + reg = AR934X_GPIO_REG_FUNC; + else + BUG(); +@@ -64,7 +64,7 @@ void __init ath79_gpio_output_select(uns + unsigned int reg; + u32 t, s; + +- BUG_ON(!soc_is_ar934x()); ++ BUG_ON(!soc_is_ar934x() && !soc_is_qca953x()); + + if (gpio >= AR934X_GPIO_COUNT) + return; +--- a/arch/mips/ath79/irq.c ++++ b/arch/mips/ath79/irq.c +@@ -56,6 +56,34 @@ static void ar934x_ip2_irq_init(void) + irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); + } + ++static void qca953x_ip2_irq_dispatch(struct irq_desc *desc) ++{ ++ u32 status; ++ ++ status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS); ++ ++ if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) { ++ ath79_ddr_wb_flush(3); ++ generic_handle_irq(ATH79_IP2_IRQ(0)); ++ } else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) { ++ ath79_ddr_wb_flush(4); ++ generic_handle_irq(ATH79_IP2_IRQ(1)); ++ } else { ++ spurious_interrupt(); ++ } ++} ++ ++static void qca953x_irq_init(void) ++{ ++ int i; ++ ++ for (i = ATH79_IP2_IRQ_BASE; ++ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) ++ irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); ++ ++ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); ++} ++ + static void qca955x_ip2_irq_dispatch(struct irq_desc *desc) + { + u32 status; +@@ -143,7 +171,7 @@ void __init arch_init_irq(void) + soc_is_ar913x() || soc_is_ar933x()) { + irq_wb_chan2 = 3; + irq_wb_chan3 = 2; +- } else if (soc_is_ar934x()) { ++ } else if (soc_is_ar934x() || soc_is_qca953x()) { + irq_wb_chan3 = 2; + } + +@@ -154,6 +182,7 @@ void __init arch_init_irq(void) + else if (soc_is_ar724x() || + soc_is_ar933x() || + soc_is_ar934x() || ++ soc_is_qca953x() || + soc_is_qca955x()) + misc_is_ar71xx = false; + else +@@ -164,6 +193,8 @@ void __init arch_init_irq(void) + + if (soc_is_ar934x()) + ar934x_ip2_irq_init(); ++ else if (soc_is_qca953x()) ++ qca953x_irq_init(); + else if (soc_is_qca955x()) + qca955x_irq_init(); + } +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -60,6 +60,7 @@ static void __init ath79_detect_sys_type + u32 major; + u32 minor; + u32 rev = 0; ++ u32 ver = 1; + + id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID); + major = id & REV_ID_MAJOR_MASK; +@@ -152,6 +153,17 @@ static void __init ath79_detect_sys_type + rev = id & AR934X_REV_ID_REVISION_MASK; + break; + ++ case REV_ID_MAJOR_QCA9533_V2: ++ ver = 2; ++ ath79_soc_rev = 2; ++ /* drop through */ ++ ++ case REV_ID_MAJOR_QCA9533: ++ ath79_soc = ATH79_SOC_QCA9533; ++ chip = "9533"; ++ rev = id & QCA953X_REV_ID_REVISION_MASK; ++ break; ++ + case REV_ID_MAJOR_QCA9556: + ath79_soc = ATH79_SOC_QCA9556; + chip = "9556"; +@@ -168,11 +180,12 @@ static void __init ath79_detect_sys_type + panic("ath79: unknown SoC, id:0x%08x", id); + } + +- ath79_soc_rev = rev; ++ if (ver == 1) ++ ath79_soc_rev = rev; + +- if (soc_is_qca955x()) +- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", +- chip, rev); ++ if (soc_is_qca953x() || soc_is_qca955x()) ++ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", ++ chip, ver, rev); + else + sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); + pr_info("SoC: %s\n", ath79_sys_type); +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -105,6 +105,21 @@ + #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) + #define AR934X_SRIF_SIZE 0x1000 + ++#define QCA953X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define QCA953X_GMAC_SIZE 0x14 ++#define QCA953X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) ++#define QCA953X_WMAC_SIZE 0x20000 ++#define QCA953X_EHCI_BASE 0x1b000000 ++#define QCA953X_EHCI_SIZE 0x200 ++#define QCA953X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) ++#define QCA953X_SRIF_SIZE 0x1000 ++ ++#define QCA953X_PCI_CFG_BASE0 0x14000000 ++#define QCA953X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000) ++#define QCA953X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000) ++#define QCA953X_PCI_MEM_BASE0 0x10000000 ++#define QCA953X_PCI_MEM_SIZE 0x02000000 ++ + #define QCA955X_PCI_MEM_BASE0 0x10000000 + #define QCA955X_PCI_MEM_BASE1 0x12000000 + #define QCA955X_PCI_MEM_SIZE 0x02000000 +@@ -180,6 +195,12 @@ + #define AR934X_OTP_INTF3_ADDRESS 0x3100c + #define AR934X_OTP_PGENB_SETUP_HOLD_TIME_ADDRESS 0x31034 + ++#define QCA953X_DDR_REG_FLUSH_GE0 0x9c ++#define QCA953X_DDR_REG_FLUSH_GE1 0xa0 ++#define QCA953X_DDR_REG_FLUSH_USB 0xa4 ++#define QCA953X_DDR_REG_FLUSH_PCIE 0xa8 ++#define QCA953X_DDR_REG_FLUSH_WMAC 0xac ++ + /* + * PLL block + */ +@@ -289,6 +310,44 @@ + + #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) + ++#define QCA953X_PLL_CPU_CONFIG_REG 0x00 ++#define QCA953X_PLL_DDR_CONFIG_REG 0x04 ++#define QCA953X_PLL_CLK_CTRL_REG 0x08 ++#define QCA953X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 ++#define QCA953X_PLL_ETH_XMII_CONTROL_REG 0x2c ++#define QCA953X_PLL_ETH_SGMII_CONTROL_REG 0x48 ++ ++#define QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 ++#define QCA953X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f ++#define QCA953X_PLL_CPU_CONFIG_NINT_SHIFT 6 ++#define QCA953X_PLL_CPU_CONFIG_NINT_MASK 0x3f ++#define QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 ++#define QCA953X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f ++#define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 ++#define QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 ++#define QCA953X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff ++#define QCA953X_PLL_DDR_CONFIG_NINT_SHIFT 10 ++#define QCA953X_PLL_DDR_CONFIG_NINT_MASK 0x3f ++#define QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 ++#define QCA953X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f ++#define QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 ++#define QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) ++#define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) ++#define QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) ++#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 ++#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f ++#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 ++#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f ++#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 ++#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f ++#define QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) ++#define QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) ++#define QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) ++ + #define QCA955X_PLL_CPU_CONFIG_REG 0x00 + #define QCA955X_PLL_DDR_CONFIG_REG 0x04 + #define QCA955X_PLL_CLK_CTRL_REG 0x08 +@@ -365,6 +424,10 @@ + #define AR934X_RESET_REG_BOOTSTRAP 0xb0 + #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac + ++#define QCA953X_RESET_REG_RESET_MODULE 0x1c ++#define QCA953X_RESET_REG_BOOTSTRAP 0xb0 ++#define QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac ++ + #define QCA955X_RESET_REG_RESET_MODULE 0x1c + #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 + #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac +@@ -460,6 +523,27 @@ + #define AR934X_RESET_MBOX BIT(1) + #define AR934X_RESET_I2S BIT(0) + ++#define QCA953X_RESET_USB_EXT_PWR BIT(29) ++#define QCA953X_RESET_EXTERNAL BIT(28) ++#define QCA953X_RESET_RTC BIT(27) ++#define QCA953X_RESET_FULL_CHIP BIT(24) ++#define QCA953X_RESET_GE1_MDIO BIT(23) ++#define QCA953X_RESET_GE0_MDIO BIT(22) ++#define QCA953X_RESET_CPU_NMI BIT(21) ++#define QCA953X_RESET_CPU_COLD BIT(20) ++#define QCA953X_RESET_DDR BIT(16) ++#define QCA953X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) ++#define QCA953X_RESET_GE1_MAC BIT(13) ++#define QCA953X_RESET_ETH_SWITCH_ANALOG BIT(12) ++#define QCA953X_RESET_USB_PHY_ANALOG BIT(11) ++#define QCA953X_RESET_GE0_MAC BIT(9) ++#define QCA953X_RESET_ETH_SWITCH BIT(8) ++#define QCA953X_RESET_PCIE_PHY BIT(7) ++#define QCA953X_RESET_PCIE BIT(6) ++#define QCA953X_RESET_USB_HOST BIT(5) ++#define QCA953X_RESET_USB_PHY BIT(4) ++#define QCA953X_RESET_USBSUS_OVERRIDE BIT(3) ++ + #define QCA955X_RESET_HOST BIT(31) + #define QCA955X_RESET_SLIC BIT(30) + #define QCA955X_RESET_HDMA BIT(29) +@@ -513,6 +597,13 @@ + #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) + #define AR934X_BOOTSTRAP_DDR1 BIT(0) + ++#define QCA953X_BOOTSTRAP_SW_OPTION2 BIT(12) ++#define QCA953X_BOOTSTRAP_SW_OPTION1 BIT(11) ++#define QCA953X_BOOTSTRAP_EJTAG_MODE BIT(5) ++#define QCA953X_BOOTSTRAP_REF_CLK_40 BIT(4) ++#define QCA953X_BOOTSTRAP_SDRAM_DISABLED BIT(1) ++#define QCA953X_BOOTSTRAP_DDR1 BIT(0) ++ + #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) + + #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) +@@ -533,6 +624,24 @@ + AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ + AR934X_PCIE_WMAC_INT_PCIE_RC3) + ++#define QCA953X_PCIE_WMAC_INT_WMAC_MISC BIT(0) ++#define QCA953X_PCIE_WMAC_INT_WMAC_TX BIT(1) ++#define QCA953X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) ++#define QCA953X_PCIE_WMAC_INT_WMAC_RXHP BIT(3) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC BIT(4) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC0 BIT(5) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC1 BIT(6) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC2 BIT(7) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC3 BIT(8) ++#define QCA953X_PCIE_WMAC_INT_WMAC_ALL \ ++ (QCA953X_PCIE_WMAC_INT_WMAC_MISC | QCA953X_PCIE_WMAC_INT_WMAC_TX | \ ++ QCA953X_PCIE_WMAC_INT_WMAC_RXLP | QCA953X_PCIE_WMAC_INT_WMAC_RXHP) ++ ++#define QCA953X_PCIE_WMAC_INT_PCIE_ALL \ ++ (QCA953X_PCIE_WMAC_INT_PCIE_RC | QCA953X_PCIE_WMAC_INT_PCIE_RC0 | \ ++ QCA953X_PCIE_WMAC_INT_PCIE_RC1 | QCA953X_PCIE_WMAC_INT_PCIE_RC2 | \ ++ QCA953X_PCIE_WMAC_INT_PCIE_RC3) ++ + #define QCA955X_EXT_INT_WMAC_MISC BIT(0) + #define QCA955X_EXT_INT_WMAC_TX BIT(1) + #define QCA955X_EXT_INT_WMAC_RXLP BIT(2) +@@ -575,6 +684,8 @@ + #define REV_ID_MAJOR_AR9341 0x0120 + #define REV_ID_MAJOR_AR9342 0x1120 + #define REV_ID_MAJOR_AR9344 0x2120 ++#define REV_ID_MAJOR_QCA9533 0x0140 ++#define REV_ID_MAJOR_QCA9533_V2 0x0160 + #define REV_ID_MAJOR_QCA9556 0x0130 + #define REV_ID_MAJOR_QCA9558 0x1130 + +@@ -597,6 +708,8 @@ + + #define AR934X_REV_ID_REVISION_MASK 0xf + ++#define QCA953X_REV_ID_REVISION_MASK 0xf ++ + #define QCA955X_REV_ID_REVISION_MASK 0xf + + /* +@@ -644,6 +757,25 @@ + #define AR934X_GPIO_REG_OUT_FUNC5 0x40 + #define AR934X_GPIO_REG_FUNC 0x6c + ++#define QCA953X_GPIO_REG_OUT_FUNC0 0x2c ++#define QCA953X_GPIO_REG_OUT_FUNC1 0x30 ++#define QCA953X_GPIO_REG_OUT_FUNC2 0x34 ++#define QCA953X_GPIO_REG_OUT_FUNC3 0x38 ++#define QCA953X_GPIO_REG_OUT_FUNC4 0x3c ++#define QCA953X_GPIO_REG_IN_ENABLE0 0x44 ++#define QCA953X_GPIO_REG_FUNC 0x6c ++ ++#define QCA953X_GPIO_OUT_MUX_SPI_CS1 10 ++#define QCA953X_GPIO_OUT_MUX_SPI_CS2 11 ++#define QCA953X_GPIO_OUT_MUX_SPI_CS0 9 ++#define QCA953X_GPIO_OUT_MUX_SPI_CLK 8 ++#define QCA953X_GPIO_OUT_MUX_SPI_MOSI 12 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK1 41 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK2 42 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK3 43 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK4 44 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK5 45 ++ + #define QCA955X_GPIO_REG_OUT_FUNC0 0x2c + #define QCA955X_GPIO_REG_OUT_FUNC1 0x30 + #define QCA955X_GPIO_REG_OUT_FUNC2 0x34 +@@ -658,6 +790,7 @@ + #define AR913X_GPIO_COUNT 22 + #define AR933X_GPIO_COUNT 30 + #define AR934X_GPIO_COUNT 23 ++#define QCA953X_GPIO_COUNT 18 + #define QCA955X_GPIO_COUNT 24 + + /* +@@ -681,6 +814,24 @@ + #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 + #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 + ++#define QCA953X_SRIF_CPU_DPLL1_REG 0x1c0 ++#define QCA953X_SRIF_CPU_DPLL2_REG 0x1c4 ++#define QCA953X_SRIF_CPU_DPLL3_REG 0x1c8 ++ ++#define QCA953X_SRIF_DDR_DPLL1_REG 0x240 ++#define QCA953X_SRIF_DDR_DPLL2_REG 0x244 ++#define QCA953X_SRIF_DDR_DPLL3_REG 0x248 ++ ++#define QCA953X_SRIF_DPLL1_REFDIV_SHIFT 27 ++#define QCA953X_SRIF_DPLL1_REFDIV_MASK 0x1f ++#define QCA953X_SRIF_DPLL1_NINT_SHIFT 18 ++#define QCA953X_SRIF_DPLL1_NINT_MASK 0x1ff ++#define QCA953X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff ++ ++#define QCA953X_SRIF_DPLL2_LOCAL_PLL BIT(30) ++#define QCA953X_SRIF_DPLL2_OUTDIV_SHIFT 13 ++#define QCA953X_SRIF_DPLL2_OUTDIV_MASK 0x7 ++ + #define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) + #define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) + #define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) +@@ -887,6 +1038,16 @@ + #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 + + /* ++ * QCA953X GMAC Interface ++ */ ++#define QCA953X_GMAC_REG_ETH_CFG 0x00 ++ ++#define QCA953X_ETH_CFG_SW_ONLY_MODE BIT(6) ++#define QCA953X_ETH_CFG_SW_PHY_SWAP BIT(7) ++#define QCA953X_ETH_CFG_SW_APB_ACCESS BIT(9) ++#define QCA953X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) ++ ++/* + * QCA955X GMAC Interface + */ + +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -32,6 +32,7 @@ enum ath79_soc_type { + ATH79_SOC_AR9341, + ATH79_SOC_AR9342, + ATH79_SOC_AR9344, ++ ATH79_SOC_QCA9533, + ATH79_SOC_QCA9556, + ATH79_SOC_QCA9558, + }; +@@ -100,6 +101,16 @@ static inline int soc_is_ar934x(void) + return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); + } + ++static inline int soc_is_qca9533(void) ++{ ++ return ath79_soc == ATH79_SOC_QCA9533; ++} ++ ++static inline int soc_is_qca953x(void) ++{ ++ return soc_is_qca9533(); ++} ++ + static inline int soc_is_qca9556(void) + { + return ath79_soc == ATH79_SOC_QCA9556; diff --git a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch new file mode 100644 index 000000000..dafac9919 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch @@ -0,0 +1,717 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -113,6 +113,12 @@ config SOC_QCA955X + select PCI_AR724X if PCI + def_bool n + ++config SOC_QCA956X ++ select USB_ARCH_HAS_EHCI ++ select HW_HAS_PCI ++ select PCI_AR724X if PCI ++ def_bool n ++ + config ATH79_DEV_M25P80 + select ATH79_DEV_SPI + def_bool n +@@ -147,7 +153,7 @@ config ATH79_DEV_USB + def_bool n + + config ATH79_DEV_WMAC +- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X) ++ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X || SOC_QCA956X) + def_bool n + + config ATH79_NVRAM +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -526,6 +526,100 @@ static void __init qca955x_clocks_init(v + clk_add_alias("uart", NULL, "ref", NULL); + } + ++static void __init qca956x_clocks_init(void) ++{ ++ unsigned long ref_rate; ++ unsigned long cpu_rate; ++ unsigned long ddr_rate; ++ unsigned long ahb_rate; ++ u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; ++ u32 cpu_pll, ddr_pll; ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); ++ if (bootstrap & QCA956X_BOOTSTRAP_REF_CLK_40) ++ ref_rate = 40 * 1000 * 1000; ++ else ++ ref_rate = 25 * 1000 * 1000; ++ ++ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG_REG); ++ out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG_REFDIV_MASK; ++ ++ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG1_REG); ++ nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG1_NINT_MASK; ++ hfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK; ++ lfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK; ++ ++ cpu_pll = nint * ref_rate / ref_div; ++ cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); ++ cpu_pll += (hfrac >> 13) * ref_rate / ref_div; ++ cpu_pll /= (1 << out_div); ++ ++ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG); ++ out_div = (pll >> QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG_REFDIV_MASK; ++ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG); ++ nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG1_NINT_MASK; ++ hfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK; ++ lfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK; ++ ++ ddr_pll = nint * ref_rate / ref_div; ++ ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); ++ ddr_pll += (hfrac >> 13) * ref_rate / ref_div; ++ ddr_pll /= (1 << out_div); ++ ++ clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG); ++ ++ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & ++ QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS) ++ cpu_rate = ref_rate; ++ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL) ++ cpu_rate = ddr_pll / (postdiv + 1); ++ else ++ cpu_rate = cpu_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & ++ QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS) ++ ddr_rate = ref_rate; ++ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL) ++ ddr_rate = cpu_pll / (postdiv + 1); ++ else ++ ddr_rate = ddr_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & ++ QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS) ++ ahb_rate = ref_rate; ++ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) ++ ahb_rate = ddr_pll / (postdiv + 1); ++ else ++ ahb_rate = cpu_pll / (postdiv + 1); ++ ++ ath79_add_sys_clkdev("ref", ref_rate); ++ ath79_add_sys_clkdev("cpu", cpu_rate); ++ ath79_add_sys_clkdev("ddr", ddr_rate); ++ ath79_add_sys_clkdev("ahb", ahb_rate); ++ ++ clk_add_alias("wdt", NULL, "ref", NULL); ++ clk_add_alias("uart", NULL, "ref", NULL); ++} ++ + void __init ath79_clocks_init(void) + { + if (soc_is_ar71xx()) +@@ -540,6 +634,8 @@ void __init ath79_clocks_init(void) + qca953x_clocks_init(); + else if (soc_is_qca955x()) + qca955x_clocks_init(); ++ else if (soc_is_qca956x() || soc_is_tp9343()) ++ qca956x_clocks_init(); + else + BUG(); + } +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -107,6 +107,8 @@ void ath79_device_reset_set(u32 mask) + reg = QCA953X_RESET_REG_RESET_MODULE; + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca956x() || soc_is_tp9343()) ++ reg = QCA956X_RESET_REG_RESET_MODULE; + else + panic("Reset register not defined for this SOC"); + +@@ -137,6 +139,8 @@ void ath79_device_reset_clear(u32 mask) + reg = QCA953X_RESET_REG_RESET_MODULE; + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca956x() || soc_is_tp9343()) ++ reg = QCA956X_RESET_REG_RESET_MODULE; + else + panic("Reset register not defined for this SOC"); + +@@ -163,6 +167,8 @@ u32 ath79_device_reset_get(u32 mask) + reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca956x() || soc_is_tp9343()) ++ reg = QCA956X_RESET_REG_RESET_MODULE; + else + BUG(); + +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -95,7 +95,9 @@ void __init ath79_register_uart(void) + soc_is_ar913x() || + soc_is_ar934x() || + soc_is_qca953x() || +- soc_is_qca955x()) { ++ soc_is_qca955x() || ++ soc_is_qca956x() || ++ soc_is_tp9343()) { + ath79_uart_data[0].uartclk = uart_clk_rate; + platform_device_register(&ath79_uart_device); + } else if (soc_is_ar933x()) { +@@ -164,6 +166,9 @@ void __init ath79_gpio_init(void) + } else if (soc_is_qca955x()) { + ath79_gpio_pdata.ngpios = QCA955X_GPIO_COUNT; + ath79_gpio_pdata.oe_inverted = 1; ++ } else if (soc_is_qca956x() || soc_is_tp9343()) { ++ ath79_gpio_pdata.ngpios = QCA956X_GPIO_COUNT; ++ ath79_gpio_pdata.oe_inverted = 1; + } else { + BUG(); + } +--- a/arch/mips/ath79/dev-usb.c ++++ b/arch/mips/ath79/dev-usb.c +@@ -296,6 +296,19 @@ static void __init qca955x_usb_setup(voi + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + ++static void __init qca956x_usb_setup(void) ++{ ++ ath79_usb_register("ehci-platform", 0, ++ QCA956X_EHCI0_BASE, QCA956X_EHCI_SIZE, ++ ATH79_IP3_IRQ(0), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ++ ath79_usb_register("ehci-platform", 1, ++ QCA956X_EHCI1_BASE, QCA956X_EHCI_SIZE, ++ ATH79_IP3_IRQ(1), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++} ++ + void __init ath79_register_usb(void) + { + if (soc_is_ar71xx()) +@@ -314,6 +327,8 @@ void __init ath79_register_usb(void) + qca953x_usb_setup(); + else if (soc_is_qca955x()) + qca955x_usb_setup(); ++ else if (soc_is_qca956x()) ++ qca956x_usb_setup(); + else + BUG(); + } +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -200,6 +200,26 @@ static void qca955x_wmac_setup(void) + #define AR93XX_OTP_READ_DATA \ + (soc_is_ar934x() ? AR934X_OTP_READ_DATA : AR9300_OTP_READ_DATA) + ++static void qca956x_wmac_setup(void) ++{ ++ u32 t; ++ ++ ath79_wmac_device.name = "qca956x_wmac"; ++ ++ ath79_wmac_resources[0].start = QCA956X_WMAC_BASE; ++ ath79_wmac_resources[0].end = QCA956X_WMAC_BASE + QCA956X_WMAC_SIZE - 1; ++ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); ++ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); ++ ++ t = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); ++ if (t & QCA956X_BOOTSTRAP_REF_CLK_40) ++ ath79_wmac_data.is_clk_25mhz = false; ++ else ++ ath79_wmac_data.is_clk_25mhz = true; ++ ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; ++} ++ + static bool __init + ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) + { +@@ -403,6 +423,8 @@ void __init ath79_register_wmac(u8 *cal_ + qca953x_wmac_setup(); + else if (soc_is_qca955x()) + qca955x_wmac_setup(); ++ else if (soc_is_qca956x() || soc_is_tp9343()) ++ qca956x_wmac_setup(); + else + BUG(); + +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -120,6 +120,8 @@ static void prom_putchar_init(void) + case REV_ID_MAJOR_QCA9533_V2: + case REV_ID_MAJOR_QCA9556: + case REV_ID_MAJOR_QCA9558: ++ case REV_ID_MAJOR_TP9343: ++ case REV_ID_MAJOR_QCA956X: + _prom_putchar = prom_putchar_ar71xx; + break; + +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -31,7 +31,10 @@ static void __iomem *ath79_gpio_get_func + soc_is_ar913x() || + soc_is_ar933x()) + reg = AR71XX_GPIO_REG_FUNC; +- else if (soc_is_ar934x() || soc_is_qca953x()) ++ else if (soc_is_ar934x() || ++ soc_is_qca953x() || ++ soc_is_qca956x() || ++ soc_is_tp9343()) + reg = AR934X_GPIO_REG_FUNC; + else + BUG(); +@@ -64,7 +67,7 @@ void __init ath79_gpio_output_select(uns + unsigned int reg; + u32 t, s; + +- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x()); ++ BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); + + if (gpio >= AR934X_GPIO_COUNT) + return; +--- a/arch/mips/ath79/irq.c ++++ b/arch/mips/ath79/irq.c +@@ -156,6 +156,87 @@ static void qca955x_irq_init(void) + irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); + } + ++static void qca956x_ip2_irq_dispatch(struct irq_desc *desc) ++{ ++ u32 status; ++ ++ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); ++ status &= QCA956X_EXT_INT_PCIE_RC1_ALL | QCA956X_EXT_INT_WMAC_ALL; ++ ++ if (status == 0) { ++ spurious_interrupt(); ++ return; ++ } ++ ++ if (status & QCA956X_EXT_INT_PCIE_RC1_ALL) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP2_IRQ(0)); ++ } ++ ++ if (status & QCA956X_EXT_INT_WMAC_ALL) { ++ /* TODO: flsuh DDR? */ ++ generic_handle_irq(ATH79_IP2_IRQ(1)); ++ } ++} ++ ++static void qca956x_ip3_irq_dispatch(struct irq_desc *desc) ++{ ++ u32 status; ++ ++ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); ++ status &= QCA956X_EXT_INT_PCIE_RC2_ALL | ++ QCA956X_EXT_INT_USB1 | QCA956X_EXT_INT_USB2; ++ ++ if (status == 0) { ++ spurious_interrupt(); ++ return; ++ } ++ ++ if (status & QCA956X_EXT_INT_USB1) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP3_IRQ(0)); ++ } ++ ++ if (status & QCA956X_EXT_INT_USB2) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP3_IRQ(1)); ++ } ++ ++ if (status & QCA956X_EXT_INT_PCIE_RC2_ALL) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP3_IRQ(2)); ++ } ++} ++ ++static void qca956x_enable_timer_cb(void) { ++ u32 misc; ++ ++ misc = ath79_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); ++ misc |= MISC_INT_MIPS_SI_TIMERINT_MASK; ++ ath79_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, misc); ++} ++ ++static void qca956x_irq_init(void) ++{ ++ int i; ++ ++ for (i = ATH79_IP2_IRQ_BASE; ++ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) ++ irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); ++ ++ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch); ++ ++ for (i = ATH79_IP3_IRQ_BASE; ++ i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) ++ irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); ++ ++ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); ++ ++ /* QCA956x timer init workaround has to be applied right before setting ++ * up the clock. Else, there will be no jiffies */ ++ late_time_init = &qca956x_enable_timer_cb; ++} ++ + void __init arch_init_irq(void) + { + unsigned irq_wb_chan2 = -1; +@@ -183,7 +264,9 @@ void __init arch_init_irq(void) + soc_is_ar933x() || + soc_is_ar934x() || + soc_is_qca953x() || +- soc_is_qca955x()) ++ soc_is_qca955x() || ++ soc_is_qca956x() || ++ soc_is_tp9343()) + misc_is_ar71xx = false; + else + BUG(); +@@ -197,4 +280,6 @@ void __init arch_init_irq(void) + qca953x_irq_init(); + else if (soc_is_qca955x()) + qca955x_irq_init(); ++ else if (soc_is_qca956x() || soc_is_tp9343()) ++ qca956x_irq_init(); + } +--- a/arch/mips/ath79/pci.c ++++ b/arch/mips/ath79/pci.c +@@ -68,6 +68,21 @@ static const struct ath79_pci_irq qca955 + }, + }; + ++static const struct ath79_pci_irq qca956x_pci_irq_map[] __initconst = { ++ { ++ .bus = 0, ++ .slot = 0, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(0), ++ }, ++ { ++ .bus = 1, ++ .slot = 0, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(1), ++ }, ++}; ++ + int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) + { + int irq = -1; +@@ -86,6 +101,9 @@ int __init pcibios_map_irq(const struct + } else if (soc_is_qca955x()) { + ath79_pci_irq_map = qca955x_pci_irq_map; + ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); ++ } else if (soc_is_qca956x()) { ++ ath79_pci_irq_map = qca956x_pci_irq_map; ++ ath79_pci_nr_irqs = ARRAY_SIZE(qca956x_pci_irq_map); + } else { + pr_crit("pci %s: invalid irq map\n", + pci_name((struct pci_dev *) dev)); +@@ -303,6 +321,15 @@ int __init ath79_register_pci(void) + QCA955X_PCI_MEM_SIZE, + 1, + ATH79_IP3_IRQ(2)); ++ } else if (soc_is_qca956x()) { ++ pdev = ath79_register_pci_ar724x(0, ++ QCA956X_PCI_CFG_BASE1, ++ QCA956X_PCI_CTRL_BASE1, ++ QCA956X_PCI_CRP_BASE1, ++ QCA956X_PCI_MEM_BASE1, ++ QCA956X_PCI_MEM_SIZE, ++ 1, ++ ATH79_IP3_IRQ(2)); + } else { + /* No PCI support */ + return -ENODEV; +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -176,6 +176,18 @@ static void __init ath79_detect_sys_type + rev = id & QCA955X_REV_ID_REVISION_MASK; + break; + ++ case REV_ID_MAJOR_QCA956X: ++ ath79_soc = ATH79_SOC_QCA956X; ++ chip = "956X"; ++ rev = id & QCA956X_REV_ID_REVISION_MASK; ++ break; ++ ++ case REV_ID_MAJOR_TP9343: ++ ath79_soc = ATH79_SOC_TP9343; ++ chip = "9343"; ++ rev = id & QCA956X_REV_ID_REVISION_MASK; ++ break; ++ + default: + panic("ath79: unknown SoC, id:0x%08x", id); + } +@@ -183,9 +195,12 @@ static void __init ath79_detect_sys_type + if (ver == 1) + ath79_soc_rev = rev; + +- if (soc_is_qca953x() || soc_is_qca955x()) ++ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca956x()) + sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", + chip, ver, rev); ++ else if (soc_is_tp9343()) ++ sprintf(ath79_sys_type, "Qualcomm Atheros TP%s rev %u", ++ chip, rev); + else + sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); + pr_info("SoC: %s\n", ath79_sys_type); +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -143,6 +143,23 @@ + #define QCA955X_NFC_BASE 0x1b800200 + #define QCA955X_NFC_SIZE 0xb8 + ++#define QCA956X_PCI_MEM_BASE1 0x12000000 ++#define QCA956X_PCI_MEM_SIZE 0x02000000 ++#define QCA956X_PCI_CFG_BASE1 0x16000000 ++#define QCA956X_PCI_CFG_SIZE 0x1000 ++#define QCA956X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000) ++#define QCA956X_PCI_CRP_SIZE 0x1000 ++#define QCA956X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) ++#define QCA956X_PCI_CTRL_SIZE 0x100 ++ ++#define QCA956X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) ++#define QCA956X_WMAC_SIZE 0x20000 ++#define QCA956X_EHCI0_BASE 0x1b000000 ++#define QCA956X_EHCI1_BASE 0x1b400000 ++#define QCA956X_EHCI_SIZE 0x200 ++#define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define QCA956X_GMAC_SIZE 0x64 ++ + #define AR9300_OTP_BASE 0x14000 + #define AR9300_OTP_STATUS 0x15f18 + #define AR9300_OTP_STATUS_TYPE 0x7 +@@ -152,6 +169,13 @@ + #define AR9300_OTP_READ_DATA 0x15f1c + + /* ++ * Hidden Registers ++ */ ++#define QCA956X_DAM_RESET_OFFSET 0xb90001bc ++#define QCA956X_DAM_RESET_SIZE 0x4 ++#define QCA956X_INLINE_CHKSUM_ENG BIT(27) ++ ++/* + * DDR_CTRL block + */ + #define AR71XX_DDR_REG_PCI_WIN0 0x7c +@@ -385,6 +409,49 @@ + #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) + #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA956X_PLL_CPU_CONFIG_REG 0x00 ++#define QCA956X_PLL_CPU_CONFIG1_REG 0x04 ++#define QCA956X_PLL_DDR_CONFIG_REG 0x08 ++#define QCA956X_PLL_DDR_CONFIG1_REG 0x0c ++#define QCA956X_PLL_CLK_CTRL_REG 0x10 ++ ++#define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 ++#define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f ++#define QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 ++#define QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT 0 ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK 0x1f ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT 5 ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x1fff ++#define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT 18 ++#define QCA956X_PLL_CPU_CONFIG1_NINT_MASK 0x1ff ++ ++#define QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 ++#define QCA956X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f ++#define QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 ++#define QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT 0 ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK 0x1f ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT 5 ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x1fff ++#define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT 18 ++#define QCA956X_PLL_DDR_CONFIG1_NINT_MASK 0x1ff ++ ++#define QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) ++#define QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) ++#define QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) ++#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 ++#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f ++#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 ++#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f ++#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 ++#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f ++#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL BIT(20) ++#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) ++#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) ++ + /* + * USB_CONFIG block + */ +@@ -432,6 +499,11 @@ + #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 + #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac + ++#define QCA956X_RESET_REG_RESET_MODULE 0x1c ++#define QCA956X_RESET_REG_BOOTSTRAP 0xb0 ++#define QCA956X_RESET_REG_EXT_INT_STATUS 0xac ++ ++#define MISC_INT_MIPS_SI_TIMERINT_MASK BIT(28) + #define MISC_INT_ETHSW BIT(12) + #define MISC_INT_TIMER4 BIT(10) + #define MISC_INT_TIMER3 BIT(9) +@@ -606,6 +678,8 @@ + + #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) + ++#define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2) ++ + #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) + #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) + #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) +@@ -673,6 +747,37 @@ + QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \ + QCA955X_EXT_INT_PCIE_RC2_INT3) + ++#define QCA956X_EXT_INT_WMAC_MISC BIT(0) ++#define QCA956X_EXT_INT_WMAC_TX BIT(1) ++#define QCA956X_EXT_INT_WMAC_RXLP BIT(2) ++#define QCA956X_EXT_INT_WMAC_RXHP BIT(3) ++#define QCA956X_EXT_INT_PCIE_RC1 BIT(4) ++#define QCA956X_EXT_INT_PCIE_RC1_INT0 BIT(5) ++#define QCA956X_EXT_INT_PCIE_RC1_INT1 BIT(6) ++#define QCA956X_EXT_INT_PCIE_RC1_INT2 BIT(7) ++#define QCA956X_EXT_INT_PCIE_RC1_INT3 BIT(8) ++#define QCA956X_EXT_INT_PCIE_RC2 BIT(12) ++#define QCA956X_EXT_INT_PCIE_RC2_INT0 BIT(13) ++#define QCA956X_EXT_INT_PCIE_RC2_INT1 BIT(14) ++#define QCA956X_EXT_INT_PCIE_RC2_INT2 BIT(15) ++#define QCA956X_EXT_INT_PCIE_RC2_INT3 BIT(16) ++#define QCA956X_EXT_INT_USB1 BIT(24) ++#define QCA956X_EXT_INT_USB2 BIT(28) ++ ++#define QCA956X_EXT_INT_WMAC_ALL \ ++ (QCA956X_EXT_INT_WMAC_MISC | QCA956X_EXT_INT_WMAC_TX | \ ++ QCA956X_EXT_INT_WMAC_RXLP | QCA956X_EXT_INT_WMAC_RXHP) ++ ++#define QCA956X_EXT_INT_PCIE_RC1_ALL \ ++ (QCA956X_EXT_INT_PCIE_RC1 | QCA956X_EXT_INT_PCIE_RC1_INT0 | \ ++ QCA956X_EXT_INT_PCIE_RC1_INT1 | QCA956X_EXT_INT_PCIE_RC1_INT2 | \ ++ QCA956X_EXT_INT_PCIE_RC1_INT3) ++ ++#define QCA956X_EXT_INT_PCIE_RC2_ALL \ ++ (QCA956X_EXT_INT_PCIE_RC2 | QCA956X_EXT_INT_PCIE_RC2_INT0 | \ ++ QCA956X_EXT_INT_PCIE_RC2_INT1 | QCA956X_EXT_INT_PCIE_RC2_INT2 | \ ++ QCA956X_EXT_INT_PCIE_RC2_INT3) ++ + #define REV_ID_MAJOR_MASK 0xfff0 + #define REV_ID_MAJOR_AR71XX 0x00a0 + #define REV_ID_MAJOR_AR913X 0x00b0 +@@ -688,6 +793,8 @@ + #define REV_ID_MAJOR_QCA9533_V2 0x0160 + #define REV_ID_MAJOR_QCA9556 0x0130 + #define REV_ID_MAJOR_QCA9558 0x1130 ++#define REV_ID_MAJOR_TP9343 0x0150 ++#define REV_ID_MAJOR_QCA956X 0x1150 + + #define AR71XX_REV_ID_MINOR_MASK 0x3 + #define AR71XX_REV_ID_MINOR_AR7130 0x0 +@@ -712,6 +819,8 @@ + + #define QCA955X_REV_ID_REVISION_MASK 0xf + ++#define QCA956X_REV_ID_REVISION_MASK 0xf ++ + /* + * SPI block + */ +@@ -784,6 +893,19 @@ + #define QCA955X_GPIO_REG_OUT_FUNC5 0x40 + #define QCA955X_GPIO_REG_FUNC 0x6c + ++#define QCA956X_GPIO_REG_OUT_FUNC0 0x2c ++#define QCA956X_GPIO_REG_OUT_FUNC1 0x30 ++#define QCA956X_GPIO_REG_OUT_FUNC2 0x34 ++#define QCA956X_GPIO_REG_OUT_FUNC3 0x38 ++#define QCA956X_GPIO_REG_OUT_FUNC4 0x3c ++#define QCA956X_GPIO_REG_OUT_FUNC5 0x40 ++#define QCA956X_GPIO_REG_IN_ENABLE0 0x44 ++#define QCA956X_GPIO_REG_IN_ENABLE3 0x50 ++#define QCA956X_GPIO_REG_FUNC 0x6c ++ ++#define QCA956X_GPIO_OUT_MUX_GE0_MDO 32 ++#define QCA956X_GPIO_OUT_MUX_GE0_MDC 33 ++ + #define AR71XX_GPIO_COUNT 16 + #define AR7240_GPIO_COUNT 18 + #define AR7241_GPIO_COUNT 20 +@@ -792,6 +914,7 @@ + #define AR934X_GPIO_COUNT 23 + #define QCA953X_GPIO_COUNT 18 + #define QCA955X_GPIO_COUNT 24 ++#define QCA956X_GPIO_COUNT 23 + + /* + * SRIF block +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -35,6 +35,8 @@ enum ath79_soc_type { + ATH79_SOC_QCA9533, + ATH79_SOC_QCA9556, + ATH79_SOC_QCA9558, ++ ATH79_SOC_TP9343, ++ ATH79_SOC_QCA956X, + }; + + extern enum ath79_soc_type ath79_soc; +@@ -126,6 +128,26 @@ static inline int soc_is_qca955x(void) + return soc_is_qca9556() || soc_is_qca9558(); + } + ++static inline int soc_is_tp9343(void) ++{ ++ return ath79_soc == ATH79_SOC_TP9343; ++} ++ ++static inline int soc_is_qca9561(void) ++{ ++ return ath79_soc == ATH79_SOC_QCA956X; ++} ++ ++static inline int soc_is_qca9563(void) ++{ ++ return ath79_soc == ATH79_SOC_QCA956X; ++} ++ ++static inline int soc_is_qca956x(void) ++{ ++ return soc_is_qca9561() || soc_is_qca9563(); ++} ++ + void ath79_ddr_wb_flush(unsigned int reg); + void ath79_ddr_set_pci_windows(void); + diff --git a/target/linux/ar71xx/patches-4.9/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.9/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch new file mode 100644 index 000000000..cab2f6f9c --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch @@ -0,0 +1,38 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -157,6 +157,10 @@ + #define QCA956X_EHCI0_BASE 0x1b000000 + #define QCA956X_EHCI1_BASE 0x1b400000 + #define QCA956X_EHCI_SIZE 0x200 ++#define QCA956X_GMAC_SGMII_BASE (AR71XX_APB_BASE + 0x00070000) ++#define QCA956X_GMAC_SGMII_SIZE 0x64 ++#define QCA956X_PLL_BASE (AR71XX_APB_BASE + 0x00050000) ++#define QCA956X_PLL_SIZE 0x50 + #define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) + #define QCA956X_GMAC_SIZE 0x64 + +@@ -414,6 +418,7 @@ + #define QCA956X_PLL_DDR_CONFIG_REG 0x08 + #define QCA956X_PLL_DDR_CONFIG1_REG 0x0c + #define QCA956X_PLL_CLK_CTRL_REG 0x10 ++#define QCA956X_PLL_ETH_XMII_CONTROL_REG 0x30 + + #define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 + #define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f +@@ -1196,4 +1201,16 @@ + #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 + #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 + ++/* ++ * QCA956X GMAC Interface ++ */ ++ ++#define QCA956X_GMAC_REG_ETH_CFG 0x00 ++ ++#define QCA956X_ETH_CFG_SW_ONLY_MODE BIT(7) ++#define QCA956X_ETH_CFG_SW_PHY_SWAP BIT(8) ++#define QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(9) ++#define QCA956X_ETH_CFG_SW_APB_ACCESS BIT(10) ++#define QCA956X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) ++ + #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch b/target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch new file mode 100644 index 000000000..2b92b88d0 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch @@ -0,0 +1,106 @@ +--- a/arch/mips/ath79/irq.c ++++ b/arch/mips/ath79/irq.c +@@ -27,6 +27,9 @@ + #include "machtypes.h" + + ++static struct irq_chip ip2_chip; ++static struct irq_chip ip3_chip; ++ + static void ar934x_ip2_irq_dispatch(struct irq_desc *desc) + { + u32 status; +@@ -50,8 +53,7 @@ static void ar934x_ip2_irq_init(void) + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); + } +@@ -79,7 +81,7 @@ static void qca953x_irq_init(void) + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); + } +@@ -143,15 +145,13 @@ static void qca955x_irq_init(void) + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch); + + for (i = ATH79_IP3_IRQ_BASE; + i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); ++ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); + } +@@ -222,13 +222,13 @@ static void qca956x_irq_init(void) + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch); + + for (i = ATH79_IP3_IRQ_BASE; + i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); ++ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); + +@@ -237,12 +237,40 @@ static void qca956x_irq_init(void) + late_time_init = &qca956x_enable_timer_cb; + } + ++static void ath79_ip2_disable(struct irq_data *data) ++{ ++ disable_irq(ATH79_CPU_IRQ(2)); ++} ++ ++static void ath79_ip2_enable(struct irq_data *data) ++{ ++ enable_irq(ATH79_CPU_IRQ(2)); ++} ++ ++static void ath79_ip3_disable(struct irq_data *data) ++{ ++ disable_irq(ATH79_CPU_IRQ(3)); ++} ++ ++static void ath79_ip3_enable(struct irq_data *data) ++{ ++ enable_irq(ATH79_CPU_IRQ(3)); ++} ++ + void __init arch_init_irq(void) + { + unsigned irq_wb_chan2 = -1; + unsigned irq_wb_chan3 = -1; + bool misc_is_ar71xx; + ++ ip2_chip = dummy_irq_chip; ++ ip2_chip.irq_disable = ath79_ip2_disable; ++ ip2_chip.irq_enable = ath79_ip2_enable; ++ ++ ip3_chip = dummy_irq_chip; ++ ip3_chip.irq_disable = ath79_ip3_disable; ++ ip3_chip.irq_enable = ath79_ip3_enable; ++ + if (mips_machtype == ATH79_MACH_GENERIC_OF) { + irqchip_init(); + return; diff --git a/target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch b/target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch new file mode 100644 index 000000000..29f7f3d0a --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch @@ -0,0 +1,24 @@ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -411,6 +411,11 @@ void __init ath79_wmac_set_ext_lna_gpio( + ar934x_set_ext_lna_gpio(chain, gpio); + } + ++void __init ath79_wmac_set_led_pin(int gpio) ++{ ++ ath79_wmac_data.led_pin = gpio; ++} ++ + void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) +--- a/arch/mips/ath79/dev-wmac.h ++++ b/arch/mips/ath79/dev-wmac.h +@@ -18,6 +18,7 @@ void ath79_wmac_disable_2ghz(void); + void ath79_wmac_disable_5ghz(void); + void ath79_wmac_set_tx_gain_buffalo(void); + void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio); ++void ath79_wmac_set_led_pin(int gpio); + + bool ar93xx_wmac_read_mac_address(u8 *dest); + diff --git a/target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch b/target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch new file mode 100644 index 000000000..4cf36325e --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/632-MIPS-ath79-gpio-enable-set-direction.patch @@ -0,0 +1,32 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -28,6 +28,7 @@ void ath79_gpio_function_enable(u32 mask + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); + void ath79_gpio_output_select(unsigned gpio, u8 val); ++int ath79_gpio_direction_select(unsigned gpio, bool oe); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -83,3 +83,19 @@ void __init ath79_gpio_output_select(uns + /* flush write */ + (void) __raw_readl(base + reg); + } ++ ++int ath79_gpio_direction_select(unsigned gpio, bool oe) ++{ ++ void __iomem *base = ath79_gpio_base; ++ bool ieq_1 = (soc_is_ar934x() || ++ soc_is_qca953x()); ++ ++ if ((ieq_1 && oe) || (!ieq_1 && !oe)) ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ else ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ ++ return 0; ++} diff --git a/target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch b/target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch new file mode 100644 index 000000000..d7f4536ba --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch @@ -0,0 +1,82 @@ +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -38,7 +38,7 @@ unsigned int ath79_soc_rev; + void __iomem *ath79_pll_base; + void __iomem *ath79_reset_base; + EXPORT_SYMBOL_GPL(ath79_reset_base); +-static void __iomem *ath79_ddr_base; ++void __iomem *ath79_ddr_base; + static void __iomem *ath79_ddr_wb_flush_base; + static void __iomem *ath79_ddr_pci_win_base; + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -32,7 +32,7 @@ + #define AR71XX_SPI_SIZE 0x01000000 + + #define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000) +-#define AR71XX_DDR_CTRL_SIZE 0x100 ++#define AR71XX_DDR_CTRL_SIZE 0x200 + #define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000) + #define AR71XX_UART_SIZE 0x100 + #define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) +@@ -229,6 +229,9 @@ + #define QCA953X_DDR_REG_FLUSH_PCIE 0xa8 + #define QCA953X_DDR_REG_FLUSH_WMAC 0xac + ++#define QCA955X_DDR_CTL_CONFIG 0x108 ++#define QCA955X_DDR_CTL_CONFIG_ACT_WMAC BIT(23) ++ + /* + * PLL block + */ +--- a/arch/mips/ath79/dev-wmac.c ++++ b/arch/mips/ath79/dev-wmac.c +@@ -170,6 +170,27 @@ static void qca953x_wmac_setup(void) + ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; + } + ++static int ar955x_wmac_reset(void) ++{ ++ int i; ++ ++ /* Try to wait for WMAC DDR activity to stop */ ++ for (i = 0; i < 10; i++) { ++ if (!(__raw_readl(ath79_ddr_base + QCA955X_DDR_CTL_CONFIG) & ++ QCA955X_DDR_CTL_CONFIG_ACT_WMAC)) ++ break; ++ ++ udelay(10); ++ } ++ ++ ath79_device_reset_set(QCA955X_RESET_RTC); ++ udelay(10); ++ ath79_device_reset_clear(QCA955X_RESET_RTC); ++ udelay(10); ++ ++ return 0; ++} ++ + static void qca955x_wmac_setup(void) + { + u32 t; +@@ -186,6 +207,8 @@ static void qca955x_wmac_setup(void) + ath79_wmac_data.is_clk_25mhz = false; + else + ath79_wmac_data.is_clk_25mhz = true; ++ ++ ath79_wmac_data.external_reset = ar955x_wmac_reset; + } + + #define AR93XX_WMAC_SIZE \ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -19,6 +19,8 @@ + #define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024) + #define ATH79_MEM_SIZE_MAX (256 * 1024 * 1024) + ++extern void __iomem *ath79_ddr_base; ++ + void ath79_clocks_init(void); + unsigned long ath79_get_sys_clk_rate(const char *id); + diff --git a/target/linux/ar71xx/patches-4.9/700-MIPS-ath79-add-openwrt-Kconfig.patch b/target/linux/ar71xx/patches-4.9/700-MIPS-ath79-add-openwrt-Kconfig.patch new file mode 100644 index 000000000..5d4b18000 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/700-MIPS-ath79-add-openwrt-Kconfig.patch @@ -0,0 +1,11 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -82,6 +82,8 @@ config ATH79_MACH_UBNT_XM + Say 'Y' here if you want your kernel to support the + Ubiquiti Networks XM (rev 1.0) board. + ++source "arch/mips/ath79/Kconfig.openwrt" ++ + endmenu + + config SOC_AR71XX diff --git a/target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch b/target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch new file mode 100644 index 000000000..cd91ac3c0 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch @@ -0,0 +1,30 @@ +--- a/arch/mips/ath79/prom.c ++++ b/arch/mips/ath79/prom.c +@@ -136,6 +136,27 @@ void __init prom_init(void) + initrd_end = initrd_start + fw_getenvl("initrd_size"); + } + #endif ++ ++ if (strstr(arcs_cmdline, "board=750Gr3") || ++ strstr(arcs_cmdline, "board=750i") || ++ strstr(arcs_cmdline, "board=750-hb") || ++ strstr(arcs_cmdline, "board=411") || ++ strstr(arcs_cmdline, "board=433") || ++ strstr(arcs_cmdline, "board=435") || ++ strstr(arcs_cmdline, "board=450") || ++ strstr(arcs_cmdline, "board=493") || ++ strstr(arcs_cmdline, "board=951G") || ++ strstr(arcs_cmdline, "board=H951L") || ++ strstr(arcs_cmdline, "board=952-hb") || ++ strstr(arcs_cmdline, "board=953gs") || ++ strstr(arcs_cmdline, "board=962") || ++ strstr(arcs_cmdline, "board=lhg") || ++ strstr(arcs_cmdline, "board=map-hb") || ++ strstr(arcs_cmdline, "board=2011L") || ++ strstr(arcs_cmdline, "board=2011r") || ++ strstr(arcs_cmdline, "board=711Gr100") || ++ strstr(arcs_cmdline, "board=922gs")) ++ ath79_prom_append_cmdline("console", "ttyS0,115200"); + } + + void __init prom_free_prom_memory(void) diff --git a/target/linux/ar71xx/patches-4.9/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.9/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch new file mode 100644 index 000000000..a65f7d993 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch @@ -0,0 +1,38 @@ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -33,6 +33,7 @@ static void __iomem *ath79_gpio_get_func + reg = AR71XX_GPIO_REG_FUNC; + else if (soc_is_ar934x() || + soc_is_qca953x() || ++ soc_is_qca955x() || + soc_is_qca956x() || + soc_is_tp9343()) + reg = AR934X_GPIO_REG_FUNC; +@@ -64,15 +65,21 @@ void ath79_gpio_function_disable(u32 mas + void __init ath79_gpio_output_select(unsigned gpio, u8 val) + { + void __iomem *base = ath79_gpio_base; +- unsigned int reg; ++ unsigned int reg, reg_base; + u32 t, s; + +- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); +- +- if (gpio >= AR934X_GPIO_COUNT) +- return; ++ if (soc_is_ar934x()) ++ reg_base = AR934X_GPIO_REG_OUT_FUNC0; ++ else if (soc_is_qca953x()) ++ reg_base = QCA953X_GPIO_REG_OUT_FUNC0; ++ else if (soc_is_qca955x()) ++ reg_base = QCA955X_GPIO_REG_OUT_FUNC0; ++ else if (soc_is_qca956x()) ++ reg_base = QCA956X_GPIO_REG_OUT_FUNC0; ++ else ++ BUG(); + +- reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); ++ reg = reg_base + 4 * (gpio / 4); + s = 8 * (gpio % 4); + + t = __raw_readl(base + reg); diff --git a/target/linux/ar71xx/patches-4.9/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.9/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch new file mode 100644 index 000000000..a57351efd --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/ath79/pci.c ++++ b/arch/mips/ath79/pci.c +@@ -53,6 +53,15 @@ static const struct ath79_pci_irq ar724x + } + }; + ++static const struct ath79_pci_irq qca953x_pci_irq_map[] __initconst = { ++ { ++ .bus = 0, ++ .slot = 0, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(0), ++ }, ++}; ++ + static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = { + { + .bus = 0, +@@ -98,6 +107,9 @@ int __init pcibios_map_irq(const struct + soc_is_ar9344()) { + ath79_pci_irq_map = ar724x_pci_irq_map; + ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); ++ } else if (soc_is_qca953x()) { ++ ath79_pci_irq_map = qca953x_pci_irq_map; ++ ath79_pci_nr_irqs = ARRAY_SIZE(qca953x_pci_irq_map); + } else if (soc_is_qca955x()) { + ath79_pci_irq_map = qca955x_pci_irq_map; + ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); +@@ -303,6 +315,15 @@ int __init ath79_register_pci(void) + AR724X_PCI_MEM_SIZE, + 0, + ATH79_IP2_IRQ(0)); ++ } else if (soc_is_qca9533()) { ++ pdev = ath79_register_pci_ar724x(0, ++ QCA953X_PCI_CFG_BASE0, ++ QCA953X_PCI_CTRL_BASE0, ++ QCA953X_PCI_CRP_BASE0, ++ QCA953X_PCI_MEM_BASE0, ++ QCA953X_PCI_MEM_SIZE, ++ 0, ++ ATH79_IP2_IRQ(0)); + } else if (soc_is_qca9558()) { + pdev = ath79_register_pci_ar724x(0, + QCA955X_PCI_CFG_BASE0, diff --git a/target/linux/ar71xx/patches-4.9/818-MIPS-ath79-add-nu801-led-driver.patch b/target/linux/ar71xx/patches-4.9/818-MIPS-ath79-add-nu801-led-driver.patch new file mode 100644 index 000000000..337447e2b --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/818-MIPS-ath79-add-nu801-led-driver.patch @@ -0,0 +1,26 @@ +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -606,6 +606,13 @@ config LEDS_IS31FL32XX + + comment "LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)" + ++config LEDS_NU801 ++ tristate "LED driver for NU801 RGB LED" ++ depends on LEDS_CLASS && (ATH79_MACH_MR18 || ATH79_MACH_Z1) ++ help ++ This option enables support for NU801 RGB LED driver chips ++ accessed via GPIO. ++ + config LEDS_BLINKM + tristate "LED support for the BlinkM I2C RGB LED" + depends on LEDS_CLASS +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -56,6 +56,7 @@ obj-$(CONFIG_LEDS_ADP5520) += leds-adp5 + obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o + obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o + obj-$(CONFIG_LEDS_RB750) += leds-rb750.o ++obj-$(CONFIG_LEDS_NU801) += leds-nu801.o + obj-$(CONFIG_LEDS_NS2) += leds-ns2.o + obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o + obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o diff --git a/target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch b/target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch new file mode 100644 index 000000000..afa7b69b4 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch @@ -0,0 +1,67 @@ +Add access to the function2 gpio register. This probably has to be +converted into a pimux driver later on. This is needed for some setup +functions on the Arduino Yun. + +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -29,6 +29,7 @@ void ath79_ddr_ctrl_init(void); + void ath79_gpio_function_enable(u32 mask); + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); ++void ath79_gpio_function2_setup(u32 set, u32 clear); + void ath79_gpio_output_select(unsigned gpio, u8 val); + int ath79_gpio_direction_select(unsigned gpio, bool oe); + void ath79_gpio_init(void); +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -43,6 +43,31 @@ static void __iomem *ath79_gpio_get_func + return ath79_gpio_base + reg; + } + ++static void __iomem *ath79_gpio_get_function2_reg(void) ++{ ++ u32 reg = 0; ++ ++ if (soc_is_ar71xx() || ++ soc_is_ar724x() || ++ soc_is_ar913x() || ++ soc_is_ar933x()) ++ reg = AR71XX_GPIO_REG_FUNC_2; ++ else ++ BUG(); ++ ++ return ath79_gpio_base + reg; ++} ++ ++ ++void ath79_gpio_function2_setup(u32 set, u32 clear) ++{ ++ void __iomem *reg = ath79_gpio_get_function2_reg(); ++ ++ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); ++ /* flush write */ ++ __raw_readl(reg); ++} ++ + void ath79_gpio_function_setup(u32 set, u32 clear) + { + void __iomem *reg = ath79_gpio_get_function_reg(); +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -865,6 +865,7 @@ + #define AR71XX_GPIO_REG_INT_PENDING 0x20 + #define AR71XX_GPIO_REG_INT_ENABLE 0x24 + #define AR71XX_GPIO_REG_FUNC 0x28 ++#define AR71XX_GPIO_REG_FUNC_2 0x30 + + #define AR934X_GPIO_REG_OUT_FUNC0 0x2c + #define AR934X_GPIO_REG_OUT_FUNC1 0x30 +@@ -989,6 +990,8 @@ + #define AR724X_GPIO_FUNC_UART_EN BIT(1) + #define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) + ++#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9) ++ + #define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22) + #define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) + #define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20) diff --git a/target/linux/ar71xx/patches-4.9/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ar71xx/patches-4.9/900-mdio_bitbang_ignore_ta_value.patch new file mode 100644 index 000000000..8f8f349a6 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/900-mdio_bitbang_ignore_ta_value.patch @@ -0,0 +1,32 @@ +--- a/drivers/net/phy/mdio-bitbang.c ++++ b/drivers/net/phy/mdio-bitbang.c +@@ -155,7 +155,7 @@ static int mdiobb_cmd_addr(struct mdiobb + static int mdiobb_read(struct mii_bus *bus, int phy, int reg) + { + struct mdiobb_ctrl *ctrl = bus->priv; +- int ret, i; ++ int ret; + + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); +@@ -165,19 +165,7 @@ static int mdiobb_read(struct mii_bus *b + + ctrl->ops->set_mdio_dir(ctrl, 0); + +- /* check the turnaround bit: the PHY should be driving it to zero, if this +- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that +- */ +- if (mdiobb_get_bit(ctrl) != 0 && +- !(bus->phy_ignore_ta_mask & (1 << phy))) { +- /* PHY didn't drive TA low -- flush any bits it +- * may be trying to send. +- */ +- for (i = 0; i < 32; i++) +- mdiobb_get_bit(ctrl); +- +- return 0xffff; +- } ++ mdiobb_get_bit(ctrl); + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); diff --git a/target/linux/ar71xx/patches-4.9/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ar71xx/patches-4.9/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch new file mode 100644 index 000000000..a830346a3 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch @@ -0,0 +1,61 @@ +From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 16 Jun 2015 13:15:08 +0200 +Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command + +It seems some phys have some maximum timings for accessing the MDIO line, +resulting in bit errors under cpu stress. Prevent this from happening by +disabling interrupts when sending commands. + +Signed-off-by: Jonas Gorski +--- + drivers/net/phy/mdio-bitbang.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/net/phy/mdio-bitbang.c ++++ b/drivers/net/phy/mdio-bitbang.c +@@ -17,6 +17,7 @@ + * kind, whether express or implied. + */ + ++#include + #include + #include + #include +@@ -156,7 +157,9 @@ static int mdiobb_read(struct mii_bus *b + { + struct mdiobb_ctrl *ctrl = bus->priv; + int ret; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); +@@ -169,13 +172,17 @@ static int mdiobb_read(struct mii_bus *b + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return ret; + } + + static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) + { + struct mdiobb_ctrl *ctrl = bus->priv; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); +@@ -190,6 +197,8 @@ static int mdiobb_write(struct mii_bus * + + ctrl->ops->set_mdio_dir(ctrl, 0); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return 0; + } + diff --git a/target/linux/ar71xx/patches-4.9/902-at803x-add-reset-gpio-pdata.patch b/target/linux/ar71xx/patches-4.9/902-at803x-add-reset-gpio-pdata.patch new file mode 100644 index 000000000..cb3ed89e9 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/902-at803x-add-reset-gpio-pdata.patch @@ -0,0 +1,68 @@ +Add support for configuring AT803x GPIO reset via platform data. +This is necessary, because ath79 is not converted to device tree yet. + +Signed-off-by: Felix Fietkau + +--- a/include/linux/platform_data/phy-at803x.h ++++ b/include/linux/platform_data/phy-at803x.h +@@ -6,6 +6,8 @@ struct at803x_platform_data { + int enable_rgmii_tx_delay:1; + int enable_rgmii_rx_delay:1; + int fixup_rgmii_tx_delay:1; ++ int has_reset_gpio:1; ++ int reset_gpio; + }; + + #endif /* _PHY_AT803X_PDATA_H */ +--- a/drivers/net/phy/at803x.c ++++ b/drivers/net/phy/at803x.c +@@ -264,6 +264,7 @@ static int at803x_resume(struct phy_devi + + static int at803x_probe(struct phy_device *phydev) + { ++ struct at803x_platform_data *pdata; + struct device *dev = &phydev->mdio.dev; + struct at803x_priv *priv; + struct gpio_desc *gpiod_reset; +@@ -276,6 +277,12 @@ static int at803x_probe(struct phy_devic + phydev->drv->phy_id != ATH8032_PHY_ID) + goto does_not_require_reset_workaround; + ++ pdata = dev_get_platdata(dev); ++ if (pdata && pdata->has_reset_gpio) { ++ devm_gpio_request(dev, pdata->reset_gpio, "reset"); ++ gpio_direction_output(pdata->reset_gpio, 1); ++ } ++ + gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_reset)) + return PTR_ERR(gpiod_reset); +@@ -407,15 +414,23 @@ static void at803x_link_change_notify(st + * cannot recover from by software. + */ + if (phydev->state == PHY_NOLINK) { +- if (priv->gpiod_reset && !priv->phy_reset) { ++ if ((priv->gpiod_reset || (pdata && pdata->has_reset_gpio)) && ++ !priv->phy_reset) { + struct at803x_context context; + + at803x_context_save(phydev, &context); + +- gpiod_set_value(priv->gpiod_reset, 1); +- msleep(1); +- gpiod_set_value(priv->gpiod_reset, 0); +- msleep(1); ++ if (pdata && pdata->has_reset_gpio) { ++ gpio_set_value_cansleep(pdata->reset_gpio, 0); ++ msleep(1); ++ gpio_set_value_cansleep(pdata->reset_gpio, 1); ++ msleep(1); ++ } else { ++ gpiod_set_value(priv->gpiod_reset, 1); ++ msleep(1); ++ gpiod_set_value(priv->gpiod_reset, 0); ++ msleep(1); ++ } + + at803x_context_restore(phydev, &context); + diff --git a/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch b/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch new file mode 100644 index 000000000..21ceca156 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch @@ -0,0 +1,888 @@ +--- a/arch/mips/include/asm/checksum.h ++++ b/arch/mips/include/asm/checksum.h +@@ -134,26 +134,30 @@ static inline __sum16 ip_fast_csum(const + const unsigned int *stop = word + ihl; + unsigned int csum; + int carry; ++ unsigned int w; + +- csum = word[0]; +- csum += word[1]; +- carry = (csum < word[1]); ++ csum = net_hdr_word(word++); ++ ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[2]; +- carry = (csum < word[2]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[3]; +- carry = (csum < word[3]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- word += 4; + do { +- csum += *word; +- carry = (csum < *word); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; +- word++; + } while (word != stop); + + return csum_fold(csum); +@@ -214,73 +218,6 @@ static inline __sum16 ip_compute_csum(co + return csum_fold(csum_partial(buff, len, 0)); + } + +-#define _HAVE_ARCH_IPV6_CSUM +-static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, +- const struct in6_addr *daddr, +- __u32 len, __u8 proto, +- __wsum sum) +-{ +- __wsum tmp; +- +- __asm__( +- " .set push # csum_ipv6_magic\n" +- " .set noreorder \n" +- " .set noat \n" +- " addu %0, %5 # proto (long in network byte order)\n" +- " sltu $1, %0, %5 \n" +- " addu %0, $1 \n" +- +- " addu %0, %6 # csum\n" +- " sltu $1, %0, %6 \n" +- " lw %1, 0(%2) # four words source address\n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 0(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " addu %0, $1 # Add final carry\n" +- " .set pop" +- : "=&r" (sum), "=&r" (tmp) +- : "r" (saddr), "r" (daddr), +- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); +- +- return csum_fold(sum); +-} +- + #include + #endif /* CONFIG_GENERIC_CSUM */ + +--- a/include/uapi/linux/ip.h ++++ b/include/uapi/linux/ip.h +@@ -102,7 +102,7 @@ struct iphdr { + __be32 saddr; + __be32 daddr; + /*The options start here. */ +-}; ++} __attribute__((packed, aligned(2))); + + + struct ip_auth_hdr { +--- a/include/uapi/linux/ipv6.h ++++ b/include/uapi/linux/ipv6.h +@@ -129,7 +129,7 @@ struct ipv6hdr { + + struct in6_addr saddr; + struct in6_addr daddr; +-}; ++} __attribute__((packed, aligned(2))); + + + /* index values for the variables in ipv6_devconf */ +--- a/include/uapi/linux/tcp.h ++++ b/include/uapi/linux/tcp.h +@@ -54,7 +54,7 @@ struct tcphdr { + __be16 window; + __sum16 check; + __be16 urg_ptr; +-}; ++} __attribute__((packed, aligned(2))); + + /* + * The union cast uses a gcc extension to avoid aliasing problems +@@ -64,7 +64,7 @@ struct tcphdr { + union tcp_word_hdr { + struct tcphdr hdr; + __be32 words[5]; +-}; ++} __attribute__((packed, aligned(2))); + + #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) + +--- a/include/uapi/linux/udp.h ++++ b/include/uapi/linux/udp.h +@@ -24,7 +24,7 @@ struct udphdr { + __be16 dest; + __be16 len; + __sum16 check; +-}; ++} __attribute__((packed, aligned(2))); + + /* UDP socket options */ + #define UDP_CORK 1 /* Never send partially complete segments */ +--- a/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c ++++ b/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c +@@ -41,8 +41,8 @@ static bool ipv4_pkt_to_tuple(const stru + if (ap == NULL) + return false; + +- tuple->src.u3.ip = ap[0]; +- tuple->dst.u3.ip = ap[1]; ++ tuple->src.u3.ip = net_hdr_word(ap++); ++ tuple->dst.u3.ip = net_hdr_word(ap); + + return true; + } +--- a/include/uapi/linux/icmp.h ++++ b/include/uapi/linux/icmp.h +@@ -81,7 +81,7 @@ struct icmphdr { + } frag; + __u8 reserved[4]; + } un; +-}; ++} __attribute__((packed, aligned(2))); + + + /* +--- a/include/uapi/linux/in6.h ++++ b/include/uapi/linux/in6.h +@@ -42,7 +42,7 @@ struct in6_addr { + #define s6_addr16 in6_u.u6_addr16 + #define s6_addr32 in6_u.u6_addr32 + #endif +-}; ++} __attribute__((packed, aligned(2))); + #endif /* __UAPI_DEF_IN6_ADDR */ + + #if __UAPI_DEF_SOCKADDR_IN6 +--- a/net/ipv6/tcp_ipv6.c ++++ b/net/ipv6/tcp_ipv6.c +@@ -39,6 +39,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -796,10 +797,10 @@ static void tcp_v6_send_response(const s + topt = (__be32 *)(t1 + 1); + + if (tsecr) { +- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); +- *topt++ = htonl(tsval); +- *topt++ = htonl(tsecr); ++ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); ++ put_unaligned_be32(tsval, topt++); ++ put_unaligned_be32(tsecr, topt++); + } + + #ifdef CONFIG_TCP_MD5SIG +--- a/include/linux/ipv6.h ++++ b/include/linux/ipv6.h +@@ -5,6 +5,7 @@ + + #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) + #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) ++ + /* + * This structure contains configuration options per IPv6 link. + */ +--- a/net/ipv6/datagram.c ++++ b/net/ipv6/datagram.c +@@ -471,7 +471,7 @@ int ipv6_recv_error(struct sock *sk, str + ipv6_iface_scope_id(&sin->sin6_addr, + IP6CB(skb)->iif); + } else { +- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), ++ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), + &sin->sin6_addr); + sin->sin6_scope_id = 0; + } +@@ -814,12 +814,12 @@ int ip6_datagram_send_ctl(struct net *ne + } + + if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { +- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { ++ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { + err = -EINVAL; + goto exit_f; + } + } +- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); ++ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); + break; + + case IPV6_2292HOPOPTS: +--- a/net/ipv6/ip6_gre.c ++++ b/net/ipv6/ip6_gre.c +@@ -394,7 +394,7 @@ static void ip6gre_err(struct sk_buff *s + return; + ipv6h = (const struct ipv6hdr *)skb->data; + greh = (const struct gre_base_hdr *)(skb->data + offset); +- key = key_off ? *(__be32 *)(skb->data + key_off) : 0; ++ key = key_off ? net_hdr_word((__be32 *)(skb->data + key_off)) : 0; + + t = ip6gre_tunnel_lookup(skb->dev, &ipv6h->daddr, &ipv6h->saddr, + key, greh->protocol); +--- a/net/ipv6/exthdrs.c ++++ b/net/ipv6/exthdrs.c +@@ -574,7 +574,7 @@ static bool ipv6_hop_jumbo(struct sk_buf + goto drop; + } + +- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); ++ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); + if (pkt_len <= IPV6_MAXPLEN) { + __IP6_INC_STATS(net, ipv6_skb_idev(skb), + IPSTATS_MIB_INHDRERRORS); +--- a/include/linux/types.h ++++ b/include/linux/types.h +@@ -231,5 +231,11 @@ typedef void (*call_rcu_func_t)(struct r + /* clocksource cycle base type */ + typedef u64 cycle_t; + ++struct net_hdr_word { ++ u32 words[1]; ++} __attribute__((packed, aligned(2))); ++ ++#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) ++ + #endif /* __ASSEMBLY__ */ + #endif /* _LINUX_TYPES_H */ +--- a/net/ipv4/af_inet.c ++++ b/net/ipv4/af_inet.c +@@ -1318,8 +1318,8 @@ struct sk_buff **inet_gro_receive(struct + if (unlikely(ip_fast_csum((u8 *)iph, 5))) + goto out_unlock; + +- id = ntohl(*(__be32 *)&iph->id); +- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); ++ id = ntohl(net_hdr_word(&iph->id)); ++ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); + id >>= 16; + + for (p = *head; p; p = p->next) { +--- a/net/ipv4/route.c ++++ b/net/ipv4/route.c +@@ -458,7 +458,7 @@ static struct neighbour *ipv4_neigh_look + else if (skb) + pkey = &ip_hdr(skb)->daddr; + +- n = __ipv4_neigh_lookup(dev, *(__force u32 *)pkey); ++ n = __ipv4_neigh_lookup(dev, net_hdr_word(pkey)); + if (n) + return n; + return neigh_create(&arp_tbl, pkey, dev); +--- a/net/ipv4/tcp_output.c ++++ b/net/ipv4/tcp_output.c +@@ -448,48 +448,53 @@ static void tcp_options_write(__be32 *pt + u16 options = opts->options; /* mungable copy */ + + if (unlikely(OPTION_MD5 & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); + /* overload cookie hash location */ + opts->hash_location = (__u8 *)ptr; + ptr += 4; + } + + if (unlikely(opts->mss)) { +- *ptr++ = htonl((TCPOPT_MSS << 24) | +- (TCPOLEN_MSS << 16) | +- opts->mss); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | ++ opts->mss); + } + + if (likely(OPTION_TS & options)) { + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | +- (TCPOLEN_SACK_PERM << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_SACK_PERM << 24) | ++ (TCPOLEN_SACK_PERM << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + options &= ~OPTION_SACK_ADVERTISE; + } else { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + } +- *ptr++ = htonl(opts->tsval); +- *ptr++ = htonl(opts->tsecr); ++ net_hdr_word(ptr++) = htonl(opts->tsval); ++ net_hdr_word(ptr++) = htonl(opts->tsecr); + } + + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK_PERM << 8) | +- TCPOLEN_SACK_PERM); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK_PERM << 8) | ++ TCPOLEN_SACK_PERM); + } + + if (unlikely(OPTION_WSCALE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_WINDOW << 16) | +- (TCPOLEN_WINDOW << 8) | +- opts->ws); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_WINDOW << 16) | ++ (TCPOLEN_WINDOW << 8) | ++ opts->ws); + } + + if (unlikely(opts->num_sack_blocks)) { +@@ -497,16 +502,17 @@ static void tcp_options_write(__be32 *pt + tp->duplicate_sack : tp->selective_acks; + int this_sack; + +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK << 8) | +- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK << 8) | ++ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * + TCPOLEN_SACK_PERBLOCK))); + + for (this_sack = 0; this_sack < opts->num_sack_blocks; + ++this_sack) { +- *ptr++ = htonl(sp[this_sack].start_seq); +- *ptr++ = htonl(sp[this_sack].end_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); + } + + tp->rx_opt.dsack = 0; +@@ -519,13 +525,14 @@ static void tcp_options_write(__be32 *pt + + if (foc->exp) { + len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; +- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | ++ net_hdr_word(ptr) = ++ htonl((TCPOPT_EXP << 24) | (len << 16) | + TCPOPT_FASTOPEN_MAGIC); + p += TCPOLEN_EXP_FASTOPEN_BASE; + } else { + len = TCPOLEN_FASTOPEN_BASE + foc->len; +- *p++ = TCPOPT_FASTOPEN; +- *p++ = len; ++ net_hdr_word(p++) = TCPOPT_FASTOPEN; ++ net_hdr_word(p++) = len; + } + + memcpy(p, foc->val, foc->len); +--- a/net/ipv4/igmp.c ++++ b/net/ipv4/igmp.c +@@ -509,7 +509,7 @@ static struct sk_buff *add_grec(struct s + if (!skb) + return NULL; + psrc = (__be32 *)skb_put(skb, sizeof(__be32)); +- *psrc = psf->sf_inaddr; ++ net_hdr_word(psrc) = psf->sf_inaddr; + scount++; stotal++; + if ((type == IGMPV3_ALLOW_NEW_SOURCES || + type == IGMPV3_BLOCK_OLD_SOURCES) && psf->sf_crcount) { +--- a/include/uapi/linux/igmp.h ++++ b/include/uapi/linux/igmp.h +@@ -32,7 +32,7 @@ struct igmphdr { + __u8 code; /* For newer IGMP */ + __sum16 csum; + __be32 group; +-}; ++} __attribute__((packed, aligned(2))); + + /* V3 group record types [grec_type] */ + #define IGMPV3_MODE_IS_INCLUDE 1 +@@ -48,7 +48,7 @@ struct igmpv3_grec { + __be16 grec_nsrcs; + __be32 grec_mca; + __be32 grec_src[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_report { + __u8 type; +@@ -57,7 +57,7 @@ struct igmpv3_report { + __be16 resv2; + __be16 ngrec; + struct igmpv3_grec grec[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_query { + __u8 type; +@@ -78,7 +78,7 @@ struct igmpv3_query { + __u8 qqic; + __be16 nsrcs; + __be32 srcs[0]; +-}; ++} __attribute__((packed, aligned(2))); + + #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ + #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ +--- a/net/core/flow_dissector.c ++++ b/net/core/flow_dissector.c +@@ -84,7 +84,7 @@ __be32 __skb_flow_get_ports(const struct + ports = __skb_header_pointer(skb, thoff + poff, + sizeof(_ports), data, hlen, &_ports); + if (ports) +- return *ports; ++ return (__be32)net_hdr_word(ports); + } + + return 0; +--- a/include/uapi/linux/icmpv6.h ++++ b/include/uapi/linux/icmpv6.h +@@ -76,7 +76,7 @@ struct icmp6hdr { + #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other + #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime + #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref +-}; ++} __attribute__((packed, aligned(2))); + + + #define ICMPV6_ROUTER_PREF_LOW 0x3 +--- a/include/net/ndisc.h ++++ b/include/net/ndisc.h +@@ -87,7 +87,7 @@ struct ra_msg { + struct icmp6hdr icmph; + __be32 reachable_time; + __be32 retrans_timer; +-}; ++} __attribute__((packed, aligned(2))); + + struct rd_msg { + struct icmp6hdr icmph; +@@ -365,10 +365,10 @@ static inline u32 ndisc_hashfn(const voi + { + const u32 *p32 = pkey; + +- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + +- (p32[1] * hash_rnd[1]) + +- (p32[2] * hash_rnd[2]) + +- (p32[3] * hash_rnd[3])); ++ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + ++ (net_hdr_word(&p32[1]) * hash_rnd[1]) + ++ (net_hdr_word(&p32[2]) * hash_rnd[2]) + ++ (net_hdr_word(&p32[3]) * hash_rnd[3])); + } + + static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) +--- a/net/sched/cls_u32.c ++++ b/net/sched/cls_u32.c +@@ -159,7 +159,7 @@ next_knode: + data = skb_header_pointer(skb, toff, 4, &hdata); + if (!data) + goto out; +- if ((*data ^ key->val) & key->mask) { ++ if ((net_hdr_word(data) ^ key->val) & key->mask) { + n = rcu_dereference_bh(n->next); + goto next_knode; + } +@@ -212,8 +212,8 @@ check_terminal: + &hdata); + if (!data) + goto out; +- sel = ht->divisor & u32_hash_fold(*data, &n->sel, +- n->fshift); ++ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), ++ &n->sel, n->fshift); + } + if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) + goto next_ht; +--- a/net/ipv6/ip6_offload.c ++++ b/net/ipv6/ip6_offload.c +@@ -220,7 +220,7 @@ static struct sk_buff **ipv6_gro_receive + continue; + + iph2 = (struct ipv6hdr *)(p->data + off); +- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; ++ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); + + /* All fields must match except length and Traffic Class. + * XXX skbs on the gro_list have all been parsed and pulled +--- a/include/net/addrconf.h ++++ b/include/net/addrconf.h +@@ -46,7 +46,7 @@ struct prefix_info { + __be32 reserved2; + + struct in6_addr prefix; +-}; ++} __attribute__((packed, aligned(2))); + + + #include +--- a/include/net/inet_ecn.h ++++ b/include/net/inet_ecn.h +@@ -124,9 +124,9 @@ static inline int IP6_ECN_set_ce(struct + if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) + return 0; + +- from = *(__be32 *)iph; ++ from = net_hdr_word(iph); + to = from | htonl(INET_ECN_CE << 20); +- *(__be32 *)iph = to; ++ net_hdr_word(iph) = to; + if (skb->ip_summed == CHECKSUM_COMPLETE) + skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from), + (__force __wsum)to); +@@ -135,7 +135,7 @@ static inline int IP6_ECN_set_ce(struct + + static inline void IP6_ECN_clear(struct ipv6hdr *iph) + { +- *(__be32*)iph &= ~htonl(INET_ECN_MASK << 20); ++ net_hdr_word(iph) &= ~htonl(INET_ECN_MASK << 20); + } + + static inline void ipv6_copy_dscp(unsigned int dscp, struct ipv6hdr *inner) +--- a/include/net/ipv6.h ++++ b/include/net/ipv6.h +@@ -107,7 +107,7 @@ struct frag_hdr { + __u8 reserved; + __be16 frag_off; + __be32 identification; +-}; ++} __attribute__((packed, aligned(2))); + + #define IP6_MF 0x0001 + #define IP6_OFFSET 0xFFF8 +@@ -449,8 +449,8 @@ static inline void __ipv6_addr_set_half( + } + #endif + #endif +- addr[0] = wh; +- addr[1] = wl; ++ net_hdr_word(&addr[0]) = wh; ++ net_hdr_word(&addr[1]) = wl; + } + + static inline void ipv6_addr_set(struct in6_addr *addr, +@@ -509,6 +509,8 @@ static inline bool ipv6_prefix_equal(con + const __be32 *a1 = addr1->s6_addr32; + const __be32 *a2 = addr2->s6_addr32; + unsigned int pdw, pbi; ++ /* Used for last <32-bit fraction of prefix */ ++ u32 pbia1, pbia2; + + /* check complete u32 in prefix */ + pdw = prefixlen >> 5; +@@ -517,7 +519,9 @@ static inline bool ipv6_prefix_equal(con + + /* check incomplete u32 in prefix */ + pbi = prefixlen & 0x1f; +- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) ++ pbia1 = net_hdr_word(&a1[pdw]); ++ pbia2 = net_hdr_word(&a2[pdw]); ++ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) + return false; + + return true; +@@ -661,13 +665,13 @@ static inline void ipv6_addr_set_v4mappe + */ + static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) + { +- const __be32 *a1 = token1, *a2 = token2; ++ const struct in6_addr *a1 = token1, *a2 = token2; + int i; + + addrlen >>= 2; + + for (i = 0; i < addrlen; i++) { +- __be32 xb = a1[i] ^ a2[i]; ++ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; + if (xb) + return i * 32 + 31 - __fls(ntohl(xb)); + } +@@ -836,17 +840,18 @@ static inline int ip6_default_np_autolab + static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, + __be32 flowlabel) + { +- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; ++ net_hdr_word((__be32 *)hdr) = ++ htonl(0x60000000 | (tclass << 20)) | flowlabel; + } + + static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; + } + + static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; + } + + static inline u8 ip6_tclass(__be32 flowinfo) +--- a/include/net/secure_seq.h ++++ b/include/net/secure_seq.h +@@ -2,6 +2,7 @@ + #define _NET_SECURE_SEQ + + #include ++#include + + u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); + u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, +--- a/include/uapi/linux/in.h ++++ b/include/uapi/linux/in.h +@@ -83,7 +83,7 @@ enum { + /* Internet address. */ + struct in_addr { + __be32 s_addr; +-}; ++} __attribute__((packed, aligned(2))); + #endif + + #define IP_TOS 1 +--- a/net/core/secure_seq.c ++++ b/net/core/secure_seq.c +@@ -46,11 +46,12 @@ __u32 secure_tcpv6_sequence_number(const + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u32 i; ++ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; + + net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) +- secret[i] = net_secret[i] + (__force u32)daddr[i]; ++ secret[i] = net_secret[i] + (__force u32)daddr6->s6_addr32[i]; + secret[4] = net_secret[4] + + (((__force u16)sport << 16) + (__force u16)dport); + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) +@@ -68,11 +69,12 @@ u32 secure_ipv6_port_ephemeral(const __b + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u32 i; ++ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; + + net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) +- secret[i] = net_secret[i] + (__force u32) daddr[i]; ++ secret[i] = net_secret[i] + (__force u32) daddr6->s6_addr32[i]; + secret[4] = net_secret[4] + (__force u32)dport; + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) + secret[i] = net_secret[i]; +@@ -146,6 +148,7 @@ EXPORT_SYMBOL(secure_dccp_sequence_numbe + u64 secure_dccpv6_sequence_number(__be32 *saddr, __be32 *daddr, + __be16 sport, __be16 dport) + { ++ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u64 seq; +@@ -154,7 +157,7 @@ u64 secure_dccpv6_sequence_number(__be32 + net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) +- secret[i] = net_secret[i] + (__force u32)daddr[i]; ++ secret[i] = net_secret[i] + (__force u32)daddr6->s6_addr32[i]; + secret[4] = net_secret[4] + + (((__force u16)sport << 16) + (__force u16)dport); + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) +--- a/net/ipv6/ip6_fib.c ++++ b/net/ipv6/ip6_fib.c +@@ -136,7 +136,7 @@ static __be32 addr_bit_set(const void *t + * See include/asm-generic/bitops/le.h. + */ + return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & +- addr[fn_bit >> 5]; ++ net_hdr_word(&addr[fn_bit >> 5]); + } + + static struct fib6_node *node_alloc(void) +--- a/net/netfilter/nf_conntrack_proto_tcp.c ++++ b/net/netfilter/nf_conntrack_proto_tcp.c +@@ -452,7 +452,7 @@ static void tcp_sack(const struct sk_buf + + /* Fast path for timestamp-only option */ + if (length == TCPOLEN_TSTAMP_ALIGNED +- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) ++ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) + | (TCPOPT_NOP << 16) + | (TCPOPT_TIMESTAMP << 8) + | TCPOLEN_TIMESTAMP)) +--- a/net/xfrm/xfrm_input.c ++++ b/net/xfrm/xfrm_input.c +@@ -154,8 +154,8 @@ int xfrm_parse_spi(struct sk_buff *skb, + if (!pskb_may_pull(skb, hlen)) + return -EINVAL; + +- *spi = *(__be32 *)(skb_transport_header(skb) + offset); +- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); ++ *spi = net_hdr_word(skb_transport_header(skb) + offset); ++ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); + return 0; + } + +--- a/net/ipv4/tcp_input.c ++++ b/net/ipv4/tcp_input.c +@@ -3886,14 +3886,16 @@ static bool tcp_parse_aligned_timestamp( + { + const __be32 *ptr = (const __be32 *)(th + 1); + +- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) +- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { ++ if (net_hdr_word(ptr) == ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { + tp->rx_opt.saw_tstamp = 1; + ++ptr; +- tp->rx_opt.rcv_tsval = ntohl(*ptr); ++ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); + ++ptr; +- if (*ptr) +- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; ++ if (net_hdr_word(ptr)) ++ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - ++ tp->tsoffset; + else + tp->rx_opt.rcv_tsecr = 0; + return true; +--- a/include/uapi/linux/if_pppox.h ++++ b/include/uapi/linux/if_pppox.h +@@ -50,6 +50,7 @@ struct pppoe_addr { + */ + struct pptp_addr { + __u16 call_id; ++ __u16 pad; + struct in_addr sin_addr; + }; + +--- a/net/ipv6/netfilter/nf_log_ipv6.c ++++ b/net/ipv6/netfilter/nf_log_ipv6.c +@@ -66,9 +66,9 @@ static void dump_ipv6_packet(struct nf_l + /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ + nf_log_buf_add(m, "LEN=%Zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", + ntohs(ih->payload_len) + sizeof(struct ipv6hdr), +- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, ++ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, + ih->hop_limit, +- (ntohl(*(__be32 *)ih) & 0x000fffff)); ++ (ntohl(net_hdr_word(ih)) & 0x000fffff)); + + fragment = 0; + ptr = ip6hoff + sizeof(struct ipv6hdr); +--- a/include/net/neighbour.h ++++ b/include/net/neighbour.h +@@ -263,8 +263,10 @@ static inline bool neigh_key_eq128(const + const u32 *n32 = (const u32 *)n->primary_key; + const u32 *p32 = pkey; + +- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | +- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; ++ return ((n32[0] ^ net_hdr_word(&p32[0])) | ++ (n32[1] ^ net_hdr_word(&p32[1])) | ++ (n32[2] ^ net_hdr_word(&p32[2])) | ++ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; + } + + static inline struct neighbour *___neigh_lookup_noref( +--- a/include/uapi/linux/netfilter_arp/arp_tables.h ++++ b/include/uapi/linux/netfilter_arp/arp_tables.h +@@ -69,7 +69,7 @@ struct arpt_arp { + __u8 flags; + /* Inverse flags */ + __u16 invflags; +-}; ++} __attribute__((aligned(4))); + + /* Values for "flag" field in struct arpt_ip (general arp structure). + * No flags defined yet. +--- a/net/core/utils.c ++++ b/net/core/utils.c +@@ -321,8 +321,14 @@ void inet_proto_csum_replace16(__sum16 * + bool pseudohdr) + { + __be32 diff[] = { +- ~from[0], ~from[1], ~from[2], ~from[3], +- to[0], to[1], to[2], to[3], ++ ~net_hdr_word(&from[0]), ++ ~net_hdr_word(&from[1]), ++ ~net_hdr_word(&from[2]), ++ ~net_hdr_word(&from[3]), ++ net_hdr_word(&to[0]), ++ net_hdr_word(&to[1]), ++ net_hdr_word(&to[2]), ++ net_hdr_word(&to[3]), + }; + if (skb->ip_summed != CHECKSUM_PARTIAL) { + *sum = csum_fold(csum_partial(diff, sizeof(diff), diff --git a/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch new file mode 100644 index 000000000..740ffec4a --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch @@ -0,0 +1,123 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -659,6 +659,7 @@ + + #define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) + #define AR933X_BOOTSTRAP_EEPBUSY BIT(4) ++#define AR933X_BOOTSTRAP_USB_MODE_HOST BIT(3) + #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) + + #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) +@@ -688,6 +689,8 @@ + + #define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2) + ++#define AR933X_USB_CONFIG_HOST_ONLY BIT(8) ++ + #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) + #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) + #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) +--- a/arch/mips/ath79/dev-usb.c ++++ b/arch/mips/ath79/dev-usb.c +@@ -19,6 +19,9 @@ + #include + #include + #include ++#include ++#include ++#include + + #include + #include +@@ -170,6 +173,67 @@ static void __init ar913x_usb_setup(void + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + ++static void __init ar933x_usb_setup_ctrl_config(void) ++{ ++ void __iomem *usb_ctrl_base, *usb_config_reg; ++ u32 usb_config; ++ ++ usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); ++ usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG; ++ usb_config = __raw_readl(usb_config_reg); ++ usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY; ++ __raw_writel(usb_config, usb_config_reg); ++ iounmap(usb_ctrl_base); ++} ++ ++static void __init ar9xxx_ci_usb_setup(void) ++{ ++ struct ci_hdrc_platform_data ci_pdata; ++ enum usb_dr_mode dr_mode; ++ bool host_mode = true; ++ ++ if (soc_is_ar933x()) ++ host_mode = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) & ++ AR933X_BOOTSTRAP_USB_MODE_HOST; ++ else if (soc_is_ar934x() || soc_is_qca955x()) ++ host_mode = !(ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP) & ++ AR934X_BOOTSTRAP_USB_MODE_DEVICE); ++ ++ if (host_mode) { ++ dr_mode = USB_DR_MODE_HOST; ++ } else { ++ dr_mode = USB_DR_MODE_PERIPHERAL; ++ if (soc_is_ar933x()) ++ ar933x_usb_setup_ctrl_config(); ++ } ++ ++ memset(&ci_pdata, 0, sizeof(ci_pdata)); ++ ci_pdata.name = "ci_hdrc_ar9xxx"; ++ ci_pdata.capoffset = DEF_CAPOFFSET; ++ ci_pdata.dr_mode = dr_mode; ++ ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP; ++ ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV); ++ ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV); ++ ci_pdata.itc_setting = 1; ++ ++ platform_device_register_simple("usb_phy_generic", ++ PLATFORM_DEVID_AUTO, NULL, 0); ++ ++ ath79_usb_register("ci_hdrc", -1, ++ AR933X_EHCI_BASE, AR933X_EHCI_SIZE, ++ ATH79_CPU_IRQ(3), ++ &ci_pdata, sizeof(ci_pdata)); ++ ++ if (!host_mode) ++ return; ++ ++ ath79_usb_register("ehci-platform", -1, ++ AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ++ ATH79_CPU_IRQ(3), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ++} ++ + static void __init ar933x_usb_setup(void) + { + ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); +@@ -181,10 +245,7 @@ static void __init ar933x_usb_setup(void + ath79_device_reset_clear(AR933X_RESET_USB_PHY); + mdelay(10); + +- ath79_usb_register("ehci-platform", -1, +- AR933X_EHCI_BASE, AR933X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ar9xxx_ci_usb_setup(); + } + + static void enable_tx_tx_idp_violation_fix(unsigned base) +@@ -230,10 +291,7 @@ static void __init ar934x_usb_setup(void + if (ath79_soc_rev >= 3) + ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; + +- ath79_usb_register("ehci-platform", -1, +- AR934X_EHCI_BASE, AR934X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ar9xxx_ci_usb_setup(); + } + + static void __init qca953x_usb_setup(void) diff --git a/target/linux/ar71xx/patches-4.9/930-chipidea-pullup.patch b/target/linux/ar71xx/patches-4.9/930-chipidea-pullup.patch new file mode 100644 index 000000000..ce31595d9 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/930-chipidea-pullup.patch @@ -0,0 +1,72 @@ +--- a/drivers/usb/chipidea/ci.h ++++ b/drivers/usb/chipidea/ci.h +@@ -199,6 +199,7 @@ struct hw_bank { + * @in_lpm: if the core in low power mode + * @wakeup_int: if wakeup interrupt occur + * @rev: The revision number for controller ++ * @dp_always_pullup: keep dp always pullup at device mode + */ + struct ci_hdrc { + struct device *dev; +@@ -248,6 +249,7 @@ struct ci_hdrc { + bool in_lpm; + bool wakeup_int; + enum ci_revision rev; ++ bool dp_always_pullup; + }; + + static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci) +--- a/drivers/usb/chipidea/core.c ++++ b/drivers/usb/chipidea/core.c +@@ -839,7 +839,7 @@ static inline void ci_role_destroy(struc + { + ci_hdrc_gadget_destroy(ci); + ci_hdrc_host_destroy(ci); +- if (ci->is_otg) ++ if (!ci->dp_always_pullup && ci->roles[CI_ROLE_GADGET]) + ci_hdrc_otg_destroy(ci); + } + +@@ -890,6 +890,9 @@ static int ci_hdrc_probe(struct platform + ci->supports_runtime_pm = !!(ci->platdata->flags & + CI_HDRC_SUPPORTS_RUNTIME_PM); + ++ ci->dp_always_pullup = !!(ci->platdata->flags & ++ CI_HDRC_DP_ALWAYS_PULLUP); ++ + ret = hw_device_init(ci, base); + if (ret < 0) { + dev_err(dev, "can't initialize hardware\n"); +@@ -955,7 +958,7 @@ static int ci_hdrc_probe(struct platform + goto deinit_phy; + } + +- if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) { ++ if (!ci->dp_always_pullup && ci->roles[CI_ROLE_GADGET]) { + ret = ci_hdrc_otg_init(ci); + if (ret) { + dev_err(dev, "init otg fails, ret = %d\n", ret); +--- a/drivers/usb/chipidea/otg.c ++++ b/drivers/usb/chipidea/otg.c +@@ -131,8 +131,10 @@ enum ci_role ci_otg_role(struct ci_hdrc + + void ci_handle_vbus_change(struct ci_hdrc *ci) + { +- if (!ci->is_otg) ++ if (ci->dp_always_pullup) { ++ usb_gadget_vbus_connect(&ci->gadget); + return; ++ } + + if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active) + usb_gadget_vbus_connect(&ci->gadget); +--- a/include/linux/usb/chipidea.h ++++ b/include/linux/usb/chipidea.h +@@ -57,6 +57,7 @@ struct ci_hdrc_platform_data { + #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9) + #define CI_HDRC_OVERRIDE_TX_BURST BIT(10) + #define CI_HDRC_OVERRIDE_RX_BURST BIT(11) ++#define CI_HDRC_DP_ALWAYS_PULLUP BIT(12) + enum usb_dr_mode dr_mode; + #define CI_HDRC_CONTROLLER_RESET_EVENT 0 + #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 From 3fb9fdf5cdcbadf8cbf9f3fe303c52f409d7a8b4 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 01:24:22 +0800 Subject: [PATCH 02/15] enable MIPS_FPU_EMULATOR for AR71xx to run frp and kcptun etc --- target/linux/ar71xx/config-4.9 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ar71xx/config-4.9 b/target/linux/ar71xx/config-4.9 index c5b89088f..0bd20e7b6 100644 --- a/target/linux/ar71xx/config-4.9 +++ b/target/linux/ar71xx/config-4.9 @@ -378,6 +378,7 @@ CONFIG_MIPS_CLOCK_VSYSCALL=y CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y # CONFIG_MIPS_CMDLINE_FROM_DTB is not set # CONFIG_MIPS_ELF_APPENDED_DTB is not set +CONFIG_MIPS_FPU_EMULATOR=y # CONFIG_MIPS_HUGE_TLB_SUPPORT is not set CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_MACHINE=y From fe825bbce62baf0cafbe042ac502e93befc544fc Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 21:56:58 +0800 Subject: [PATCH 03/15] update luci-app-kcptun to 1.4.3 --- package/lean/luci-app-kcptun/LICENSE | 202 +++++++++++++++++++++++++ package/lean/luci-app-kcptun/Makefile | 2 +- package/lean/luci-app-kcptun/README.md | 64 ++++++++ 3 files changed, 267 insertions(+), 1 deletion(-) create mode 100644 package/lean/luci-app-kcptun/LICENSE create mode 100644 package/lean/luci-app-kcptun/README.md diff --git a/package/lean/luci-app-kcptun/LICENSE b/package/lean/luci-app-kcptun/LICENSE new file mode 100644 index 000000000..d64569567 --- /dev/null +++ b/package/lean/luci-app-kcptun/LICENSE @@ -0,0 +1,202 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/package/lean/luci-app-kcptun/Makefile b/package/lean/luci-app-kcptun/Makefile index fcdc65d47..c569e5c94 100644 --- a/package/lean/luci-app-kcptun/Makefile +++ b/package/lean/luci-app-kcptun/Makefile @@ -20,7 +20,7 @@ define Package/$(PKG_NAME)/conffiles /etc/config/kcptun endef -include $(TOPDIR)/feeds/luci/luci.mk +include $(TOPDIR)/feeds/luci.mk define Package/$(PKG_NAME)/postinst #!/bin/sh diff --git a/package/lean/luci-app-kcptun/README.md b/package/lean/luci-app-kcptun/README.md new file mode 100644 index 000000000..ad819f336 --- /dev/null +++ b/package/lean/luci-app-kcptun/README.md @@ -0,0 +1,64 @@ +# luci-app-kcptun + +Luci support for kcptun + +OpenWrt/LEDE 上的 Kcptun Luci 支持界面 + +[![Release Version](https://img.shields.io/github/release/kuoruan/luci-app-kcptun.svg)](https://github.com/kuoruan/luci-app-kcptun/releases/latest) [![Latest Release Download](https://img.shields.io/github/downloads/kuoruan/luci-app-kcptun/latest/total.svg)](https://github.com/kuoruan/luci-app-kcptun/releases/latest) + +## 编译说明 + +由于目录结构原因，无法使用 OpenWrt/LEDE 的 SDK 直接编译。 + +需要下载 OpenWrt/LEDE 的完整源码 https://github.com/lede-project/source +并将 luci-app-kcptun 放入 ```feeds/luci/applications/``` 目录下。 + +``` +cd openwrt +git clone https://github.com/kuoruan/luci-app-kcptun.git feeds/luci/applications/luci-app-kcptun +rm -rf tmp/ + +./scripts/feeds update luci +./scripts/feeds install luci + +make menuconfig +make package/luci-app-kcptun/{clean,compile} V=s +``` + +如果需要在 SDK 上编译，需要自行修改目录结构。参考：https://github.com/shadowsocks/luci-app-shadowsocks + +## 安装说明 + +1. 到 [release](https://github.com/kuoruan/luci-app-kcptun/releases) 页面下载最新版 luci-app-kcptun 和 luci-i18n-kcptun-zh-cn (简体中文翻译文件) +2. 将下载好的 ipk 文件上传到路由器任意目录下, 如 /tmp +3. 先安装 luci-app-kcptun 再安装 luci-i18n-kcptun-zh-cn + +``` +opkg install luci-app-kcptun_*.ipk +opkg install luci-i18n-kcptun-zh-cn_*.ipk +``` + +安装好 LuCI 之后，进入配置页面，会提示 ```客户端文件配置有误```。 + +若路由器上已经有 Kcptun 客户端，直接配置好路径即可，如果当前还没有客户端文件，可以使用以下操作： + +1. 配置好 ```客户端文件``` 路径（可选，默认路径 ```/var/kcptun_client```），确保客户端文件所在目录的剩余空间足以放下两个客户端文件； +2. 根据当前设备，配置好 ```CPU 架构```（可选）； +3. 如果你的路由器上装有透明代理软件，最好先打开； +4. 点击 ```检查 Kcptun```，正常情况下应该会获取到 Kcptun 最新版本号； +5. ```点击更新``` 按钮来自动下载配置客户端文件。 + +如果自动下载更新失败，请手动下载 Kcptun 客户端文件并上传到路由器上，然后配置好 ```客户端文件``` 路径。 + +下载地址: https://github.com/xtaci/kcptun/releases + +注：Golang 的 MIPS/MIPSLE 版本暂时不支持 Soft Float，需要在编译 OpenWrt/LEDE 时打开 ```MIPS FPU Emulator```，其他版本不受影响。 + +## 卸载说明 + +卸载时需要先卸载 luci-i18n-kcptun-zh-cn, 再卸载 luci-app-kcptun + +``` +opkg remove luci-i18n-kcptun-zh-cn +opkg remove luci-app-kcptun +``` From b29e9ad9792c68a9a59bd5b9be73d9d9fc5f35b0 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 22:25:22 +0800 Subject: [PATCH 04/15] update dnsmasq to 2.78 for CVE fix --- package/network/services/dnsmasq/Makefile | 24 +- .../services/dnsmasq/files/dhcp-script.sh | 46 ++ .../network/services/dnsmasq/files/dhcp.conf | 2 +- .../services/dnsmasq/files/dnsmasq.init | 428 ++++++++++++++---- .../services/dnsmasq/files/dnsmasq_acl.json | 4 + .../services/dnsmasq/files/dnsmasqsec.hotplug | 6 +- .../services/dnsmasq/files/rfc6761.conf | 15 + .../100-fix-dhcp-no-address-warning.patch | 47 -- .../110-ipset-remove-old-kernel-support.patch | 69 +-- ...20-dnsmasq-compile-time-option-NO_ID.patch | 149 ------ ...0-dnssec-improve-timestamp-heuristic.patch | 12 +- ...0-fix-poll-h-include-warning-on-musl.patch | 2 +- .../services/dnsmasq/patches/240-ubus.patch | 126 ++++++ 13 files changed, 574 insertions(+), 356 deletions(-) create mode 100755 package/network/services/dnsmasq/files/dhcp-script.sh create mode 100644 package/network/services/dnsmasq/files/dnsmasq_acl.json create mode 100644 package/network/services/dnsmasq/files/rfc6761.conf delete mode 100644 package/network/services/dnsmasq/patches/100-fix-dhcp-no-address-warning.patch delete mode 100644 package/network/services/dnsmasq/patches/120-dnsmasq-compile-time-option-NO_ID.patch create mode 100644 package/network/services/dnsmasq/patches/240-ubus.patch diff --git a/package/network/services/dnsmasq/Makefile b/package/network/services/dnsmasq/Makefile index 29079795c..33644e8e5 100644 --- a/package/network/services/dnsmasq/Makefile +++ b/package/network/services/dnsmasq/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=dnsmasq -PKG_VERSION:=2.76 -PKG_RELEASE:=12 +PKG_VERSION:=2.78 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq -PKG_MD5SUM:=00f5ee66b4e4b7f14538bf62ae3c9461 +PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq/ +PKG_HASH:=89949f438c74b0c7543f06689c319484bd126cc4b1f8c745c742ab397681252b PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=COPYING @@ -37,6 +37,7 @@ define Package/dnsmasq/Default CATEGORY:=Base system TITLE:=DNS and DHCP server URL:=http://www.thekelleys.org.uk/dnsmasq/ + DEPENDS:=+libubus USERID:=dnsmasq=453:dnsmasq=453 endef @@ -48,14 +49,14 @@ endef define Package/dnsmasq-dhcpv6 $(call Package/dnsmasq/Default) TITLE += (with DHCPv6 support) - DEPENDS:=@IPV6 + DEPENDS+=@IPV6 VARIANT:=dhcpv6 endef define Package/dnsmasq-full $(call Package/dnsmasq/Default) TITLE += (with DNSSEC, DHCPv6, Auth DNS, IPset, Conntrack, NO_ID enabled by default) - DEPENDS:=+PACKAGE_dnsmasq_full_dnssec:libnettle \ + DEPENDS+=+PACKAGE_dnsmasq_full_dnssec:libnettle \ +PACKAGE_dnsmasq_full_ipset:kmod-ipt-ipset \ +PACKAGE_dnsmasq_full_conntrack:libnetfilter-conntrack VARIANT:=full @@ -137,7 +138,7 @@ endif MAKE_FLAGS := \ $(TARGET_CONFIGURE_OPTS) \ - CFLAGS="$(TARGET_CFLAGS)" \ + CFLAGS="$(TARGET_CFLAGS) $(TARGET_CPPFLAGS)" \ LDFLAGS="$(TARGET_LDFLAGS)" \ COPTS="$(COPTS)" \ PREFIX="/usr" @@ -150,8 +151,17 @@ define Package/dnsmasq/install $(INSTALL_DATA) ./files/dnsmasq.conf $(1)/etc/dnsmasq.conf $(INSTALL_DIR) $(1)/etc/init.d $(INSTALL_BIN) ./files/dnsmasq.init $(1)/etc/init.d/dnsmasq + $(INSTALL_DIR) $(1)/etc/hotplug.d/dhcp + $(INSTALL_DIR) $(1)/etc/hotplug.d/neigh $(INSTALL_DIR) $(1)/etc/hotplug.d/ntp + $(INSTALL_DIR) $(1)/etc/hotplug.d/tftp $(INSTALL_DATA) ./files/dnsmasqsec.hotplug $(1)/etc/hotplug.d/ntp/25-dnsmasqsec + $(INSTALL_DIR) $(1)/usr/share/dnsmasq + $(INSTALL_DATA) ./files/rfc6761.conf $(1)/usr/share/dnsmasq/ + $(INSTALL_DIR) $(1)/usr/lib/dnsmasq + $(INSTALL_BIN) ./files/dhcp-script.sh $(1)/usr/lib/dnsmasq/dhcp-script.sh + $(INSTALL_DIR) $(1)/usr/share/acl.d + $(INSTALL_DATA) ./files/dnsmasq_acl.json $(1)/usr/share/acl.d/ endef Package/dnsmasq-dhcpv6/install = $(Package/dnsmasq/install) diff --git a/package/network/services/dnsmasq/files/dhcp-script.sh b/package/network/services/dnsmasq/files/dhcp-script.sh new file mode 100755 index 000000000..86032694c --- /dev/null +++ b/package/network/services/dnsmasq/files/dhcp-script.sh @@ -0,0 +1,46 @@ +#!/bin/sh + +[ -f "$USER_DHCPSCRIPT" ] && . "$USER_DHCPSCRIPT" "$@" + +case "$1" in + add) + export ACTION="add" + export MACADDR="$2" + export IPADDR="$3" + export HOSTNAME="$4" + exec /sbin/hotplug-call dhcp + ;; + del) + export ACTION="remove" + export MACADDR="$2" + export IPADDR="$3" + export HOSTNAME="$4" + exec /sbin/hotplug-call dhcp + ;; + old) + export ACTION="update" + export MACADDR="$2" + export IPADDR="$3" + export HOSTNAME="$4" + exec /sbin/hotplug-call dhcp + ;; + arp-add) + export ACTION="add" + export MACADDR="$2" + export IPADDR="$3" + exec /sbin/hotplug-call neigh + ;; + arp-del) + export ACTION="remove" + export MACADDR="$2" + export IPADDR="$3" + exec /sbin/hotplug-call neigh + ;; + tftp) + export ACTION="add" + export TFTP_SIZE="$2" + export TFTP_ADDR="$3" + export TFTP_PATH="$4" + exec /sbin/hotplug-call tftp + ;; +esac diff --git a/package/network/services/dnsmasq/files/dhcp.conf b/package/network/services/dnsmasq/files/dhcp.conf index 362b90a29..360c7d79e 100644 --- a/package/network/services/dnsmasq/files/dhcp.conf +++ b/package/network/services/dnsmasq/files/dhcp.conf @@ -15,7 +15,7 @@ config dnsmasq option leasefile '/tmp/dhcp.leases' option resolvfile '/tmp/resolv.conf.auto' #list server '/mycompany.local/1.2.3.4' - #option nonwildcard 1 + option nonwildcard 1 # bind to & keep track of interfaces #list interface br-lan #list notinterface lo #list bogusnxdomain '64.94.110.11' diff --git a/package/network/services/dnsmasq/files/dnsmasq.init b/package/network/services/dnsmasq/files/dnsmasq.init index b1f9e2e29..014964395 100644 --- a/package/network/services/dnsmasq/files/dnsmasq.init +++ b/package/network/services/dnsmasq/files/dnsmasq.init @@ -8,6 +8,8 @@ PROG=/usr/sbin/dnsmasq ADD_LOCAL_DOMAIN=1 ADD_LOCAL_HOSTNAME=1 +ADD_WAN_FQDN=0 +ADD_LOCAL_FQDN="" BASECONFIGFILE="/var/etc/dnsmasq.conf" BASEHOSTFILE="/tmp/hosts/dhcp" @@ -15,6 +17,10 @@ BASETIMESTAMPFILE="/etc/dnsmasq.time" TRUSTANCHORSFILE="/usr/share/dnsmasq/trust-anchors.conf" TIMEVALIDFILE="/var/state/dnsmasqsec" BASEDHCPSTAMPFILE="/var/run/dnsmasq" +RFC6761FILE="/usr/share/dnsmasq/rfc6761.conf" +DHCPSCRIPT="/usr/lib/dnsmasq/dhcp-script.sh" + +DNSMASQ_DHCP_VER=4 xappend() { local value="$1" @@ -23,22 +29,22 @@ xappend() { } hex_to_hostid() { - local var="$1" - local hex="${2#0x}" # strip optional "0x" prefix + local var="$1" + local hex="${2#0x}" # strip optional "0x" prefix - if [ -n "${hex//[0-9a-fA-F]/}" ]; then - # is invalid hex literal - return 1 - fi + if [ -n "${hex//[0-9a-fA-F]/}" ]; then + # is invalid hex literal + return 1 + fi - # convert into host id - export "$var=$( - printf "%0x:%0x" \ - $(((0x$hex >> 16) % 65536)) \ - $(( 0x$hex % 256)) - )" + # convert into host id + export "$var=$( + printf "%0x:%0x" \ + $(((0x$hex >> 16) % 65536)) \ + $(( 0x$hex % 65536)) + )" - return 0 + return 0 } dhcp_calc() { @@ -83,12 +89,24 @@ log_once() { logger -t dnsmasq "$@" } +has_handler() { + local file + + for file in /etc/hotplug.d/dhcp/* /etc/hotplug.d/tftp/* /etc/hotplug.d/neigh/*; do + [ -f "$file" ] && return 0 + done + + return 1 +} + append_bool() { local section="$1" local option="$2" local value="$3" + local default="$4" local _loctmp - config_get_bool _loctmp "$section" "$option" 0 + [ -z "$default" ] && default="0" + config_get_bool _loctmp "$section" "$option" "$default" [ $_loctmp -gt 0 ] && xappend "$value" } @@ -107,6 +125,10 @@ append_server() { xappend "--server=$1" } +append_rev_server() { + xappend "--rev-server=$1" +} + append_address() { xappend "--address=$1" } @@ -116,12 +138,12 @@ append_ipset() { } append_interface() { - network_get_device ifname "$1" || return + network_get_device ifname "$1" || ifname="$1" xappend "--interface=$ifname" } append_notinterface() { - network_get_device ifname "$1" || return + network_get_device ifname "$1" || ifname="$1" xappend "--except-interface=$ifname" } @@ -137,6 +159,10 @@ append_pxe_service() { xappend "--pxe-service=$1" } +append_interface_name() { + xappend "--interface-name=$1,$2" +} + filter_dnsmasq() { local cfg="$1" func="$2" match_cfg="$3" found_cfg @@ -180,6 +206,7 @@ dhcp_remoteid_add() { } dhcp_circuitid_add() { + # TODO: DHCPV6 does not have circuitid; catch "option6:" local cfg="$1" config_get networkid "$cfg" networkid @@ -212,6 +239,7 @@ dhcp_userclass_add() { } dhcp_vendorclass_add() { + # TODO: DHCPV6 vendor class has stricter definitions; catch? fixup? local cfg="$1" config_get networkid "$cfg" networkid @@ -245,6 +273,7 @@ dhcp_match_add() { dhcp_host_add() { local cfg="$1" + local hosttag nametime addrs duids config_get_bool force "$cfg" force 0 @@ -256,7 +285,9 @@ dhcp_host_add() { config_get name "$cfg" name config_get ip "$cfg" ip - [ -n "$ip" -o -n "$name" ] || return 0 + config_get hostid "$cfg" hostid + + [ -n "$ip" -o -n "$name" -o -n "$hostid" ] || return 0 config_get_bool dns "$cfg" dns 0 [ "$dns" = "1" -a -n "$ip" -a -n "$name" ] && { @@ -264,35 +295,105 @@ dhcp_host_add() { } config_get mac "$cfg" mac + config_get duid "$cfg" duid + config_get tag "$cfg" tag + if [ -n "$mac" ]; then # --dhcp-host=00:20:e0:3b:13:af,192.168.0.199,lap + # many MAC are possible to track a laptop ON/OFF dock macs="" for m in $mac; do append macs "$m" ","; done - else - # --dhcp-host=lap,192.168.0.199 + fi + + if [ $DNSMASQ_DHCP_VER -eq 6 -a -n "$duid" ]; then + # --dhcp-host=id:00:03:00:01:12:00:00:01:02:03,[::beef],lap + # one (virtual) machine gets one DUID per RFC3315 + duids="id:${duid// */}" + fi + + if [ -z "$macs" -a -z "$duids" ]; then + # --dhcp-host=lap,192.168.0.199,[::beef] [ -n "$name" ] || return 0 macs="$name" name="" fi - config_get tag "$cfg" tag + if [ -n "$hostid" ]; then + hex_to_hostid hostid "$hostid" + fi - if [ "$DHCPv6CAPABLE" -eq 1 ]; then - config_get hostid "$cfg" hostid - if [ -n "$hostid" ]; then - hex_to_hostid hostid "$hostid" - fi + tags="" + if [ -n "$tag" ]; then + for t in $tag; do append tags "$t" ",set:"; done fi config_get_bool broadcast "$cfg" broadcast 0 - [ "$broadcast" = "0" ] && broadcast= - config_get leasetime "$cfg" leasetime - xappend "--dhcp-host=$macs${networkid:+,net:$networkid}${broadcast:+,set:needs-broadcast}${tag:+,set:$tag}${ip:+,$ip${hostid:+,[::$hostid]}}${name:+,$name}${leasetime:+,$leasetime}" + [ "$broadcast" = "0" ] && broadcast= || broadcast=",set:needs-broadcast" + + hosttag="${networkid:+,set:${networkid}}${tags:+,set:${tags}}$broadcast" + nametime="${name:+,$name}${leasetime:+,$leasetime}" + + if [ $DNSMASQ_DHCP_VER -eq 6 ]; then + addrs="${ip:+,$ip}${hostid:+,[::$hostid]}" + xappend "--dhcp-host=$macs${duids:+,$duids}$hosttag$addrs$nametime" + else + xappend "--dhcp-host=$macs$hosttag${ip:+,$ip}$nametime" + fi +} + +dhcp_this_host_add() { + local net="$1" + local ifname="$2" + local mode="$3" + local routerstub routername ifdashname + local lanaddr lanaddr6 lanaddrs6 ulaprefix + + if [ "$mode" -gt 0 ] ; then + ifdashname="${ifname//./-}" + routerstub="$( md5sum /etc/os-release )" + routerstub="router-${routerstub// */}" + routername="$( uci_get system @system[0] hostname $routerstub )" + + if [ "$mode" -gt 1 ] ; then + if [ "$mode" -gt 2 ] ; then + if [ "$mode" -gt 3 ] ; then + append_interface_name "$ifdashname.$routername.$DOMAIN" "$ifname" + fi + + append_interface_name "$routername.$DOMAIN" "$ifname" + fi + + # All IP addresses discovered by dnsmasq will be labeled (except fe80::) + append_interface_name "$routername" "$ifname" + + else + # This uses a static host file entry for only limited addresses. + # Use dnsmasq option "--expandhosts" to enable FQDN on host files. + ulaprefix="$(uci_get network @globals[0] ula_prefix)" + network_get_ipaddr lanaddr "$net" + network_get_ipaddrs6 lanaddrs6 "$net" + + if [ -n "$lanaddr" ] ; then + dhcp_domain_add "" "$routername" "$lanaddr" + fi + + if [ -n "$ulaprefix" -a -n "$lanaddrs6" ] ; then + for lanaddr6 in $lanaddrs6 ; do + case "$lanaddr6" in + "${ulaprefix%%:/*}"*) + dhcp_domain_add "" "$routername" "$lanaddr6" + ;; + esac + done + fi + fi + fi } dhcp_tag_add() { + # NOTE: dnsmasq has explicit "option6:" prefix for DHCPv6 so no collisions local cfg="$1" tag="$cfg" @@ -323,6 +424,7 @@ dhcp_mac_add() { } dhcp_boot_add() { + # TODO: BOOTURL is different between DHCPv4 and DHCPv6 local cfg="$1" config_get networkid "$cfg" networkid @@ -345,24 +447,30 @@ dhcp_boot_add() { dhcp_add() { local cfg="$1" + local dhcp6range="::" + local nettag + local tags + config_get net "$cfg" interface [ -n "$net" ] || return 0 - config_get dhcpv4 "$cfg" dhcpv4 - [ "$dhcpv4" != "disabled" ] || return 0 - config_get networkid "$cfg" networkid [ -n "$networkid" ] || networkid="$net" - network_get_subnet subnet "$net" || return 0 network_get_device ifname "$net" || return 0 - network_get_protocol proto "$net" || return 0 [ "$cachelocal" = "0" ] && network_get_dnsserver dnsserver "$net" && { DNS_SERVERS="$DNS_SERVERS $dnsserver" } - append_bool "$cfg" ignore "--no-dhcp-interface=$ifname" && return 0 + append_bool "$cfg" ignore "--no-dhcp-interface=$ifname" && { + # Many ISP do not have useful names for DHCP customers (your WAN). + dhcp_this_host_add "$net" "$ifname" "$ADD_WAN_FQDN" + return 0 + } + + network_get_subnet subnet "$net" || return 0 + network_get_protocol proto "$net" || return 0 # Do not support non-static interfaces for now [ static = "$proto" ] || return 0 @@ -374,35 +482,142 @@ dhcp_add() { config_get_bool force "$cfg" force 0 [ $force -gt 0 ] || dhcp_check "$ifname" || return 0 - config_get start "$cfg" start - config_get limit "$cfg" limit - config_get leasetime "$cfg" leasetime + config_get start "$cfg" start 100 + config_get limit "$cfg" limit 150 + config_get leasetime "$cfg" leasetime 12h config_get options "$cfg" options config_get_bool dynamicdhcp "$cfg" dynamicdhcp 1 - leasetime="${leasetime:-12h}" - start="$(dhcp_calc "${start:-100}")" - limit="${limit:-150}" - [ "$limit" -gt 0 ] && limit=$((limit-1)) - eval "$(ipcalc.sh "${subnet%%/*}" $netmask $start $limit)" - if [ "$dynamicdhcp" = "0" ]; then END="static"; fi - xappend "--dhcp-range=$networkid,$START,$END,$NETMASK,$leasetime${options:+ $options}" + config_get dhcpv4 "$cfg" dhcpv4 + config_get dhcpv6 "$cfg" dhcpv6 - dhcp_option_add "$cfg" "$networkid" + config_get ra "$cfg" ra + config_get ra_management "$cfg" ra_management + config_get ra_preference "$cfg" ra_preference + config_get dns "$cfg" dns + + config_list_foreach "$cfg" "interface_name" append_interface_name "$ifname" + + # Put the router host name on this DHCP served interface address(es) + dhcp_this_host_add "$net" "$ifname" "$ADD_LOCAL_FQDN" + + start="$( dhcp_calc "$start" )" + + add_tag() { + tags="${tags}tag:$1," + } + config_list_foreach "$cfg" tag add_tag + + nettag="${networkid:+set:${networkid},}" + + if [ "$limit" -gt 0 ] ; then + limit=$((limit-1)) + fi + + eval "$(ipcalc.sh "${subnet%%/*}" $netmask $start $limit)" + + if [ "$dynamicdhcp" = "0" ] ; then + END="static" + dhcp6range="::,static" + else + dhcp6range="::1000,::ffff" + fi + + + if [ "$dhcpv4" != "disabled" ] ; then + xappend "--dhcp-range=$tags$nettag$START,$END,$NETMASK,$leasetime${options:+ $options}" + fi + + + if [ $DNSMASQ_DHCP_VER -eq 6 -a "$ra" = "server" ] ; then + # Note: dnsmasq cannot just be a DHCPv6 server (all-in-1) + # and let some other machine(s) send RA pointing to it. + + case $ra_preference in + *high*) + xappend "--ra-param=$ifname,high,0,7200" + ;; + *low*) + xappend "--ra-param=$ifname,low,0,7200" + ;; + *) + # Send UNSOLICITED RA at default interval and live for 2 hours. + # TODO: convert flexible lease time into route life time (only seconds). + xappend "--ra-param=$ifname,0,7200" + ;; + esac + + if [ "$dhcpv6" = "disabled" ] ; then + ra_management="3" + fi + + + case $ra_management in + 0) + # SLACC with DCHP for extended options + xappend "--dhcp-range=$nettag::,constructor:$ifname,ra-stateless,ra-names" + ;; + 2) + # DHCP address and RA only for management redirection + xappend "--dhcp-range=$nettag$dhcp6range,constructor:$ifname,$leasetime" + ;; + 3) + # SLAAC only but dnsmasq attempts to link HOSTNAME, DHCPv4 MAC, and SLAAC + xappend "--dhcp-range=$nettag::,constructor:$ifname,ra-only,ra-names" + ;; + *) + # SLAAC and full DHCP + xappend "--dhcp-range=$nettag$dhcp6range,constructor:$ifname,slaac,ra-names,$leasetime" + ;; + esac + + if [ -n "$dns" ]; then + dnss="" + for d in $dns; do append dnss "[$d]" ","; done + else + dnss="[::]" + fi + + dhcp_option_append "option6:dns-server,$dnss" "$networkid" + fi + + dhcp_option_add "$cfg" "$networkid" 0 + dhcp_option_add "$cfg" "$networkid" 2 } -dhcp_option_add() { - local cfg="$1" +dhcp_option_append() { + local option="$1" local networkid="$2" local force="$3" + xappend "--dhcp-option${force:+-force}=${networkid:+$networkid,}$option" +} + +dhcp_option_add() { + # NOTE: dnsmasq has explicit "option6:" prefix for DHCPv6 so no collisions + local cfg="$1" + local networkid="$2" + local force="$3" + local opt="dhcp_option" + [ "$force" = "0" ] && force= + [ "$force" = "2" ] && opt="dhcp_option_force" - config_get dhcp_option "$cfg" dhcp_option - for o in $dhcp_option; do - xappend "--dhcp-option${force:+-force}=${networkid:+$networkid,}$o" - done + local list_len + config_get list_len "$cfg" "${opt}_LENGTH" + if [ -n "$list_len" ]; then + config_list_foreach "$cfg" "$opt" dhcp_option_append "$networkid" "$force" + else + config_get dhcp_option "$cfg" "$opt" + + [ -n "$dhcp_option" ] && echo "Warning: the 'option $opt' syntax is deprecated, use 'list $opt'" >&2 + + local option + for option in $dhcp_option; do + dhcp_option_append "$option" "$networkid" "$force" + done + fi } dhcp_domain_add() { @@ -507,13 +722,14 @@ dhcp_relay_add() { if [ -z "$interface" ]; then xappend "--dhcp-relay=$local_addr,$server_addr" else - xappend "--dhcp-relay=$local_addr,$server_addr,$interface" + network_get_device ifname "$interface" || return + xappend "--dhcp-relay=$local_addr,$server_addr,$ifname" fi } dnsmasq_start() { - local cfg="$1" disabled + local cfg="$1" disabled resolvfile user_dhcpscript config_get_bool disabled "$cfg" disabled 0 [ "$disabled" -gt 0 ] && return 0 @@ -546,6 +762,41 @@ dnsmasq_start() $PROG --version | grep -osqE "^Compile time options:.* DHCPv6( |$)" && DHCPv6CAPABLE=1 || DHCPv6CAPABLE=0 + + if [ -x /usr/sbin/odhcpd -a -x /etc/init.d/odhcpd ] ; then + local odhcpd_is_main odhcpd_is_enabled + config_get odhcpd_is_main odhcpd maindhcp 0 + /etc/init.d/odhcpd enabled && odhcpd_is_enabled=1 || odhcpd_is_enabled=0 + + + if [ "$odhcpd_is_enabled" -eq 0 -a "$DHCPv6CAPABLE" -eq 1 ] ; then + # DHCP V4 and V6 in DNSMASQ + DNSMASQ_DHCP_VER=6 + elif [ "$odhcpd_is_main" -gt 0 ] ; then + # ODHCPD is doing it all + DNSMASQ_DHCP_VER=0 + else + # You have ODHCPD but use DNSMASQ for DHCPV4 + DNSMASQ_DHCP_VER=4 + fi + + elif [ "$DHCPv6CAPABLE" -eq 1 ] ; then + # DHCP V4 and V6 in DNSMASQ + DNSMASQ_DHCP_VER=6 + else + DNSMASQ_DHCP_VER=4 + fi + + # Allow DHCP/DHCPv6 to be handled by ISC DHCPD + if [ -x /usr/sbin/dhcpd ] ; then + if [ -x /etc/init.d/dhcpd ] ; then + /etc/init.d/dhcpd enabled && DNSMASQ_DHCP_VER=0 + fi + if [ -x /etc/init.d/dhcpd6 -a "$DNSMASQ_DHCP_VER" -gt 0 ] ; then + /etc/init.d/dhcpd6 enabled && DNSMASQ_DHCP_VER=4 + fi + fi + append_bool "$cfg" authoritative "--dhcp-authoritative" append_bool "$cfg" nodaemon "--no-daemon" append_bool "$cfg" domainneeded "--domain-needed" @@ -558,12 +809,11 @@ dnsmasq_start() append_bool "$cfg" localise_queries "--localise-queries" append_bool "$cfg" readethers "--read-ethers" append_bool "$cfg" dbus "--enable-dbus" - append_bool "$cfg" boguspriv "--bogus-priv" append_bool "$cfg" expandhosts "--expand-hosts" config_get tftp_root "$cfg" "tftp_root" - [ -d "$tftp_root" ] && append_bool "$cfg" enable_tftp "--enable-tftp" + [ -n "$tftp_root" ] && mkdir -p "$tftp_root" && append_bool "$cfg" enable_tftp "--enable-tftp" append_bool "$cfg" tftp_no_fail "--tftp-no-fail" - append_bool "$cfg" nonwildcard "--bind-dynamic" + append_bool "$cfg" nonwildcard "--bind-dynamic" 1 append_bool "$cfg" fqdn "--dhcp-fqdn" append_bool "$cfg" proxydnssec "--proxy-dnssec" append_bool "$cfg" localservice "--local-service" @@ -573,7 +823,8 @@ dnsmasq_start() append_bool "$cfg" allservers "--all-servers" append_bool "$cfg" noping "--no-ping" - append_parm "$cfg" dhcpscript "--dhcp-script" + append_parm "$cfg" logfacility "--log-facility" + append_parm "$cfg" cachesize "--cache-size" append_parm "$cfg" dnsforwardmax "--dns-forward-max" append_parm "$cfg" port "--port" @@ -585,6 +836,7 @@ dnsmasq_start() append_parm "$cfg" "domain" "--domain" append_parm "$cfg" "local" "--server" config_list_foreach "$cfg" "server" append_server + config_list_foreach "$cfg" "rev_server" append_rev_server config_list_foreach "$cfg" "address" append_address config_list_foreach "$cfg" "ipset" append_ipset config_list_foreach "$cfg" "interface" append_interface @@ -592,7 +844,6 @@ dnsmasq_start() config_list_foreach "$cfg" "addnhosts" append_addnhosts config_list_foreach "$cfg" "bogusnxdomain" append_bogusnxdomain append_parm "$cfg" "leasefile" "--dhcp-leasefile" "/tmp/dhcp.leases" - append_parm "$cfg" "resolvfile" "--resolv-file" "/tmp/resolv.conf.auto" append_parm "$cfg" "serversfile" "--servers-file" append_parm "$cfg" "tftp_root" "--tftp-root" append_parm "$cfg" "dhcp_boot" "--dhcp-boot" @@ -603,12 +854,21 @@ dnsmasq_start() config_get_bool ADD_LOCAL_DOMAIN "$cfg" add_local_domain 1 config_get_bool ADD_LOCAL_HOSTNAME "$cfg" add_local_hostname 1 + config_get ADD_LOCAL_FQDN "$cfg" add_local_fqdn "" + config_get ADD_WAN_FQDN "$cfg" add_wan_fqdn 0 + + if [ -z "$ADD_LOCAL_FQDN" ] ; then + # maintain support for previous UCI + ADD_LOCAL_FQDN="$ADD_LOCAL_HOSTNAME" + fi config_get_bool readethers "$cfg" readethers [ "$readethers" = "1" -a \! -e "/etc/ethers" ] && touch /etc/ethers - config_get resolvfile $cfg resolvfile - config_get dhcpscript $cfg dhcpscript + config_get user_dhcpscript $cfg dhcpscript + if has_handler || [ -n "$user_dhcpscript" ]; then + xappend "--dhcp-script=$DHCPSCRIPT" + fi config_get leasefile $cfg leasefile "/tmp/dhcp.leases" [ -n "$leasefile" -a \! -e "$leasefile" ] && touch "$leasefile" @@ -621,6 +881,8 @@ dnsmasq_start() [ -n "$resolvfile" -a \! -e "$resolvfile" ] && touch "$resolvfile" fi + [ -n "$resolvfile" ] && xappend "--resolv-file=$resolvfile" + config_get hostsfile "$cfg" dhcphostsfile [ -e "$hostsfile" ] && xappend "--dhcp-hostsfile=$hostsfile" @@ -667,10 +929,11 @@ dnsmasq_start() } dhcp_option_add "$cfg" "" 0 + dhcp_option_add "$cfg" "" 2 xappend "--dhcp-broadcast=tag:needs-broadcast" - xappend "--addn-hosts=$HOSTFILE" + xappend "--addn-hosts=$(dirname $HOSTFILE)" config_get dnsmasqconfdir "$cfg" confdir "/tmp/dnsmasq.d" [ ! -d "$dnsmasqconfdir" ] && mkdir -p $dnsmasqconfdir @@ -700,37 +963,31 @@ dnsmasq_start() config_foreach filter_dnsmasq hostrecord dhcp_hostrecord_add "$cfg" config_foreach filter_dnsmasq relay dhcp_relay_add "$cfg" - # add own hostname - [ $ADD_LOCAL_HOSTNAME -eq 1 ] && { - local lanaddr lanaddr6 - local ulaprefix="$(uci_get network @globals[0] ula_prefix)" - local hostname="$(uci_get system @system[0] hostname Lede)" - - network_get_ipaddr lanaddr "lan" && { - dhcp_domain_add "" "$hostname" "$lanaddr" - } - - [ -n "$ulaprefix" ] && network_get_ipaddrs6 lanaddr6 "lan" && { - for lanaddr6 in $lanaddr6; do - case "$lanaddr6" in - "${ulaprefix%%:/*}"*) - dhcp_domain_add "" "$hostname" "$lanaddr6" - ;; - esac - done - } - } - echo >> $CONFIGFILE_TMP config_foreach filter_dnsmasq srvhost dhcp_srv_add "$cfg" config_foreach filter_dnsmasq mxhost dhcp_mx_add "$cfg" echo >> $CONFIGFILE_TMP - config_get odhcpd_is_active odhcpd maindhcp - if [ "$odhcpd_is_active" != "1" ]; then + config_get_bool boguspriv "$cfg" boguspriv 1 + [ "$boguspriv" -gt 0 ] && { + xappend "--bogus-priv" + [ -r "$RFC6761FILE" ] && xappend "--conf-file=$RFC6761FILE" + } + + if [ "$DNSMASQ_DHCP_VER" -gt 4 ] ; then + # Enable RA feature for when/if it is constructed, + # and RA is selected per interface pool (RA, DHCP, or both), + # but no one (should) want RA broadcast in syslog + config_foreach filter_dnsmasq dhcp dhcp_add "$cfg" + xappend "--enable-ra" + xappend "--quiet-ra" + append_bool "$cfg" quietdhcp "--quiet-dhcp6" + + elif [ "$DNSMASQ_DHCP_VER" -gt 0 ] ; then config_foreach filter_dnsmasq dhcp dhcp_add "$cfg" fi + echo >> $CONFIGFILE_TMP config_foreach filter_dnsmasq cname dhcp_cname_add "$cfg" echo >> $CONFIGFILE_TMP @@ -752,6 +1009,7 @@ dnsmasq_start() procd_open_instance $cfg procd_set_param command $PROG -C $CONFIGFILE -k -x /var/run/dnsmasq/dnsmasq."${cfg}".pid procd_set_param file $CONFIGFILE + [ -n "$user_dhcpscript" ] && procd_set_param env USER_DHCPSCRIPT="$user_dhcpscript" procd_set_param respawn local dnsmasqconffile="/etc/dnsmasq.${cfg}.conf" @@ -760,7 +1018,7 @@ dnsmasq_start() fi procd_add_jail dnsmasq ubus log - procd_add_jail_mount $CONFIGFILE $TRUSTANCHORSFILE $HOSTFILE /etc/passwd /etc/group /etc/TZ /dev/null /dev/urandom $dnsmasqconffile $dnsmasqconfdir $resolvfile $dhcpscript /etc/hosts /etc/ethers $EXTRA_MOUNT + procd_add_jail_mount $CONFIGFILE $TRUSTANCHORSFILE $HOSTFILE $RFC6761FILE /etc/passwd /etc/group /etc/TZ /dev/null /dev/urandom $dnsmasqconffile $dnsmasqconfdir $resolvfile $user_dhcpscript /etc/hosts /etc/ethers /sbin/hotplug-call $EXTRA_MOUNT $DHCPSCRIPT procd_add_jail_mount_rw /var/run/dnsmasq/ $leasefile procd_close_instance diff --git a/package/network/services/dnsmasq/files/dnsmasq_acl.json b/package/network/services/dnsmasq/files/dnsmasq_acl.json new file mode 100644 index 000000000..00ec7d0f0 --- /dev/null +++ b/package/network/services/dnsmasq/files/dnsmasq_acl.json @@ -0,0 +1,4 @@ +{ + "user": "dnsmasq", + "publish": [ "dnsmasq" ] +} diff --git a/package/network/services/dnsmasq/files/dnsmasqsec.hotplug b/package/network/services/dnsmasq/files/dnsmasqsec.hotplug index 5c69314bd..a155eb0f6 100644 --- a/package/network/services/dnsmasq/files/dnsmasqsec.hotplug +++ b/package/network/services/dnsmasq/files/dnsmasqsec.hotplug @@ -1,5 +1,7 @@ #!/bin/sh +. /lib/functions/procd.sh + TIMEVALIDFILE="/var/state/dnsmasqsec" [ "$ACTION" = stratum ] || exit 0 @@ -7,8 +9,6 @@ TIMEVALIDFILE="/var/state/dnsmasqsec" [ -f "$TIMEVALIDFILE" ] || { echo "ntpd says time is valid" >$TIMEVALIDFILE /etc/init.d/dnsmasq enabled && { - pid=$(pidof dnsmasq) - [ "$(readlink /proc/$pid/exe)" = "/usr/sbin/dnsmasq" ] && kill -SIGHUP $pid \ - || /etc/init.d/dnsmasq restart + procd_send_signal dnsmasq } } diff --git a/package/network/services/dnsmasq/files/rfc6761.conf b/package/network/services/dnsmasq/files/rfc6761.conf new file mode 100644 index 000000000..ebc1a1211 --- /dev/null +++ b/package/network/services/dnsmasq/files/rfc6761.conf @@ -0,0 +1,15 @@ +# RFC6761 included configuration file for dnsmasq +# +# includes a list of domains that should not be forwarded to Internet name servers +# to reduce burden on them, asking questions that they won't know the answer to. + +server=/bind/ +server=/example/ +server=/example.com/ +server=/example.org/ +server=/example.net/ +server=/invalid/ +server=/local/ +server=/localhost/ +server=/onion/ +server=/test/ diff --git a/package/network/services/dnsmasq/patches/100-fix-dhcp-no-address-warning.patch b/package/network/services/dnsmasq/patches/100-fix-dhcp-no-address-warning.patch deleted file mode 100644 index 5fc62ffab..000000000 --- a/package/network/services/dnsmasq/patches/100-fix-dhcp-no-address-warning.patch +++ /dev/null @@ -1,47 +0,0 @@ ---- a/src/dhcp.c -+++ b/src/dhcp.c -@@ -147,7 +147,7 @@ void dhcp_packet(time_t now, int pxe_fd) - ssize_t sz; - int iface_index = 0, unicast_dest = 0, is_inform = 0; - int rcvd_iface_index; -- struct in_addr iface_addr; -+ struct in_addr iface_addr, *addrp = NULL; - struct iface_param parm; - #ifdef HAVE_LINUX_NETWORK - struct arpreq arp_req; -@@ -277,11 +277,9 @@ void dhcp_packet(time_t now, int pxe_fd) - { - ifr.ifr_addr.sa_family = AF_INET; - if (ioctl(daemon->dhcpfd, SIOCGIFADDR, &ifr) != -1 ) -- iface_addr = ((struct sockaddr_in *) &ifr.ifr_addr)->sin_addr; -- else - { -- my_syslog(MS_DHCP | LOG_WARNING, _("DHCP packet received on %s which has no address"), ifr.ifr_name); -- return; -+ addrp = &iface_addr; -+ iface_addr = ((struct sockaddr_in *) &ifr.ifr_addr)->sin_addr; - } - - for (tmp = daemon->dhcp_except; tmp; tmp = tmp->next) -@@ -300,7 +298,7 @@ void dhcp_packet(time_t now, int pxe_fd) - parm.relay_local.s_addr = 0; - parm.ind = iface_index; - -- if (!iface_check(AF_INET, (struct all_addr *)&iface_addr, ifr.ifr_name, NULL)) -+ if (!iface_check(AF_INET, (struct all_addr *)addrp, ifr.ifr_name, NULL)) - { - /* If we failed to match the primary address of the interface, see if we've got a --listen-address - for a secondary */ -@@ -320,6 +318,12 @@ void dhcp_packet(time_t now, int pxe_fd) - complete_context(match.addr, iface_index, NULL, match.netmask, match.broadcast, &parm); - } - -+ if (!addrp) -+ { -+ my_syslog(MS_DHCP | LOG_WARNING, _("DHCP packet received on %s which has no address"), ifr.ifr_name); -+ return; -+ } -+ - if (!iface_enumerate(AF_INET, &parm, complete_context)) - return; - diff --git a/package/network/services/dnsmasq/patches/110-ipset-remove-old-kernel-support.patch b/package/network/services/dnsmasq/patches/110-ipset-remove-old-kernel-support.patch index 61b09d5b2..88e334b0f 100644 --- a/package/network/services/dnsmasq/patches/110-ipset-remove-old-kernel-support.patch +++ b/package/network/services/dnsmasq/patches/110-ipset-remove-old-kernel-support.patch @@ -44,67 +44,22 @@ (buffer = safe_malloc(BUFF_SZ)) && (ipset_sock = socket(AF_NETLINK, SOCK_RAW, NETLINK_NETFILTER)) != -1 && (bind(ipset_sock, (struct sockaddr *)&snl, sizeof(snl)) != -1)) -@@ -168,62 +149,16 @@ static int new_add_to_ipset(const char * - } - - --static int old_add_to_ipset(const char *setname, const struct all_addr *ipaddr, int remove) --{ -- socklen_t size; -- struct ip_set_req_adt_get { -- unsigned op; -- unsigned version; -- union { -- char name[IPSET_MAXNAMELEN]; -- uint16_t index; -- } set; -- char typename[IPSET_MAXNAMELEN]; -- } req_adt_get; -- struct ip_set_req_adt { -- unsigned op; -- uint16_t index; -- uint32_t ip; -- } req_adt; -- -- if (strlen(setname) >= sizeof(req_adt_get.set.name)) -- { -- errno = ENAMETOOLONG; -- return -1; -- } -- -- req_adt_get.op = 0x10; -- req_adt_get.version = 3; -- strcpy(req_adt_get.set.name, setname); -- size = sizeof(req_adt_get); -- if (getsockopt(ipset_sock, SOL_IP, 83, &req_adt_get, &size) < 0) -- return -1; -- req_adt.op = remove ? 0x102 : 0x101; -- req_adt.index = req_adt_get.set.index; -- req_adt.ip = ntohl(ipaddr->addr.addr4.s_addr); -- if (setsockopt(ipset_sock, SOL_IP, 83, &req_adt, sizeof(req_adt)) < 0) -- return -1; -- -- return 0; --} -- -- -- - int add_to_ipset(const char *setname, const struct all_addr *ipaddr, int flags, int remove) - { - int af = AF_INET; - - #ifdef HAVE_IPV6 +@@ -217,17 +198,10 @@ int add_to_ipset(const char *setname, co if (flags & F_IPV6) -- { + { af = AF_INET6; - /* old method only supports IPv4 */ - if (old_kernel) -- return -1; -- } +- { +- errno = EAFNOSUPPORT ; +- ret = -1; +- } + } #endif -- return old_kernel ? old_add_to_ipset(setname, ipaddr, remove) : new_add_to_ipset(setname, ipaddr, af, remove); -+ return new_add_to_ipset(setname, ipaddr, af, remove); - } +- if (ret != -1) +- ret = old_kernel ? old_add_to_ipset(setname, ipaddr, remove) : new_add_to_ipset(setname, ipaddr, af, remove); ++ ret = new_add_to_ipset(setname, ipaddr, af, remove); - #endif + if (ret == -1) + my_syslog(LOG_ERR, _("failed to update ipset %s: %s"), setname, strerror(errno)); diff --git a/package/network/services/dnsmasq/patches/120-dnsmasq-compile-time-option-NO_ID.patch b/package/network/services/dnsmasq/patches/120-dnsmasq-compile-time-option-NO_ID.patch deleted file mode 100644 index 152d1a7fa..000000000 --- a/package/network/services/dnsmasq/patches/120-dnsmasq-compile-time-option-NO_ID.patch +++ /dev/null @@ -1,149 +0,0 @@ -From f6bea86c78ba9efbd01da3dd2fb18764ec806290 Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Wed, 7 Sep 2016 09:35:07 +0100 -Subject: [PATCH] dnsmasq: compile time option NO_ID - -Some consider it good practice to obscure software version numbers to -clients. Compiling with -DNO_ID removes the *.bind info structure. -This includes: version, author, copyright, cachesize, cache insertions, -evictions, misses & hits, auth & servers. - -Signed-off-by: Kevin Darbyshire-Bryant ---- - src/cache.c | 2 ++ - src/config.h | 5 +++++ - src/dnsmasq.h | 4 ++++ - src/option.c | 8 ++++++-- - src/rfc1035.c | 3 ++- - 5 files changed, 19 insertions(+), 3 deletions(-) - ---- a/src/cache.c -+++ b/src/cache.c -@@ -1290,6 +1290,7 @@ void cache_add_dhcp_entry(char *host_nam - } - #endif - -+#ifndef NO_ID - int cache_make_stat(struct txt_record *t) - { - static char *buff = NULL; -@@ -1385,6 +1386,7 @@ int cache_make_stat(struct txt_record *t - *buff = len; - return 1; - } -+#endif - - /* There can be names in the cache containing control chars, don't - mess up logging or open security holes. */ ---- a/src/config.h -+++ b/src/config.h -@@ -120,6 +120,8 @@ HAVE_LOOP - HAVE_INOTIFY - use the Linux inotify facility to efficiently re-read configuration files. - -+NO_ID -+ Don't report *.bind CHAOS info to clients. - NO_IPV6 - NO_TFTP - NO_DHCP -@@ -434,6 +436,9 @@ static char *compile_opts = - "no-" - #endif - "DNSSEC " -+#ifdef NO_ID -+"no-ID " -+#endif - #ifndef HAVE_LOOP - "no-" - #endif ---- a/src/dnsmasq.h -+++ b/src/dnsmasq.h -@@ -286,6 +286,7 @@ struct naptr { - struct naptr *next; - }; - -+#ifndef NO_ID - #define TXT_STAT_CACHESIZE 1 - #define TXT_STAT_INSERTS 2 - #define TXT_STAT_EVICTIONS 3 -@@ -293,6 +294,7 @@ struct naptr { - #define TXT_STAT_HITS 5 - #define TXT_STAT_AUTH 6 - #define TXT_STAT_SERVERS 7 -+#endif - - struct txt_record { - char *name; -@@ -1078,7 +1080,9 @@ void cache_add_dhcp_entry(char *host_nam - struct in_addr a_record_from_hosts(char *name, time_t now); - void cache_unhash_dhcp(void); - void dump_cache(time_t now); -+#ifndef NO_ID - int cache_make_stat(struct txt_record *t); -+#endif - char *cache_get_name(struct crec *crecp); - char *cache_get_cname_target(struct crec *crecp); - struct crec *cache_enumerate(int init); ---- a/src/option.c -+++ b/src/option.c -@@ -657,7 +657,8 @@ static int atoi_check8(char *a, int *res - return 1; - } - #endif -- -+ -+#ifndef NO_ID - static void add_txt(char *name, char *txt, int stat) - { - struct txt_record *r = opt_malloc(sizeof(struct txt_record)); -@@ -670,13 +671,14 @@ static void add_txt(char *name, char *tx - *(r->txt) = len; - memcpy((r->txt)+1, txt, len); - } -- -+ - r->stat = stat; - r->name = opt_string_alloc(name); - r->next = daemon->txt; - daemon->txt = r; - r->class = C_CHAOS; - } -+#endif - - static void do_usage(void) - { -@@ -4515,6 +4517,7 @@ void read_opts(int argc, char **argv, ch - daemon->soa_expiry = SOA_EXPIRY; - daemon->max_port = MAX_PORT; - -+#ifndef NO_ID - add_txt("version.bind", "dnsmasq-" VERSION, 0 ); - add_txt("authors.bind", "Simon Kelley", 0); - add_txt("copyright.bind", COPYRIGHT, 0); -@@ -4527,6 +4530,7 @@ void read_opts(int argc, char **argv, ch - add_txt("auth.bind", NULL, TXT_STAT_AUTH); - #endif - add_txt("servers.bind", NULL, TXT_STAT_SERVERS); -+#endif - - while (1) - { ---- a/src/rfc1035.c -+++ b/src/rfc1035.c -@@ -1264,6 +1264,7 @@ size_t answer_request(struct dns_header - unsigned long ttl = daemon->local_ttl; - int ok = 1; - log_query(F_CONFIG | F_RRNAME, name, NULL, ""); -+#ifndef NO_ID - /* Dynamically generate stat record */ - if (t->stat != 0) - { -@@ -1271,7 +1272,7 @@ size_t answer_request(struct dns_header - if (!cache_make_stat(t)) - ok = 0; - } -- -+#endif - if (ok && add_resource_record(header, limit, &trunc, nameoffset, &ansp, - ttl, NULL, - T_TXT, t->class, "t", t->len, t->txt)) diff --git a/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch b/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch index ca5a80669..2f854d490 100644 --- a/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch +++ b/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch @@ -35,13 +35,13 @@ Signed-off-by: Steven Barth + if (difftime(now, base) >= 0 && difftime(timestamp_time, now) <= 0) { /* time already OK, update timestamp, and do key checking from the start. */ - if (utime(daemon->timestamp_file, NULL) == -1) + if (utimes(daemon->timestamp_file, NULL) == -1) @@ -493,7 +500,7 @@ int setup_timestamp(void) close(fd); -- timestamp_time = timbuf.actime = timbuf.modtime = 1420070400; /* 1-1-2015 */ -+ timestamp_time = timbuf.actime = timbuf.modtime = base; - if (utime(daemon->timestamp_file, &timbuf) == 0) - goto check_and_exit; - } +- timestamp_time = 1420070400; /* 1-1-2015 */ ++ timestamp_time = base; /* 1-1-2015 */ + tv[0].tv_sec = tv[1].tv_sec = timestamp_time; + tv[0].tv_usec = tv[1].tv_usec = 0; + if (utimes(daemon->timestamp_file, tv) == 0) diff --git a/package/network/services/dnsmasq/patches/230-fix-poll-h-include-warning-on-musl.patch b/package/network/services/dnsmasq/patches/230-fix-poll-h-include-warning-on-musl.patch index 19300f7d6..37b11abc1 100644 --- a/package/network/services/dnsmasq/patches/230-fix-poll-h-include-warning-on-musl.patch +++ b/package/network/services/dnsmasq/patches/230-fix-poll-h-include-warning-on-musl.patch @@ -7,7 +7,7 @@ Signed-off-by: Kevin Darbyshire-Bryant --- a/src/dnsmasq.h +++ b/src/dnsmasq.h -@@ -82,7 +82,7 @@ typedef unsigned long long u64; +@@ -88,7 +88,7 @@ typedef unsigned long long u64; #if defined(HAVE_SOLARIS_NETWORK) # include #endif diff --git a/package/network/services/dnsmasq/patches/240-ubus.patch b/package/network/services/dnsmasq/patches/240-ubus.patch new file mode 100644 index 000000000..2d37b5d2f --- /dev/null +++ b/package/network/services/dnsmasq/patches/240-ubus.patch @@ -0,0 +1,126 @@ +--- a/src/dnsmasq.c ++++ b/src/dnsmasq.c +@@ -19,6 +19,8 @@ + + #include "dnsmasq.h" + ++#include ++ + struct daemon *daemon; + + static volatile pid_t pid = 0; +@@ -32,6 +34,62 @@ static void fatal_event(struct event_des + static int read_event(int fd, struct event_desc *evp, char **msg); + static void poll_resolv(int force, int do_reload, time_t now); + ++static struct ubus_context *ubus; ++static struct blob_buf b; ++ ++static struct ubus_object_type ubus_object_type = { ++ .name = "dnsmasq", ++}; ++ ++static struct ubus_object ubus_object = { ++ .name = "dnsmasq", ++ .type = &ubus_object_type, ++}; ++ ++void ubus_event_bcast(const char *type, const char *mac, const char *ip, const char *name) ++{ ++ if (!ubus || !ubus_object.has_subscribers) ++ return; ++ ++ blob_buf_init(&b, 0); ++ if (mac) ++ blobmsg_add_string(&b, "mac", mac); ++ if (ip) ++ blobmsg_add_string(&b, "ip", ip); ++ if (name) ++ blobmsg_add_string(&b, "name", name); ++ ubus_notify(ubus, &ubus_object, type, b.head, -1); ++} ++ ++static void set_ubus_listeners(void) ++{ ++ if (!ubus) ++ return; ++ ++ poll_listen(ubus->sock.fd, POLLIN); ++ poll_listen(ubus->sock.fd, POLLERR); ++ poll_listen(ubus->sock.fd, POLLHUP); ++} ++ ++static void check_ubus_listeners() ++{ ++ if (!ubus) { ++ ubus = ubus_connect(NULL); ++ if (ubus) ++ ubus_add_object(ubus, &ubus_object); ++ else ++ return; ++ } ++ ++ if (poll_check(ubus->sock.fd, POLLIN)) ++ ubus_handle_event(ubus); ++ ++ if (poll_check(ubus->sock.fd, POLLHUP)) { ++ ubus_free(ubus); ++ ubus = NULL; ++ } ++} ++ + int main (int argc, char **argv) + { + int bind_fallback = 0; +@@ -911,6 +969,7 @@ int main (int argc, char **argv) + set_dbus_listeners(); + #endif + ++ set_ubus_listeners(); + #ifdef HAVE_DHCP + if (daemon->dhcp || daemon->relay4) + { +@@ -1041,6 +1100,8 @@ int main (int argc, char **argv) + check_dbus_listeners(); + #endif + ++ check_ubus_listeners(); ++ + check_dns_listeners(now); + + #ifdef HAVE_TFTP +--- a/Makefile ++++ b/Makefile +@@ -85,7 +85,7 @@ all : $(BUILDDIR) + @cd $(BUILDDIR) && $(MAKE) \ + top="$(top)" \ + build_cflags="$(version) $(dbus_cflags) $(idn2_cflags) $(idn_cflags) $(ct_cflags) $(lua_cflags) $(nettle_cflags)" \ +- build_libs="$(dbus_libs) $(idn2_libs) $(idn_libs) $(ct_libs) $(lua_libs) $(sunos_libs) $(nettle_libs) $(gmp_libs)" \ ++ build_libs="$(dbus_libs) $(idn2_libs) $(idn_libs) $(ct_libs) $(lua_libs) $(sunos_libs) $(nettle_libs) $(gmp_libs) -lubox -lubus" \ + -f $(top)/Makefile dnsmasq + + mostly_clean : +--- a/src/dnsmasq.h ++++ b/src/dnsmasq.h +@@ -1397,6 +1397,8 @@ void emit_dbus_signal(int action, struct + # endif + #endif + ++void ubus_event_bcast(const char *type, const char *mac, const char *ip, const char *name); ++ + /* ipset.c */ + #ifdef HAVE_IPSET + void ipset_init(void); +--- a/src/rfc2131.c ++++ b/src/rfc2131.c +@@ -1621,6 +1621,10 @@ static void log_packet(char *type, void + daemon->namebuff, + string ? string : "", + err ? err : ""); ++ if (!strcmp(type, "DHCPACK")) ++ ubus_event_bcast("dhcp.ack", addr ? inet_ntoa(a) : NULL, daemon->namebuff, string ? string : NULL); ++ else if (!strcmp(type, "DHCPRELEASE")) ++ ubus_event_bcast("dhcp.release", addr ? inet_ntoa(a) : NULL, daemon->namebuff, string ? string : NULL); + } + + static void log_options(unsigned char *start, u32 xid) From abbbbec60af71b312370a059e0b2b3c80078163e Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 22:37:33 +0800 Subject: [PATCH 05/15] ath10k-ct driver and firmware stable fix --- package/firmware/ath10k-firmware/Makefile | 20 +++++------ package/kernel/ath10k-ct/Makefile | 17 +++++---- .../ath10k-ct/patches/100-kernel_compat.patch | 12 +++---- .../ath10k-ct/patches/110-api_fix.patch | 2 +- .../patches/120-mac80211-4-14-api.patch | 6 ++-- ...te-user-space-firmware-loading-again.patch | 36 +++++++++++++++++++ 6 files changed, 67 insertions(+), 26 deletions(-) create mode 100644 package/kernel/ath10k-ct/patches/130-ath10k-activate-user-space-firmware-loading-again.patch diff --git a/package/firmware/ath10k-firmware/Makefile b/package/firmware/ath10k-firmware/Makefile index 5aac2616d..1ff1340a2 100644 --- a/package/firmware/ath10k-firmware/Makefile +++ b/package/firmware/ath10k-firmware/Makefile @@ -82,38 +82,38 @@ define Download/ct-firmware URL_FILE:=$($(1)_FIRMWARE_FILE_CT) endef -QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community.bin-19-rc5-lede +QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-19.bin.lede define Download/ath10k-firmware-qca988x-ct $(call Download/ct-firmware,QCA988X,) - HASH:=556d6a4df50cd94a229a240d6d1d108ed5910069902f1e0cbb57b02ede27690f + HASH:=bff98f028062dae9fc638c7596aec3c79bf9eddaff65cfacba067f6d72f217cd endef $(eval $(call Download,ath10k-firmware-qca988x-ct)) -QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community.bin-19-rc5-lede +QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-19.bin.lede define Download/ath10k-firmware-qca9887-ct $(call Download/ct-firmware,QCA9887,ath10k-9887) - HASH:=725982694156e0b891dcd1b1b18ba5318fbbe173f4ec9603ff7acbd08f7c4050 + HASH:=95dc106f98672bd9c7d3fe6881ed79ab079cb49b0a995650991b1beaff2b0101 endef $(eval $(call Download,ath10k-firmware-qca9887-ct)) -QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-9.bin-lede.002 +QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-9.bin-lede.004 define Download/ath10k-firmware-qca99x0-ct $(call Download/ct-firmware,QCA99X0,ath10k-10-4) - HASH:=e3c77077b47d55219f90816a51bf046f5b40c32be5e96bf629b083d873a879ad + HASH:=993c29fd64bb2a59b86d34f58601a1a48b83b541750bc511f78cc17152829b4d endef $(eval $(call Download,ath10k-firmware-qca99x0-ct)) -QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-9.bin-lede.002 +QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-9.bin-lede.004 define Download/ath10k-firmware-qca9984-ct $(call Download/ct-firmware,QCA9984,ath10k-9984-10-4) - HASH:=610f7747db6b101f4fc21431b776ac640b5977357e5be9aece2349447b9b1d85 + HASH:=d997eed9a8bc6809c01d367759ba8545c10e3be93ea1f33d6d753127ef0f7c5e endef $(eval $(call Download,ath10k-firmware-qca9984-ct)) -QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-9.bin-lede.002 +QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-9.bin-lede.004 define Download/ath10k-firmware-qca9888-ct $(call Download/ct-firmware,QCA9888,ath10k-9888-10-4) - HASH:=f92e7d7968698af7c6f2d76b31b3645589e03839e15838010ce457c635e5aae6 + HASH:=bbaa71bc7dcaa264c5875e86639f174908fed09fbace975e325959d42f3754ff endef $(eval $(call Download,ath10k-firmware-qca9888-ct)) diff --git a/package/kernel/ath10k-ct/Makefile b/package/kernel/ath10k-ct/Makefile index 85fe4eb46..a894773b7 100644 --- a/package/kernel/ath10k-ct/Makefile +++ b/package/kernel/ath10k-ct/Makefile @@ -8,13 +8,18 @@ PKG_LICENSE_FILES:= PKG_SOURCE_URL:=https://github.com/greearb/ath10k-ct.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2017-05-16 -PKG_SOURCE_VERSION:=c048ef0c3eedf99b41bc12b3f4e47ef3d9fab484 -PKG_MIRROR_HASH:=7936293962a10a0da7469759623013fc151019a6a584cfc6416bc0b605bd74d7 +PKG_SOURCE_DATE:=2017-06-13 +PKG_SOURCE_VERSION:=bded1823912549017d819d1796273b3134c3de20 +PKG_MIRROR_HASH:=616174650e12a82edb6b6bd18ac186e2c6a48fdad0082df9d2011ab20940814b PKG_MAINTAINER:=Ben Greear PKG_BUILD_PARALLEL:=1 +# Build the 4.13 ath10k-ct driver version. Other options are "-4.9", or +# leave un-defined for 4.7 kernel. Probably this should match as closely as +# possible to whatever mac80211 backports version is being used. +CT_KVER="-4.13" + STAMP_CONFIGURED_DEPENDS := $(STAGING_DIR)/usr/include/mac80211-backport/backport/autoconf.h include $(INCLUDE_DIR)/kernel.mk @@ -25,8 +30,8 @@ define KernelPackage/ath10k-ct TITLE:=ath10k-ct driver optimized for CT ath10k firmware DEPENDS:=+kmod-mac80211 +kmod-ath +@DRIVER_11N_SUPPORT +@DRIVER_11AC_SUPPORT @PCI_SUPPORT +@KERNEL_RELAY +kmod-hwmon-core FILES:=\ - $(PKG_BUILD_DIR)/ath10k/ath10k_pci.ko \ - $(PKG_BUILD_DIR)/ath10k/ath10k_core.ko + $(PKG_BUILD_DIR)/ath10k$(CT_KVER)/ath10k_pci.ko \ + $(PKG_BUILD_DIR)/ath10k$(CT_KVER)/ath10k_core.ko AUTOLOAD:=$(call AutoLoad,50,mac80211 ath ath10k_core ath10k_pci) endef @@ -75,7 +80,7 @@ define Build/Compile +$(MAKE) $(CT_MAKEDEFS) $(PKG_JOBS) -C "$(LINUX_DIR)" \ ARCH="$(LINUX_KARCH)" \ CROSS_COMPILE="$(TARGET_CROSS)" \ - SUBDIRS="$(PKG_BUILD_DIR)/ath10k" \ + SUBDIRS="$(PKG_BUILD_DIR)/ath10k$(CT_KVER)" \ NOSTDINC_FLAGS="$(NOSTDINC_FLAGS)" \ modules endef diff --git a/package/kernel/ath10k-ct/patches/100-kernel_compat.patch b/package/kernel/ath10k-ct/patches/100-kernel_compat.patch index 58d6b54c5..beb0abf6d 100644 --- a/package/kernel/ath10k-ct/patches/100-kernel_compat.patch +++ b/package/kernel/ath10k-ct/patches/100-kernel_compat.patch @@ -17,7 +17,7 @@ firmware = ar->normal_mode_fw.fw_file.firmware; if (firmware) -@@ -3413,7 +3413,7 @@ int ath10k_debug_register(struct ath10k +@@ -3422,7 +3422,7 @@ int ath10k_debug_register(struct ath10k debugfs_create_file("nf_cal_period", S_IRUSR | S_IWUSR, ar->debug.debugfs_phy, ar, &fops_nf_cal_period); @@ -28,7 +28,7 @@ &fops_simulate_radar); --- a/ath10k/mac.c +++ b/ath10k/mac.c -@@ -3596,7 +3596,7 @@ static void ath10k_regd_update(struct at +@@ -3604,7 +3604,7 @@ static void ath10k_regd_update(struct at regpair = ar->ath_common.regulatory.regpair; @@ -37,7 +37,7 @@ nl_dfs_reg = ar->dfs_detector->region; wmi_dfs_reg = ath10k_mac_get_dfs_region(nl_dfs_reg); ath10k_dbg(ar, ATH10K_DBG_REGULATORY, -@@ -3630,7 +3630,7 @@ static void ath10k_reg_notifier(struct w +@@ -3638,7 +3638,7 @@ static void ath10k_reg_notifier(struct w ath_reg_notifier_apply(wiphy, request, &ar->ath_common.regulatory); @@ -46,7 +46,7 @@ ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "reg-notifier: dfs region 0x%x\n", request->dfs_region); result = ar->dfs_detector->set_dfs_domain(ar->dfs_detector, -@@ -8925,7 +8925,7 @@ int ath10k_mac_register(struct ath10k *a +@@ -8938,7 +8938,7 @@ int ath10k_mac_register(struct ath10k *a if (!test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) ar->hw->netdev_features = NETIF_F_HW_CSUM; @@ -55,7 +55,7 @@ /* Init ath dfs pattern detector */ ar->ath_common.debug_mask = ATH_DBG_DFS; ar->dfs_detector = dfs_pattern_detector_init(&ar->ath_common, -@@ -8970,7 +8970,7 @@ err_unregister: +@@ -8983,7 +8983,7 @@ err_unregister: ieee80211_unregister_hw(ar->hw); err_dfs_detector_exit: @@ -64,7 +64,7 @@ ar->dfs_detector->exit(ar->dfs_detector); err_free: -@@ -8985,7 +8985,7 @@ void ath10k_mac_unregister(struct ath10k +@@ -8998,7 +8998,7 @@ void ath10k_mac_unregister(struct ath10k { ieee80211_unregister_hw(ar->hw); diff --git a/package/kernel/ath10k-ct/patches/110-api_fix.patch b/package/kernel/ath10k-ct/patches/110-api_fix.patch index 5f7de4a95..9439dd79e 100644 --- a/package/kernel/ath10k-ct/patches/110-api_fix.patch +++ b/package/kernel/ath10k-ct/patches/110-api_fix.patch @@ -1,6 +1,6 @@ --- a/ath10k/htt_rx.c +++ b/ath10k/htt_rx.c -@@ -2497,7 +2497,7 @@ bool ath10k_htt_t2h_msg_handler(struct a +@@ -2514,7 +2514,7 @@ bool ath10k_htt_t2h_msg_handler(struct a u32 freq = __le32_to_cpu(resp->chan_change.freq); ar->tgt_oper_chan = diff --git a/package/kernel/ath10k-ct/patches/120-mac80211-4-14-api.patch b/package/kernel/ath10k-ct/patches/120-mac80211-4-14-api.patch index 032a0bcb7..d58763269 100644 --- a/package/kernel/ath10k-ct/patches/120-mac80211-4-14-api.patch +++ b/package/kernel/ath10k-ct/patches/120-mac80211-4-14-api.patch @@ -51,7 +51,7 @@ break; default: break; -@@ -883,13 +883,10 @@ static void ath10k_htt_rx_h_ppdu(struct +@@ -900,13 +900,10 @@ static void ath10k_htt_rx_h_ppdu(struct /* New PPDU starts so clear out the old per-PPDU status. */ status->freq = 0; status->rate_idx = 0; @@ -69,7 +69,7 @@ status->flag |= RX_FLAG_NO_SIGNAL_VAL; ath10k_htt_rx_h_signal(ar, status, rxd); -@@ -942,7 +939,7 @@ static void ath10k_process_rx(struct ath +@@ -959,7 +956,7 @@ static void ath10k_process_rx(struct ath *status = *rx_status; ath10k_dbg(ar, ATH10K_DBG_DATA, @@ -78,7 +78,7 @@ skb, skb->len, ieee80211_get_SA(hdr), -@@ -950,15 +947,15 @@ static void ath10k_process_rx(struct ath +@@ -967,15 +964,15 @@ static void ath10k_process_rx(struct ath is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? "mcast" : "ucast", (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, diff --git a/package/kernel/ath10k-ct/patches/130-ath10k-activate-user-space-firmware-loading-again.patch b/package/kernel/ath10k-ct/patches/130-ath10k-activate-user-space-firmware-loading-again.patch new file mode 100644 index 000000000..dc02a9d6e --- /dev/null +++ b/package/kernel/ath10k-ct/patches/130-ath10k-activate-user-space-firmware-loading-again.patch @@ -0,0 +1,36 @@ +From c0cc00f250e19c717fc9cdbdb7f55aaa569c7498 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Thu, 24 Aug 2017 23:06:41 +0200 +Subject: [PATCH] ath10k: activate user space firmware loading again + +In commit 9f5bcfe93315 ("ath10k: silence firmware file probing +warnings") the firmware loading was changed from request_firmware() to +request_firmware_direct() to silence some warnings in case it fails. +request_firmware_direct() directly searches in the file system only and +does not send a hotplug event to user space in case it could not find +the firmware directly. +In LEDE we use a user space script to extract the calibration data from +the flash memory which gets triggered by the hotplug event. This way the +firmware gets extracted from some vendor specific partition when the +driver requests this firmware. This mechanism does not work any more +after this change. + +Fixes: 9f5bcfe93315 ("ath10k: silence firmware file probing warnings") +Signed-off-by: Hauke Mehrtens +Cc: Michal Kazior +Signed-off-by: Kalle Valo +--- + ath10k-4.13/core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/ath10k-4.13/core.c ++++ b/ath10k-4.13/core.c +@@ -556,7 +556,7 @@ static const struct firmware *ath10k_fet + dir = "."; + + snprintf(filename, sizeof(filename), "%s/%s", dir, file); +- ret = request_firmware_direct(&fw, filename, ar->dev); ++ ret = request_firmware(&fw, filename, ar->dev); + ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", + filename, ret); + From 29e2e0556745cef44ece7b8adabca03d21a1c899 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 22:42:57 +0800 Subject: [PATCH 06/15] mac80211: update to wireless kernel to 2017-10-06 --- package/kernel/mac80211/Makefile | 13 +- .../patches/002-change_allconfig.patch | 6 +- .../100-remove-cryptoapi-dependencies.patch | 144 ++++++------- .../mac80211/patches/130-disable-fils.patch | 32 +++ ...aes-cmac-switch-to-shash-CMAC-driver.patch | 198 ++++++++++++++++++ .../132-mac80211-remove-cmac-dependency.patch | 10 + ..._hw-issue-external-reset-for-QCA955x.patch | 51 +++-- ...ix-channel-maximum-power-level-test.patch} | 0 ...ower-reduction-for-US-regulatory-do.patch} | 5 +- ...ta-flag-for-buffered-multicast-pack.patch} | 3 +- ...able-wake_tx_queue-for-older-device.patch} | 4 +- .../522-mac80211_configure_antenna_gain.patch | 10 +- .../patches/530-ath9k_extra_leds.patch | 12 +- ...not-set-auto-rate-fallback-on-8188eu.patch | 2 +- ...62-brcmfmac-Disable-power-management.patch | 2 +- 15 files changed, 361 insertions(+), 131 deletions(-) create mode 100644 package/kernel/mac80211/patches/130-disable-fils.patch create mode 100644 package/kernel/mac80211/patches/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch create mode 100644 package/kernel/mac80211/patches/132-mac80211-remove-cmac-dependency.patch rename package/kernel/mac80211/patches/{324-ath9k_hw-fix-channel-maximum-power-level-test.patch => 314-ath9k_hw-fix-channel-maximum-power-level-test.patch} (100%) rename package/kernel/mac80211/patches/{330-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch => 315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch} (91%) rename package/kernel/mac80211/patches/{331-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch => 316-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch} (99%) rename package/kernel/mac80211/patches/{332-ath10k-Revert-disable-wake_tx_queue-for-older-devices.patch => 317-Revert-ath10k-disable-wake_tx_queue-for-older-device.patch} (85%) diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile index 16f5a0696..424b2ca50 100644 --- a/package/kernel/mac80211/Makefile +++ b/package/kernel/mac80211/Makefile @@ -10,14 +10,13 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=mac80211 -PKG_VERSION:=4.14-rc2 +PKG_VERSION:=2017-10-06 PKG_RELEASE:=1 -PKG_SOURCE_URL:=@KERNEL/linux/kernel/projects/backports/stable/v$(PKG_VERSION)/ -PKG_BACKPORT_VERSION:=-1 -PKG_HASH:=8d1b62e0ea6cc2ffa7e6ae666da201360256e9b74ae651a31842d33625367524 +PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources +PKG_HASH:=194786b7635f36b9ce280fd2319f6a4feeff209175e330ddbcbe789a3b4540a5 -PKG_SOURCE:=backports-$(PKG_VERSION)$(PKG_BACKPORT_VERSION).tar.xz -PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/backports-$(PKG_VERSION)$(PKG_BACKPORT_VERSION) +PKG_SOURCE:=backports-$(PKG_VERSION).tar.xz +PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/backports-$(PKG_VERSION) PKG_BUILD_PARALLEL:=1 PKG_MAINTAINER:=Felix Fietkau @@ -102,7 +101,7 @@ define KernelPackage/mac80211 $(call KernelPackage/mac80211/Default) TITLE:=Linux 802.11 Wireless Networking Stack # +kmod-crypto-cmac is a runtime only dependency of net/mac80211/aes_cmac.c - DEPENDS+= +kmod-cfg80211 +kmod-crypto-hash +kmod-crypto-cmac +hostapd-common + DEPENDS+= +kmod-cfg80211 +hostapd-common KCONFIG:=\ CONFIG_AVERAGE=y FILES:= $(PKG_BUILD_DIR)/net/mac80211/mac80211.ko diff --git a/package/kernel/mac80211/patches/002-change_allconfig.patch b/package/kernel/mac80211/patches/002-change_allconfig.patch index bd5bebfa4..a071ae637 100644 --- a/package/kernel/mac80211/patches/002-change_allconfig.patch +++ b/package/kernel/mac80211/patches/002-change_allconfig.patch @@ -1,6 +1,6 @@ --- a/kconf/conf.c +++ b/kconf/conf.c -@@ -593,40 +593,12 @@ int main(int ac, char **av) +@@ -594,40 +594,12 @@ int main(int ac, char **av) case oldconfig: case listnewconfig: case olddefconfig: @@ -44,7 +44,7 @@ break; --- a/kconf/confdata.c +++ b/kconf/confdata.c -@@ -1169,6 +1169,8 @@ bool conf_set_all_new_symbols(enum conf_ +@@ -1170,6 +1170,8 @@ bool conf_set_all_new_symbols(enum conf_ } bool has_changed = false; @@ -53,7 +53,7 @@ for_all_symbols(i, sym) { if (sym_has_value(sym) || (sym->flags & SYMBOL_VALID)) continue; -@@ -1212,8 +1214,6 @@ bool conf_set_all_new_symbols(enum conf_ +@@ -1213,8 +1215,6 @@ bool conf_set_all_new_symbols(enum conf_ } diff --git a/package/kernel/mac80211/patches/100-remove-cryptoapi-dependencies.patch b/package/kernel/mac80211/patches/100-remove-cryptoapi-dependencies.patch index 263be3e20..0febc57b3 100644 --- a/package/kernel/mac80211/patches/100-remove-cryptoapi-dependencies.patch +++ b/package/kernel/mac80211/patches/100-remove-cryptoapi-dependencies.patch @@ -43,122 +43,118 @@ - struct aead_request *aead_req; - int reqsize = sizeof(*aead_req) + crypto_aead_reqsize(tfm); - u8 *__aad; -- ++ int i; + - aead_req = kzalloc(reqsize + CCM_AAD_LEN, GFP_ATOMIC); - if (!aead_req) - return -ENOMEM; -- -- __aad = (u8 *)aead_req + reqsize; -- memcpy(__aad, aad, CCM_AAD_LEN); -- -- sg_init_table(sg, 3); -- sg_set_buf(&sg[0], &__aad[2], be16_to_cpup((__be16 *)__aad)); -- sg_set_buf(&sg[1], data, data_len); -- sg_set_buf(&sg[2], mic, mic_len); -- -- aead_request_set_tfm(aead_req, tfm); -- aead_request_set_crypt(aead_req, sg, sg, data_len, b_0); -- aead_request_set_ad(aead_req, sg[0].length); -+ int i; - -- crypto_aead_encrypt(aead_req); -- kzfree(aead_req); + crypto_cipher_encrypt_one(tfm, b, b_0); -- return 0; +- __aad = (u8 *)aead_req + reqsize; +- memcpy(__aad, aad, CCM_AAD_LEN); + /* Extra Authenticate-only data (always two AES blocks) */ + for (i = 0; i < AES_BLOCK_SIZE; i++) + aad[i] ^= b[i]; + crypto_cipher_encrypt_one(tfm, b, aad); -+ + +- sg_init_table(sg, 3); +- sg_set_buf(&sg[0], &__aad[2], be16_to_cpup((__be16 *)__aad)); +- sg_set_buf(&sg[1], data, data_len); +- sg_set_buf(&sg[2], mic, mic_len); + aad += AES_BLOCK_SIZE; -+ + +- aead_request_set_tfm(aead_req, tfm); +- aead_request_set_crypt(aead_req, sg, sg, data_len, b_0); +- aead_request_set_ad(aead_req, sg[0].length); + for (i = 0; i < AES_BLOCK_SIZE; i++) + aad[i] ^= b[i]; + crypto_cipher_encrypt_one(tfm, a, aad); -+ + +- crypto_aead_encrypt(aead_req); +- kzfree(aead_req); + /* Mask out bits from auth-only-b_0 */ + b_0[0] &= 0x07; -+ + +- return 0; + /* S_0 is used to encrypt T (= MIC) */ + b_0[14] = 0; + b_0[15] = 0; + crypto_cipher_encrypt_one(tfm, s_0, b_0); -+} -+ + } + +-int ieee80211_aes_ccm_decrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad, +- u8 *data, size_t data_len, u8 *mic, +- size_t mic_len) + +void ieee80211_aes_ccm_encrypt(struct crypto_cipher *tfm, u8 *b_0, u8 *aad, + u8 *data, size_t data_len, u8 *mic, + size_t mic_len) -+{ -+ int i, j, last_len, num_blocks; -+ u8 b[AES_BLOCK_SIZE]; -+ u8 s_0[AES_BLOCK_SIZE]; -+ u8 e[AES_BLOCK_SIZE]; -+ u8 *pos, *cpos; -+ -+ num_blocks = DIV_ROUND_UP(data_len, AES_BLOCK_SIZE); -+ last_len = data_len % AES_BLOCK_SIZE; -+ aes_ccm_prepare(tfm, b_0, aad, s_0, b, b); -+ -+ /* Process payload blocks */ -+ pos = data; -+ cpos = data; -+ for (j = 1; j <= num_blocks; j++) { -+ int blen = (j == num_blocks && last_len) ? -+ last_len : AES_BLOCK_SIZE; -+ -+ /* Authentication followed by encryption */ -+ for (i = 0; i < blen; i++) -+ b[i] ^= pos[i]; -+ crypto_cipher_encrypt_one(tfm, b, b); -+ -+ b_0[14] = (j >> 8) & 0xff; -+ b_0[15] = j & 0xff; -+ crypto_cipher_encrypt_one(tfm, e, b_0); -+ for (i = 0; i < blen; i++) -+ *cpos++ = *pos++ ^ e[i]; -+ } -+ -+ for (i = 0; i < mic_len; i++) -+ mic[i] = b[i] ^ s_0[i]; - } - --int ieee80211_aes_ccm_decrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad, -+int ieee80211_aes_ccm_decrypt(struct crypto_cipher *tfm, u8 *b_0, u8 *aad, - u8 *data, size_t data_len, u8 *mic, - size_t mic_len) { - struct scatterlist sg[3]; - struct aead_request *aead_req; - int reqsize = sizeof(*aead_req) + crypto_aead_reqsize(tfm); - u8 *__aad; - int err; -- ++ int i, j, last_len, num_blocks; ++ u8 b[AES_BLOCK_SIZE]; ++ u8 s_0[AES_BLOCK_SIZE]; ++ u8 e[AES_BLOCK_SIZE]; ++ u8 *pos, *cpos; + - if (data_len == 0) - return -EINVAL; -- ++ num_blocks = DIV_ROUND_UP(data_len, AES_BLOCK_SIZE); ++ last_len = data_len % AES_BLOCK_SIZE; ++ aes_ccm_prepare(tfm, b_0, aad, s_0, b, b); + - aead_req = kzalloc(reqsize + CCM_AAD_LEN, GFP_ATOMIC); - if (!aead_req) - return -ENOMEM; -- ++ /* Process payload blocks */ ++ pos = data; ++ cpos = data; ++ for (j = 1; j <= num_blocks; j++) { ++ int blen = (j == num_blocks && last_len) ? ++ last_len : AES_BLOCK_SIZE; + - __aad = (u8 *)aead_req + reqsize; - memcpy(__aad, aad, CCM_AAD_LEN); -- ++ /* Authentication followed by encryption */ ++ for (i = 0; i < blen; i++) ++ b[i] ^= pos[i]; ++ crypto_cipher_encrypt_one(tfm, b, b); + - sg_init_table(sg, 3); - sg_set_buf(&sg[0], &__aad[2], be16_to_cpup((__be16 *)__aad)); - sg_set_buf(&sg[1], data, data_len); - sg_set_buf(&sg[2], mic, mic_len); -- ++ b_0[14] = (j >> 8) & 0xff; ++ b_0[15] = j & 0xff; ++ crypto_cipher_encrypt_one(tfm, e, b_0); ++ for (i = 0; i < blen; i++) ++ *cpos++ = *pos++ ^ e[i]; ++ } + - aead_request_set_tfm(aead_req, tfm); - aead_request_set_crypt(aead_req, sg, sg, data_len + mic_len, b_0); - aead_request_set_ad(aead_req, sg[0].length); ++ for (i = 0; i < mic_len; i++) ++ mic[i] = b[i] ^ s_0[i]; ++} + +- err = crypto_aead_decrypt(aead_req); +- kzfree(aead_req); ++int ieee80211_aes_ccm_decrypt(struct crypto_cipher *tfm, u8 *b_0, u8 *aad, ++ u8 *data, size_t data_len, u8 *mic, ++ size_t mic_len) ++{ + int i, j, last_len, num_blocks; + u8 *pos, *cpos; + u8 a[AES_BLOCK_SIZE]; + u8 b[AES_BLOCK_SIZE]; + u8 s_0[AES_BLOCK_SIZE]; -+ + +- return err; + num_blocks = DIV_ROUND_UP(data_len, AES_BLOCK_SIZE); + last_len = data_len % AES_BLOCK_SIZE; + aes_ccm_prepare(tfm, b_0, aad, s_0, a, b); @@ -185,11 +181,7 @@ + if ((mic[i] ^ s_0[i]) != a[i]) + return -1; + } - -- err = crypto_aead_decrypt(aead_req); -- kzfree(aead_req); -- -- return err; ++ + return 0; } @@ -202,12 +194,12 @@ { - struct crypto_aead *tfm; - int err; -+ struct crypto_cipher *tfm; - +- - tfm = crypto_alloc_aead("ccm(aes)", 0, CRYPTO_ALG_ASYNC); - if (IS_ERR(tfm)) - return tfm; -- ++ struct crypto_cipher *tfm; + - err = crypto_aead_setkey(tfm, key, key_len); - if (err) - goto free_aead; diff --git a/package/kernel/mac80211/patches/130-disable-fils.patch b/package/kernel/mac80211/patches/130-disable-fils.patch new file mode 100644 index 000000000..1f0358987 --- /dev/null +++ b/package/kernel/mac80211/patches/130-disable-fils.patch @@ -0,0 +1,32 @@ +Disable FILS support, since it pulls in crypto hash support + +--- a/net/mac80211/fils_aead.h ++++ b/net/mac80211/fils_aead.h +@@ -10,7 +10,7 @@ + #ifndef FILS_AEAD_H + #define FILS_AEAD_H + +-#if LINUX_VERSION_IS_GEQ(4,3,0) ++#if 0 /* LINUX_VERSION_IS_GEQ(4,3,0) */ + int fils_encrypt_assoc_req(struct sk_buff *skb, + struct ieee80211_mgd_assoc_data *assoc_data); + int fils_decrypt_assoc_resp(struct ieee80211_sub_if_data *sdata, +--- a/net/mac80211/fils_aead.c ++++ b/net/mac80211/fils_aead.c +@@ -1,4 +1,4 @@ +-#if LINUX_VERSION_IS_GEQ(4,3,0) ++#if 0 /* LINUX_VERSION_IS_GEQ(4,3,0) */ + /* + * FILS AEAD for (Re)Association Request/Response frames + * Copyright 2016, Qualcomm Atheros, Inc. +--- a/net/mac80211/main.c ++++ b/net/mac80211/main.c +@@ -550,7 +550,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_ + NL80211_FEATURE_MAC_ON_CREATE | + NL80211_FEATURE_USERSPACE_MPM | + NL80211_FEATURE_FULL_AP_CLIENT_STATE; +-#if LINUX_VERSION_IS_GEQ(4,3,0) ++#if 0 /* LINUX_VERSION_IS_GEQ(4,3,0) */ + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_STA); + #endif + diff --git a/package/kernel/mac80211/patches/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch b/package/kernel/mac80211/patches/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch new file mode 100644 index 000000000..f2bee9b05 --- /dev/null +++ b/package/kernel/mac80211/patches/131-Revert-mac80211-aes-cmac-switch-to-shash-CMAC-driver.patch @@ -0,0 +1,198 @@ +From: Felix Fietkau +Date: Sat, 7 Oct 2017 09:37:28 +0200 +Subject: [PATCH] Revert "mac80211: aes-cmac: switch to shash CMAC + driver" + +This reverts commit 26717828b75dd5c46e97f7f4a9b937d038bb2852. +Reduces mac80211 dependencies for LEDE + +Signed-off-by: Felix Fietkau +--- + +--- a/net/mac80211/aes_cmac.c ++++ b/net/mac80211/aes_cmac.c +@@ -22,50 +22,126 @@ + #define CMAC_TLEN_256 16 /* CMAC TLen = 128 bits (16 octets) */ + #define AAD_LEN 20 + +-static const u8 zero[CMAC_TLEN_256]; + +-void ieee80211_aes_cmac(struct crypto_shash *tfm, const u8 *aad, +- const u8 *data, size_t data_len, u8 *mic) ++void gf_mulx(u8 *pad) + { +- SHASH_DESC_ON_STACK(desc, tfm); +- u8 out[AES_BLOCK_SIZE]; ++ int i, carry; + +- desc->tfm = tfm; ++ carry = pad[0] & 0x80; ++ for (i = 0; i < AES_BLOCK_SIZE - 1; i++) ++ pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7); ++ pad[AES_BLOCK_SIZE - 1] <<= 1; ++ if (carry) ++ pad[AES_BLOCK_SIZE - 1] ^= 0x87; ++} + +- crypto_shash_init(desc); +- crypto_shash_update(desc, aad, AAD_LEN); +- crypto_shash_update(desc, data, data_len - CMAC_TLEN); +- crypto_shash_finup(desc, zero, CMAC_TLEN, out); ++void aes_cmac_vector(struct crypto_cipher *tfm, size_t num_elem, ++ const u8 *addr[], const size_t *len, u8 *mac, ++ size_t mac_len) ++{ ++ u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE]; ++ const u8 *pos, *end; ++ size_t i, e, left, total_len; + +- memcpy(mic, out, CMAC_TLEN); ++ memset(cbc, 0, AES_BLOCK_SIZE); ++ ++ total_len = 0; ++ for (e = 0; e < num_elem; e++) ++ total_len += len[e]; ++ left = total_len; ++ ++ e = 0; ++ pos = addr[0]; ++ end = pos + len[0]; ++ ++ while (left >= AES_BLOCK_SIZE) { ++ for (i = 0; i < AES_BLOCK_SIZE; i++) { ++ cbc[i] ^= *pos++; ++ if (pos >= end) { ++ e++; ++ pos = addr[e]; ++ end = pos + len[e]; ++ } ++ } ++ if (left > AES_BLOCK_SIZE) ++ crypto_cipher_encrypt_one(tfm, cbc, cbc); ++ left -= AES_BLOCK_SIZE; ++ } ++ ++ memset(pad, 0, AES_BLOCK_SIZE); ++ crypto_cipher_encrypt_one(tfm, pad, pad); ++ gf_mulx(pad); ++ ++ if (left || total_len == 0) { ++ for (i = 0; i < left; i++) { ++ cbc[i] ^= *pos++; ++ if (pos >= end) { ++ e++; ++ pos = addr[e]; ++ end = pos + len[e]; ++ } ++ } ++ cbc[left] ^= 0x80; ++ gf_mulx(pad); ++ } ++ ++ for (i = 0; i < AES_BLOCK_SIZE; i++) ++ pad[i] ^= cbc[i]; ++ crypto_cipher_encrypt_one(tfm, pad, pad); ++ memcpy(mac, pad, mac_len); + } + +-void ieee80211_aes_cmac_256(struct crypto_shash *tfm, const u8 *aad, ++ ++void ieee80211_aes_cmac(struct crypto_cipher *tfm, const u8 *aad, ++ const u8 *data, size_t data_len, u8 *mic) ++{ ++ const u8 *addr[3]; ++ size_t len[3]; ++ u8 zero[CMAC_TLEN]; ++ ++ memset(zero, 0, CMAC_TLEN); ++ addr[0] = aad; ++ len[0] = AAD_LEN; ++ addr[1] = data; ++ len[1] = data_len - CMAC_TLEN; ++ addr[2] = zero; ++ len[2] = CMAC_TLEN; ++ ++ aes_cmac_vector(tfm, 3, addr, len, mic, CMAC_TLEN); ++} ++ ++void ieee80211_aes_cmac_256(struct crypto_cipher *tfm, const u8 *aad, + const u8 *data, size_t data_len, u8 *mic) + { +- SHASH_DESC_ON_STACK(desc, tfm); ++ const u8 *addr[3]; ++ size_t len[3]; ++ u8 zero[CMAC_TLEN_256]; + +- desc->tfm = tfm; ++ memset(zero, 0, CMAC_TLEN_256); ++ addr[0] = aad; ++ len[0] = AAD_LEN; ++ addr[1] = data; ++ len[1] = data_len - CMAC_TLEN_256; ++ addr[2] = zero; ++ len[2] = CMAC_TLEN_256; + +- crypto_shash_init(desc); +- crypto_shash_update(desc, aad, AAD_LEN); +- crypto_shash_update(desc, data, data_len - CMAC_TLEN_256); +- crypto_shash_finup(desc, zero, CMAC_TLEN_256, mic); ++ aes_cmac_vector(tfm, 3, addr, len, mic, CMAC_TLEN_256); + } + +-struct crypto_shash *ieee80211_aes_cmac_key_setup(const u8 key[], +- size_t key_len) ++struct crypto_cipher *ieee80211_aes_cmac_key_setup(const u8 key[], ++ size_t key_len) + { +- struct crypto_shash *tfm; ++ struct crypto_cipher *tfm; + +- tfm = crypto_alloc_shash("cmac(aes)", 0, 0); ++ tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); + if (!IS_ERR(tfm)) +- crypto_shash_setkey(tfm, key, key_len); ++ crypto_cipher_setkey(tfm, key, key_len); + + return tfm; + } + +-void ieee80211_aes_cmac_key_free(struct crypto_shash *tfm) ++ ++void ieee80211_aes_cmac_key_free(struct crypto_cipher *tfm) + { +- crypto_free_shash(tfm); ++ crypto_free_cipher(tfm); + } +--- a/net/mac80211/aes_cmac.h ++++ b/net/mac80211/aes_cmac.h +@@ -10,14 +10,13 @@ + #define AES_CMAC_H + + #include +-#include + +-struct crypto_shash *ieee80211_aes_cmac_key_setup(const u8 key[], +- size_t key_len); +-void ieee80211_aes_cmac(struct crypto_shash *tfm, const u8 *aad, ++struct crypto_cipher *ieee80211_aes_cmac_key_setup(const u8 key[], ++ size_t key_len); ++void ieee80211_aes_cmac(struct crypto_cipher *tfm, const u8 *aad, + const u8 *data, size_t data_len, u8 *mic); +-void ieee80211_aes_cmac_256(struct crypto_shash *tfm, const u8 *aad, ++void ieee80211_aes_cmac_256(struct crypto_cipher *tfm, const u8 *aad, + const u8 *data, size_t data_len, u8 *mic); +-void ieee80211_aes_cmac_key_free(struct crypto_shash *tfm); ++void ieee80211_aes_cmac_key_free(struct crypto_cipher *tfm); + + #endif /* AES_CMAC_H */ +--- a/net/mac80211/key.h ++++ b/net/mac80211/key.h +@@ -93,7 +93,7 @@ struct ieee80211_key { + } ccmp; + struct { + u8 rx_pn[IEEE80211_CMAC_PN_LEN]; +- struct crypto_shash *tfm; ++ struct crypto_cipher *tfm; + u32 replays; /* dot11RSNAStatsCMACReplays */ + u32 icverrors; /* dot11RSNAStatsCMACICVErrors */ + } aes_cmac; diff --git a/package/kernel/mac80211/patches/132-mac80211-remove-cmac-dependency.patch b/package/kernel/mac80211/patches/132-mac80211-remove-cmac-dependency.patch new file mode 100644 index 000000000..9d185e61e --- /dev/null +++ b/package/kernel/mac80211/patches/132-mac80211-remove-cmac-dependency.patch @@ -0,0 +1,10 @@ +--- a/net/mac80211/Kconfig ++++ b/net/mac80211/Kconfig +@@ -5,7 +5,6 @@ config MAC80211 + depends on CRYPTO + depends on CRYPTO_ARC4 + depends on CRYPTO_AES +- depends on CRYPTO_CMAC + depends on CRC32 + ---help--- + This option enables the hardware independent IEEE 802.11 diff --git a/package/kernel/mac80211/patches/301-ath9k_hw-issue-external-reset-for-QCA955x.patch b/package/kernel/mac80211/patches/301-ath9k_hw-issue-external-reset-for-QCA955x.patch index 5eb69b898..34d7d3b1c 100644 --- a/package/kernel/mac80211/patches/301-ath9k_hw-issue-external-reset-for-QCA955x.patch +++ b/package/kernel/mac80211/patches/301-ath9k_hw-issue-external-reset-for-QCA955x.patch @@ -29,21 +29,6 @@ Signed-off-by: Felix Fietkau - npend = ath9k_hw_numtxpending(ah, i); - if (npend) - break; -- } -- -- if (ah->external_reset && -- (npend || type == ATH9K_RESET_COLD)) { -- int reset_err = 0; -- -- ath_dbg(ath9k_hw_common(ah), RESET, -- "reset MAC via external reset\n"); -- -- reset_err = ah->external_reset(); -- if (reset_err) { -- ath_err(ath9k_hw_common(ah), -- "External reset failed, err=%d\n", -- reset_err); -- return false; + if (type == ATH9K_RESET_COLD) + return true; + @@ -59,35 +44,47 @@ Signed-off-by: Felix Fietkau + for (i = 0; i < AR_NUM_QCU; i++) { + if (ath9k_hw_numtxpending(ah, i)) + return true; - } -+ } -+ ++ } + } + +- if (ah->external_reset && +- (npend || type == ATH9K_RESET_COLD)) { +- int reset_err = 0; + return false; +} -+ + +- ath_dbg(ath9k_hw_common(ah), RESET, +- "reset MAC via external reset\n"); +static bool ath9k_hw_external_reset(struct ath_hw *ah, int type) +{ + int err; -+ + +- reset_err = ah->external_reset(); +- if (reset_err) { +- ath_err(ath9k_hw_common(ah), +- "External reset failed, err=%d\n", +- reset_err); +- return false; +- } + if (!ah->external_reset || !ath9k_hw_need_external_reset(ah, type)) + return true; -+ -+ ath_dbg(ath9k_hw_common(ah), RESET, -+ "reset MAC via external reset\n"); - REG_WRITE(ah, AR_RTC_RESET, 1); ++ ath_dbg(ath9k_hw_common(ah), RESET, ++ "reset MAC via external reset\n"); ++ + err = ah->external_reset(); + if (err) { + ath_err(ath9k_hw_common(ah), + "External reset failed, err=%d\n", err); + return false; - } - ++ } ++ + if (AR_SREV_9550(ah)) { + REG_WRITE(ah, AR_RTC_RESET, 0); + udelay(10); -+ } -+ + } + + REG_WRITE(ah, AR_RTC_RESET, 1); + udelay(10); + diff --git a/package/kernel/mac80211/patches/324-ath9k_hw-fix-channel-maximum-power-level-test.patch b/package/kernel/mac80211/patches/314-ath9k_hw-fix-channel-maximum-power-level-test.patch similarity index 100% rename from package/kernel/mac80211/patches/324-ath9k_hw-fix-channel-maximum-power-level-test.patch rename to package/kernel/mac80211/patches/314-ath9k_hw-fix-channel-maximum-power-level-test.patch diff --git a/package/kernel/mac80211/patches/330-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch b/package/kernel/mac80211/patches/315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch similarity index 91% rename from package/kernel/mac80211/patches/330-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch rename to package/kernel/mac80211/patches/315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch index d799ab4a6..59e4ddee3 100644 --- a/package/kernel/mac80211/patches/330-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch +++ b/package/kernel/mac80211/patches/315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch @@ -1,6 +1,7 @@ From: Felix Fietkau Date: Wed, 19 Jul 2017 08:49:31 +0200 -Subject: [PATCH] ath9k: adjust tx power reduction for US regulatory domain +Subject: [PATCH] ath9k: adjust tx power reduction for US regulatory + domain FCC regulatory rules allow for up to 3 dBi antenna gain. Account for this in the EEPROM based tx power reduction code. @@ -16,7 +17,7 @@ Signed-off-by: Felix Fietkau + /* FCC allows maximum antenna gain of 3 dBi */ + if (reg->region == NL80211_DFS_FCC) -+ ant_reduction = max_t(int, ant_reduction - 6, 0); ++ ant_reduction = min_t(int, ant_reduction - 6, 0); + ah->eep_ops->set_txpower(ah, chan, ctl, ant_reduction, new_pwr, test); } diff --git a/package/kernel/mac80211/patches/331-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch b/package/kernel/mac80211/patches/316-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch similarity index 99% rename from package/kernel/mac80211/patches/331-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch rename to package/kernel/mac80211/patches/316-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch index 1e0761eb1..096eb56a2 100644 --- a/package/kernel/mac80211/patches/331-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch +++ b/package/kernel/mac80211/patches/316-ath9k-fix-more-data-flag-for-buffered-multicast-pack.patch @@ -1,6 +1,7 @@ From: Felix Fietkau Date: Sun, 23 Jul 2017 14:58:22 +0200 -Subject: [PATCH] ath9k: fix more-data flag for buffered multicast packets +Subject: [PATCH] ath9k: fix more-data flag for buffered multicast + packets The flag needs to be cleared for the last packet in the list, not the first one. Fixes some issues with multicast packet loss for powersave diff --git a/package/kernel/mac80211/patches/332-ath10k-Revert-disable-wake_tx_queue-for-older-devices.patch b/package/kernel/mac80211/patches/317-Revert-ath10k-disable-wake_tx_queue-for-older-device.patch similarity index 85% rename from package/kernel/mac80211/patches/332-ath10k-Revert-disable-wake_tx_queue-for-older-devices.patch rename to package/kernel/mac80211/patches/317-Revert-ath10k-disable-wake_tx_queue-for-older-device.patch index f1bd131f3..5e18f285a 100644 --- a/package/kernel/mac80211/patches/332-ath10k-Revert-disable-wake_tx_queue-for-older-devices.patch +++ b/package/kernel/mac80211/patches/317-Revert-ath10k-disable-wake_tx_queue-for-older-device.patch @@ -1,7 +1,7 @@ -From 59f8c22bf1749c4a2b5947bfaebc677c259a1ad6 Mon Sep 17 00:00:00 2001 From: dave taht Date: Wed, 5 Oct 2016 20:09:15 -0700 -Subject: [PATCH 5/7] Revert "ath10k: disable wake_tx_queue for older devices" +Subject: [PATCH] Revert "ath10k: disable wake_tx_queue for older + devices" This reverts commit 4ca1807815aa6801aaced7fdefa9edacc2521767 in the hope that we've fixed all the performance problems now. diff --git a/package/kernel/mac80211/patches/522-mac80211_configure_antenna_gain.patch b/package/kernel/mac80211/patches/522-mac80211_configure_antenna_gain.patch index 01de325b9..72857a0db 100644 --- a/package/kernel/mac80211/patches/522-mac80211_configure_antenna_gain.patch +++ b/package/kernel/mac80211/patches/522-mac80211_configure_antenna_gain.patch @@ -36,9 +36,9 @@ u8 ps_dtim_period; --- a/include/uapi/linux/nl80211.h +++ b/include/uapi/linux/nl80211.h -@@ -2139,6 +2139,9 @@ enum nl80211_commands { - * the driver or is not needed (because roaming used the Fast Transition - * protocol). +@@ -2149,6 +2149,9 @@ enum nl80211_commands { + * @NL80211_ATTR_PMKR0_NAME: PMK-R0 Name for offloaded FT. + * @NL80211_ATTR_PORT_AUTHORIZED: (reserved) * + * @NL80211_ATTR_WIPHY_ANTENNA_GAIN: Configured antenna gain. Used to reduce + * transmit power to stay within regulatory limits. u32, dBi. @@ -46,7 +46,7 @@ * @NUM_NL80211_ATTR: total number of nl80211_attrs available * @NL80211_ATTR_MAX: highest attribute number currently defined * @__NL80211_ATTR_AFTER_LAST: internal use -@@ -2565,6 +2568,8 @@ enum nl80211_attrs { +@@ -2575,6 +2578,8 @@ enum nl80211_attrs { NL80211_ATTR_PMKR0_NAME, NL80211_ATTR_PORT_AUTHORIZED, @@ -137,7 +137,7 @@ }; /* policy for the key attributes */ -@@ -2378,6 +2379,20 @@ static int nl80211_set_wiphy(struct sk_b +@@ -2395,6 +2396,20 @@ static int nl80211_set_wiphy(struct sk_b if (result) return result; } diff --git a/package/kernel/mac80211/patches/530-ath9k_extra_leds.patch b/package/kernel/mac80211/patches/530-ath9k_extra_leds.patch index 8ea2f79a2..9084ea7db 100644 --- a/package/kernel/mac80211/patches/530-ath9k_extra_leds.patch +++ b/package/kernel/mac80211/patches/530-ath9k_extra_leds.patch @@ -103,7 +103,8 @@ + GFP_KERNEL); + if (!led) + return -ENOMEM; -+ + +- ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val); + led->gpio = gpio = (struct gpio_led *) (led + 1); + _name = (char *) (led->gpio + 1); + @@ -116,8 +117,7 @@ + ret = ath_add_led(sc, led); + if (unlikely(ret < 0)) + kfree(led); - -- ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val); ++ + return ret; } @@ -125,11 +125,11 @@ { - if (!sc->led_registered) - return; -+ struct ath_led *led; - +- - ath_led_brightness(&sc->led_cdev, LED_OFF); - led_classdev_unregister(&sc->led_cdev); -- ++ struct ath_led *led; + - ath9k_hw_gpio_free(sc->sc_ah, sc->sc_ah->led_pin); + while (!list_empty(&sc->leds)) { + led = list_first_entry(&sc->leds, struct ath_led, list); diff --git a/package/kernel/mac80211/patches/653-0043-rtl8xxxu-Do-not-set-auto-rate-fallback-on-8188eu.patch b/package/kernel/mac80211/patches/653-0043-rtl8xxxu-Do-not-set-auto-rate-fallback-on-8188eu.patch index c69de5b0a..1047625de 100644 --- a/package/kernel/mac80211/patches/653-0043-rtl8xxxu-Do-not-set-auto-rate-fallback-on-8188eu.patch +++ b/package/kernel/mac80211/patches/653-0043-rtl8xxxu-Do-not-set-auto-rate-fallback-on-8188eu.patch @@ -39,7 +39,7 @@ Signed-off-by: Jes Sorensen .adda_2t_path_on_a = 0x04db25a4, --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c -@@ -1655,6 +1655,7 @@ struct rtl8xxxu_fileops rtl8192eu_fops = +@@ -1658,6 +1658,7 @@ struct rtl8xxxu_fileops rtl8192eu_fops = .rx_desc_size = sizeof(struct rtl8xxxu_rxdesc24), .has_s0s1 = 0, .gen2_thermal_meter = 1, diff --git a/package/kernel/mac80211/patches/862-brcmfmac-Disable-power-management.patch b/package/kernel/mac80211/patches/862-brcmfmac-Disable-power-management.patch index 7c1841b77..43f8fbf67 100644 --- a/package/kernel/mac80211/patches/862-brcmfmac-Disable-power-management.patch +++ b/package/kernel/mac80211/patches/862-brcmfmac-Disable-power-management.patch @@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c -@@ -2849,6 +2849,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip +@@ -2838,6 +2838,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip * preference in cfg struct to apply this to * FW later while initializing the dongle */ From 02d192142392c12faad545cc573c7f041c5d0a53 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 22:49:38 +0800 Subject: [PATCH 07/15] mt76: update to the latest version --- package/kernel/mt76/Makefile | 6 +- .../mt76/patches/001-mac80211-4-14-api.patch | 86 ------------------- 2 files changed, 3 insertions(+), 89 deletions(-) delete mode 100644 package/kernel/mt76/patches/001-mac80211-4-14-api.patch diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile index 01b5f5286..3428ea1f7 100644 --- a/package/kernel/mt76/Makefile +++ b/package/kernel/mt76/Makefile @@ -8,9 +8,9 @@ PKG_LICENSE_FILES:= PKG_SOURCE_URL:=https://github.com/openwrt/mt76 PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2017-09-10 -PKG_SOURCE_VERSION:=d5e945e9b2ee8f52581c1a6978097cf30c39cfd9 -PKG_MIRROR_HASH:=276eb2eea7b5ae64424292c5d955a8543fd3e39a2125b8046a30a519be76f3c9 +PKG_SOURCE_DATE:=2017-10-12 +PKG_SOURCE_VERSION:=37654d704772512065cd28b007342758c2a0f14a +PKG_MIRROR_HASH:=487ca40ed4e1ffe015dabc76c0a84782602d84f5b08c9c86cc6c892cb499623b PKG_MAINTAINER:=Felix Fietkau PKG_BUILD_PARALLEL:=1 diff --git a/package/kernel/mt76/patches/001-mac80211-4-14-api.patch b/package/kernel/mt76/patches/001-mac80211-4-14-api.patch deleted file mode 100644 index 6cff15b19..000000000 --- a/package/kernel/mt76/patches/001-mac80211-4-14-api.patch +++ /dev/null @@ -1,86 +0,0 @@ ---- a/mt76x2_mac.c -+++ b/mt76x2_mac.c -@@ -46,7 +46,7 @@ mt76x2_mac_process_rate(struct ieee80211 - case MT_PHY_TYPE_CCK: - if (idx >= 8) { - idx -= 8; -- status->flag |= RX_FLAG_SHORTPRE; -+ status->enc_flags |= RX_ENC_FLAG_SHORTPRE; - } - - if (idx >= 4) -@@ -55,16 +55,16 @@ mt76x2_mac_process_rate(struct ieee80211 - status->rate_idx = idx; - return; - case MT_PHY_TYPE_HT_GF: -- status->flag |= RX_FLAG_HT_GF; -+ status->enc_flags |= RX_ENC_FLAG_HT_GF; - /* fall through */ - case MT_PHY_TYPE_HT: -- status->flag |= RX_FLAG_HT; -+ status->encoding = RX_ENC_HT; - status->rate_idx = idx; - break; - case MT_PHY_TYPE_VHT: -- status->flag |= RX_FLAG_VHT; -+ status->encoding = RX_ENC_VHT; - status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx); -- status->vht_nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1; -+ status->nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1; - break; - default: - WARN_ON(1); -@@ -72,22 +72,22 @@ mt76x2_mac_process_rate(struct ieee80211 - } - - if (rate & MT_RXWI_RATE_LDPC) -- status->flag |= RX_FLAG_LDPC; -+ status->enc_flags |= RX_ENC_FLAG_LDPC; - - if (rate & MT_RXWI_RATE_SGI) -- status->flag |= RX_FLAG_SHORT_GI; -+ status->enc_flags |= RX_ENC_FLAG_SHORT_GI; - - if (rate & MT_RXWI_RATE_STBC) -- status->flag |= 1 << RX_FLAG_STBC_SHIFT; -+ status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT; - - switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) { - case MT_PHY_BW_20: - break; - case MT_PHY_BW_40: -- status->flag |= RX_FLAG_40MHZ; -+ status->bw = RATE_INFO_BW_40; - break; - case MT_PHY_BW_80: -- status->vht_flag |= RX_VHT_FLAG_80MHZ; -+ status->bw = RATE_INFO_BW_80; - break; - default: - break; ---- a/mt7603_mac.c -+++ b/mt7603_mac.c -@@ -411,19 +411,19 @@ mt7603_mac_fill_rx(struct mt7603_dev *de - break; - case MT_PHY_TYPE_HT_GF: - case MT_PHY_TYPE_HT: -- status->flag |= RX_FLAG_HT; -+ status->encoding = RX_ENC_HT; - break; - case MT_PHY_TYPE_VHT: -- status->flag |= RX_FLAG_VHT; -+ status->encoding = RX_ENC_VHT; - break; - default: - WARN_ON(1); - } - - if (rxdg0 & MT_RXV1_HT_SHORT_GI) -- status->flag |= RX_FLAG_SHORT_GI; -+ status->enc_flags |= RX_ENC_FLAG_SHORT_GI; - -- status->flag |= RX_FLAG_STBC_MASK * -+ status->enc_flags |= RX_ENC_FLAG_STBC_MASK * - FIELD_GET(MT_RXV1_HT_STBC, rxdg0); - - status->rate_idx = i; From de8c536beffe0e35f87e1c0c81611600f35e9ddd Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 22:54:05 +0800 Subject: [PATCH 08/15] kernel: add fix for bgmac with BCM B50212E B1 PHY --- ...-master-mode-for-BCM54210E-and-B5021.patch | 50 +++++++++++++++++ ...-support-new-device-flag-for-setting.patch | 54 +++++++++++++++++++ .../hack-4.9/773-bgmac-add-srab-switch.patch | 2 +- ...-master-mode-for-BCM54210E-and-B5021.patch | 50 +++++++++++++++++ ...ick-Broadcom-drivers-updates-from-v4.patch | 3 +- ...ck-Broadcom-drivers-updates-from-v4.patch} | 12 ++++- ...ick-Broadcom-drivers-updates-from-v4.patch | 37 +++++++++++++ .../773-bgmac-add-srab-switch.patch | 2 +- 8 files changed, 204 insertions(+), 6 deletions(-) create mode 100644 target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch create mode 100644 target/linux/generic/backport-4.9/076-v4.15-0001-net-phy-broadcom-support-new-device-flag-for-setting.patch create mode 100644 target/linux/generic/pending-4.4/073-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch rename target/linux/generic/pending-4.4/{078-0004-net-phy-pick-Broadcom-drivers-updates-from-net-next-.patch => 078-0004-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch} (93%) create mode 100644 target/linux/generic/pending-4.4/078-0006-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch diff --git a/target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch b/target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch new file mode 100644 index 000000000..c371e6355 --- /dev/null +++ b/target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch @@ -0,0 +1,50 @@ +From 12acd136913ccdf394eeb2bc8686ff5505368119 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 12 Oct 2017 10:21:26 +0200 +Subject: [PATCH] net: bgmac: enable master mode for BCM54210E and B50212E PHYs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There are 4 very similar PHYs: +0x600d84a1: BCM54210E (rev B0) +0x600d84a2: BCM54210E (rev B1) +0x600d84a5: B50212E (rev B0) +0x600d84a6: B50212E (rev B1) +that need setting master mode manually. It's because they run in slave +mode by default with Automatic Slave/Master configuration disabled which +can lead to unreliable connection with massive ping loss. + +So far it was reported for a board with BCM47189 SoC and B50212E B1 PHY +connected to the bgmac supported ethernet device. Telling PHY driver to +setup PHY properly solves this issue. + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bgmac-bcma.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c ++++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c +@@ -159,13 +159,19 @@ static int bgmac_probe(struct bcma_devic + + if (!bgmac_is_bcm4707_family(core) && + !(ci->id == BCMA_CHIP_ID_BCM53573 && core->core_unit == 1)) { ++ struct phy_device *phydev; ++ + mii_bus = bcma_mdio_mii_register(bgmac); + if (IS_ERR(mii_bus)) { + err = PTR_ERR(mii_bus); + goto err; + } +- + bgmac->mii_bus = mii_bus; ++ ++ phydev = mdiobus_get_phy(bgmac->mii_bus, bgmac->phyaddr); ++ if (ci->id == BCMA_CHIP_ID_BCM53573 && phydev && ++ (phydev->drv->phy_id & phydev->drv->phy_id_mask) == PHY_ID_BCM54210E) ++ phydev->dev_flags |= PHY_BRCM_EN_MASTER_MODE; + } + + if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) { diff --git a/target/linux/generic/backport-4.9/076-v4.15-0001-net-phy-broadcom-support-new-device-flag-for-setting.patch b/target/linux/generic/backport-4.9/076-v4.15-0001-net-phy-broadcom-support-new-device-flag-for-setting.patch new file mode 100644 index 000000000..334c44469 --- /dev/null +++ b/target/linux/generic/backport-4.9/076-v4.15-0001-net-phy-broadcom-support-new-device-flag-for-setting.patch @@ -0,0 +1,54 @@ +From 2355a6546a053b1c16ebefd6ce1f0cccc00e1da5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 12 Oct 2017 10:21:25 +0200 +Subject: [PATCH] net: phy: broadcom: support new device flag for setting + master mode +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some of Broadcom's PHYs run by default in slave mode with Automatic +Slave/Master configuration disabled. It stops them from working properly +with some devices. + +So far it has been verified for BCM54210E and BCM50212E which don't +work well with Intel's I217-LM and I218-LM: +http://ark.intel.com/products/60019/Intel-Ethernet-Connection-I217-LM +http://ark.intel.com/products/71307/Intel-Ethernet-Connection-I218-LM +I was told there is massive ping loss. + +This commit adds support for a new flag which can be set by an ethernet +driver to fixup PHY setup. + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + drivers/net/phy/broadcom.c | 6 ++++++ + include/linux/brcmphy.h | 1 + + 2 files changed, 7 insertions(+) + +--- a/drivers/net/phy/broadcom.c ++++ b/drivers/net/phy/broadcom.c +@@ -43,6 +43,12 @@ static int bcm54210e_config_init(struct + val &= ~BCM54810_SHD_CLK_CTL_GTXCLK_EN; + bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val); + ++ if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) { ++ val = phy_read(phydev, MII_CTRL1000); ++ val |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER; ++ phy_write(phydev, MII_CTRL1000, val); ++ } ++ + return 0; + } + +--- a/include/linux/brcmphy.h ++++ b/include/linux/brcmphy.h +@@ -59,6 +59,7 @@ + #define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000 + #define PHY_BRCM_CLEAR_RGMII_MODE 0x00004000 + #define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00008000 ++#define PHY_BRCM_EN_MASTER_MODE 0x00010000 + + /* Broadcom BCM7xxx specific workarounds */ + #define PHY_BRCM_7XXX_REV(x) (((x) >> 8) & 0xff) diff --git a/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch b/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch index c865177c2..e6ad0a51d 100644 --- a/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch +++ b/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch @@ -14,7 +14,7 @@ Signed-off-by: Hauke Mehrtens --- a/drivers/net/ethernet/broadcom/bgmac-bcma.c +++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -230,6 +230,7 @@ static int bgmac_probe(struct bcma_devic +@@ -236,6 +236,7 @@ static int bgmac_probe(struct bcma_devic bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST; bgmac->feature_flags |= BGMAC_FEAT_NO_RESET; bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500; diff --git a/target/linux/generic/pending-4.4/073-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch b/target/linux/generic/pending-4.4/073-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch new file mode 100644 index 000000000..27cd660b5 --- /dev/null +++ b/target/linux/generic/pending-4.4/073-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch @@ -0,0 +1,50 @@ +From 12acd136913ccdf394eeb2bc8686ff5505368119 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 12 Oct 2017 10:21:26 +0200 +Subject: [PATCH] net: bgmac: enable master mode for BCM54210E and B50212E PHYs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There are 4 very similar PHYs: +0x600d84a1: BCM54210E (rev B0) +0x600d84a2: BCM54210E (rev B1) +0x600d84a5: B50212E (rev B0) +0x600d84a6: B50212E (rev B1) +that need setting master mode manually. It's because they run in slave +mode by default with Automatic Slave/Master configuration disabled which +can lead to unreliable connection with massive ping loss. + +So far it was reported for a board with BCM47189 SoC and B50212E B1 PHY +connected to the bgmac supported ethernet device. Telling PHY driver to +setup PHY properly solves this issue. + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bgmac-bcma.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c ++++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c +@@ -159,13 +159,19 @@ static int bgmac_probe(struct bcma_devic + + if (!bgmac_is_bcm4707_family(core) && + !(ci->id == BCMA_CHIP_ID_BCM53573 && core->core_unit == 1)) { ++ struct phy_device *phydev; ++ + mii_bus = bcma_mdio_mii_register(bgmac); + if (IS_ERR(mii_bus)) { + err = PTR_ERR(mii_bus); + goto err; + } +- + bgmac->mii_bus = mii_bus; ++ ++ phydev = bgmac->mii_bus->phy_map[bgmac->phyaddr]; ++ if (ci->id == BCMA_CHIP_ID_BCM53573 && phydev && ++ (phydev->drv->phy_id & phydev->drv->phy_id_mask) == PHY_ID_BCM54210E) ++ phydev->dev_flags |= PHY_BRCM_EN_MASTER_MODE; + } + + if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) { diff --git a/target/linux/generic/pending-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch b/target/linux/generic/pending-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch index bf8818976..1d943d605 100644 --- a/target/linux/generic/pending-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch +++ b/target/linux/generic/pending-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch @@ -1,6 +1,5 @@ From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH 1/2] net: phy: cherry-pick Broadcom drivers updates from - v4.10-rc1 +Subject: [PATCH] net: phy: cherry-pick Broadcom drivers updates from v4.10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit diff --git a/target/linux/generic/pending-4.4/078-0004-net-phy-pick-Broadcom-drivers-updates-from-net-next-.patch b/target/linux/generic/pending-4.4/078-0004-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch similarity index 93% rename from target/linux/generic/pending-4.4/078-0004-net-phy-pick-Broadcom-drivers-updates-from-net-next-.patch rename to target/linux/generic/pending-4.4/078-0004-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch index 794753ffa..269c4e724 100644 --- a/target/linux/generic/pending-4.4/078-0004-net-phy-pick-Broadcom-drivers-updates-from-net-next-.patch +++ b/target/linux/generic/pending-4.4/078-0004-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch @@ -1,10 +1,18 @@ From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH 2/2] net: phy: pick Broadcom drivers updates from net-next for - 4.11 +Subject: [PATCH] net: phy: cherry-pick Broadcom drivers updates from v4.11 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit +This includes following upstream commits: +62e13097c46c net: phy: broadcom: rehook BCM54612E specific init +0fc9ae107669 net: phy: broadcom: add support for BCM54210E +5e7bfa6cb0a9 net: phy: bcm-phy-lib: clean up remaining AUXCTL register defines +8293c7bcdef1 net: phy: broadcom: drop duplicated define for RGMII SKEW delay +85b4685da52f net: phy: broadcom: use auxctl reading helper in BCM54612E code +039a7b8592ab net: phy: bcm7xxx: Implement EGPHY workaround for 7278 +582d0ac397ca net: phy: bcm7xxx: Add entry for BCM7278 + Signed-off-by: Rafał Miłecki --- diff --git a/target/linux/generic/pending-4.4/078-0006-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch b/target/linux/generic/pending-4.4/078-0006-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch new file mode 100644 index 000000000..c39995da7 --- /dev/null +++ b/target/linux/generic/pending-4.4/078-0006-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch @@ -0,0 +1,37 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Subject: [PATCH] net: phy: cherry-pick Broadcom drivers updates from v4.15 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This includes following upstream commits: +2355a6546a05 net: phy: broadcom: support new device flag for setting master mode + +Signed-off-by: Rafał Miłecki +--- + +--- a/drivers/net/phy/broadcom.c ++++ b/drivers/net/phy/broadcom.c +@@ -43,6 +43,12 @@ static int bcm54210e_config_init(struct + val &= ~BCM54810_SHD_CLK_CTL_GTXCLK_EN; + bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val); + ++ if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) { ++ val = phy_read(phydev, MII_CTRL1000); ++ val |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER; ++ phy_write(phydev, MII_CTRL1000, val); ++ } ++ + return 0; + } + +--- a/include/linux/brcmphy.h ++++ b/include/linux/brcmphy.h +@@ -59,6 +59,7 @@ + #define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000 + #define PHY_BRCM_CLEAR_RGMII_MODE 0x00004000 + #define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00008000 ++#define PHY_BRCM_EN_MASTER_MODE 0x00010000 + + /* Broadcom BCM7xxx specific workarounds */ + #define PHY_BRCM_7XXX_REV(x) (((x) >> 8) & 0xff) diff --git a/target/linux/generic/pending-4.4/773-bgmac-add-srab-switch.patch b/target/linux/generic/pending-4.4/773-bgmac-add-srab-switch.patch index 5e358c38c..b3cb08723 100644 --- a/target/linux/generic/pending-4.4/773-bgmac-add-srab-switch.patch +++ b/target/linux/generic/pending-4.4/773-bgmac-add-srab-switch.patch @@ -78,7 +78,7 @@ Signed-off-by: Hauke Mehrtens struct bgmac *bgmac_alloc(struct device *dev); --- a/drivers/net/ethernet/broadcom/bgmac-bcma.c +++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -230,6 +230,7 @@ static int bgmac_probe(struct bcma_devic +@@ -236,6 +236,7 @@ static int bgmac_probe(struct bcma_devic bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST; bgmac->feature_flags |= BGMAC_FEAT_NO_RESET; bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500; From ca5177545ca6324dbb6b9c55d9ef9a6db73de7dc Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 13 Oct 2017 23:03:00 +0800 Subject: [PATCH 09/15] fix luci-app-kcptun makefile --- package/lean/luci-app-kcptun/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/lean/luci-app-kcptun/Makefile b/package/lean/luci-app-kcptun/Makefile index c569e5c94..fcdc65d47 100644 --- a/package/lean/luci-app-kcptun/Makefile +++ b/package/lean/luci-app-kcptun/Makefile @@ -20,7 +20,7 @@ define Package/$(PKG_NAME)/conffiles /etc/config/kcptun endef -include $(TOPDIR)/feeds/luci.mk +include $(TOPDIR)/feeds/luci/luci.mk define Package/$(PKG_NAME)/postinst #!/bin/sh From 0b130e4e18114569d4603485b91bb748b310772d Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 14 Oct 2017 13:09:10 +0800 Subject: [PATCH 10/15] update packages source to 17.01.3 --- include/version.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/version.mk b/include/version.mk index b078516dd..561ab5952 100644 --- a/include/version.mk +++ b/include/version.mk @@ -40,7 +40,7 @@ VERSION_NICK:=$(call qstrip_escape,$(CONFIG_VERSION_NICK)) VERSION_NICK:=$(if $(VERSION_NICK),$(VERSION_NICK),$(RELEASE)) VERSION_REPO:=$(call qstrip_escape,$(CONFIG_VERSION_REPO)) -VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),http://downloads.lede-project.org/releases/17.01.2) +VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),http://downloads.lede-project.org/releases/17.01.3) VERSION_DIST:=$(call qstrip_escape,$(CONFIG_VERSION_DIST)) VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),LEDE) From 53eada2a47f61ee4445315a2adffc0c6f726960e Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 14 Oct 2017 13:16:17 +0800 Subject: [PATCH 11/15] dnsmasq: add listen_address parameter --- package/network/services/dnsmasq/Makefile | 2 +- package/network/services/dnsmasq/files/dnsmasq.init | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/package/network/services/dnsmasq/Makefile b/package/network/services/dnsmasq/Makefile index 33644e8e5..dd9df245a 100644 --- a/package/network/services/dnsmasq/Makefile +++ b/package/network/services/dnsmasq/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=dnsmasq PKG_VERSION:=2.78 -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq/ diff --git a/package/network/services/dnsmasq/files/dnsmasq.init b/package/network/services/dnsmasq/files/dnsmasq.init index 014964395..3d3d83334 100644 --- a/package/network/services/dnsmasq/files/dnsmasq.init +++ b/package/network/services/dnsmasq/files/dnsmasq.init @@ -142,6 +142,10 @@ append_interface() { xappend "--interface=$ifname" } +append_listenaddress() { + xappend "--listen-address=$1" +} + append_notinterface() { network_get_device ifname "$1" || ifname="$1" xappend "--except-interface=$ifname" @@ -835,6 +839,7 @@ dnsmasq_start() append_parm "$cfg" "maxport" "--max-port" append_parm "$cfg" "domain" "--domain" append_parm "$cfg" "local" "--server" + config_list_foreach "$cfg" "listen_address" append_listenaddress config_list_foreach "$cfg" "server" append_server config_list_foreach "$cfg" "rev_server" append_rev_server config_list_foreach "$cfg" "address" append_address From 21846b9d088431e80c7169e54816a0d2292375e9 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 14 Oct 2017 13:17:48 +0800 Subject: [PATCH 12/15] mac80211: fix tx power regression for ath9k --- ...5-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/kernel/mac80211/patches/315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch b/package/kernel/mac80211/patches/315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch index 59e4ddee3..78083517b 100644 --- a/package/kernel/mac80211/patches/315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch +++ b/package/kernel/mac80211/patches/315-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch @@ -17,7 +17,7 @@ Signed-off-by: Felix Fietkau + /* FCC allows maximum antenna gain of 3 dBi */ + if (reg->region == NL80211_DFS_FCC) -+ ant_reduction = min_t(int, ant_reduction - 6, 0); ++ ant_reduction = max_t(int, ant_reduction - 6, 0); + ah->eep_ops->set_txpower(ah, chan, ctl, ant_reduction, new_pwr, test); } From 301df3d43149fb5cecc7dfe0d236e36786083924 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 14 Oct 2017 13:19:52 +0800 Subject: [PATCH 13/15] kernel: bump 4.4 to 4.4.92 --- include/kernel-version.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/kernel-version.mk b/include/kernel-version.mk index eb41da3d2..405e5fd52 100644 --- a/include/kernel-version.mk +++ b/include/kernel-version.mk @@ -3,11 +3,11 @@ LINUX_RELEASE?=1 LINUX_VERSION-3.18 = .71 -LINUX_VERSION-4.4 = .91 +LINUX_VERSION-4.4 = .92 LINUX_VERSION-4.9 = .54 LINUX_KERNEL_HASH-3.18.71 = 5abc9778ad44ce02ed6c8ab52ece8a21c6d20d21f6ed8a19287b4a38a50c1240 -LINUX_KERNEL_HASH-4.4.91 = cb9d2b8c1afe58414de5bc7d65429cc9f5f37c80fc229d0e83c55c5c3c254ffb +LINUX_KERNEL_HASH-4.4.92 = 53f8cd8b024444df0f242f8e6ab5147b0b009d7a30e8b2ed3854e8d17937460d LINUX_KERNEL_HASH-4.9.54 = 651005db6efbce4fcd607415ebd697dd8d2f5a2abc2c632b11ece03a1a210fc5 ifdef KERNEL_PATCHVER From b182dd2f63f2ba6e8a8ddc0fd0ccf55c72f95b78 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 14 Oct 2017 13:35:16 +0800 Subject: [PATCH 14/15] add he-6in4 package to auto-update he 6in4 tunnel --- package/lean/he-6in4/Makefile | 58 +++++++++++++++++++ .../files/root/etc/hotplug.d/iface/60-6in4 | 12 ++++ 2 files changed, 70 insertions(+) create mode 100644 package/lean/he-6in4/Makefile create mode 100644 package/lean/he-6in4/files/root/etc/hotplug.d/iface/60-6in4 diff --git a/package/lean/he-6in4/Makefile b/package/lean/he-6in4/Makefile new file mode 100644 index 000000000..8dcb6978c --- /dev/null +++ b/package/lean/he-6in4/Makefile @@ -0,0 +1,58 @@ +# +# Copyright (C) 2015 OpenWrt-dist +# +# This is free software, licensed under the GNU General Public License v3. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=he-6in4 +PKG_VERSION:=1.0 +PKG_RELEASE:=1 + +PKG_LICENSE:=GPLv3 +PKG_LICENSE_FILES:=LICENSE +PKG_MAINTAINER:=ghostry + +PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME) + +include $(INCLUDE_DIR)/package.mk + +define Package/he-6in4 + SECTION:=ipv6 + CATEGORY:=Gmod + SUBMENU:=Network + TITLE:=Dynamic Update he.net of ip + PKGARCH:=all + DEPENDS:=+luci-proto-ipv6 +6in4 +curl +endef + +define Package/he-6in4/description + Dynamic Update he.net of ip +endef + +define Build/Prepare +endef + +define Build/Configure +endef + +define Build/Compile +endef + +define Package/he-6in4/postinst +#!/bin/sh +if [ -z "$${IPKG_INSTROOT}" ]; then + chmod 755 /etc/hotplug.d/iface/60-6in4 >/dev/null 2>&1 +fi +exit 0 +endef + +define Package/he-6in4/install + $(INSTALL_DIR) $(1)/etc/hotplug.d/iface + $(INSTALL_BIN) ./files/root/etc/hotplug.d/iface/60-6in4 $(1)/etc/hotplug.d/iface/60-6in4 +endef + + +$(eval $(call BuildPackage,he-6in4)) diff --git a/package/lean/he-6in4/files/root/etc/hotplug.d/iface/60-6in4 b/package/lean/he-6in4/files/root/etc/hotplug.d/iface/60-6in4 new file mode 100644 index 000000000..007806083 --- /dev/null +++ b/package/lean/he-6in4/files/root/etc/hotplug.d/iface/60-6in4 @@ -0,0 +1,12 @@ +#!/bin/sh +. /lib/functions.sh +if [ "$ACTION" != "ifup" ]; then + exit +fi +config_load network +config_get tunnelid $INTERFACE tunnelid +config_get username $INTERFACE username +config_get password $INTERFACE password +if [ "$tunnelid" != "" ]; then + curl -k -u "$username":"$password" https://ipv4.tunnelbroker.net/nic/update?hostname=$tunnelid +fi From d8ecfd786bf410e8fa7c5f66b86712cb6550fe5a Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 14 Oct 2017 13:43:04 +0800 Subject: [PATCH 15/15] add luci-theme-atmaterial package --- package/lean/luci-theme-atmaterial/Makefile | 14 + .../luci-static/atmaterial/css/style.css | 1744 +++++++++++++++++ .../htdocs/luci-static/atmaterial/favicon.ico | Bin 0 -> 2462 bytes .../fonts/Roboto-Medium-webfont.woff | Bin 0 -> 70200 bytes .../fonts/Roboto-Regular-webfont.woff | Bin 0 -> 68776 bytes .../atmaterial/fonts/advancedtomato.eot | Bin 0 -> 8480 bytes .../atmaterial/fonts/advancedtomato.svg | 53 + .../atmaterial/fonts/advancedtomato.ttf | Bin 0 -> 8288 bytes .../atmaterial/fonts/advancedtomato.woff | Bin 0 -> 6272 bytes .../luci-static/atmaterial/fonts/font.eot | Bin 0 -> 1912 bytes .../luci-static/atmaterial/fonts/font.svg | 16 + .../luci-static/atmaterial/fonts/font.ttf | Bin 0 -> 1748 bytes .../luci-static/atmaterial/fonts/font.woff | Bin 0 -> 1824 bytes .../luci-static/atmaterial/js/jquery.min.js | 6 + .../luci-static/atmaterial/js/script.js | 236 +++ .../htdocs/luci-static/atmaterial/logo.png | Bin 0 -> 2224 bytes .../luasrc/view/themes/atmaterial/footer.htm | 51 + .../luasrc/view/themes/atmaterial/header.htm | 238 +++ .../etc/uci-defaults/30-luci-theme-atmaterial | 7 + 19 files changed, 2365 insertions(+) create mode 100644 package/lean/luci-theme-atmaterial/Makefile create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/css/style.css create mode 100755 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/favicon.ico create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/Roboto-Medium-webfont.woff create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/Roboto-Regular-webfont.woff create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/advancedtomato.eot create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/advancedtomato.svg create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/advancedtomato.ttf create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/advancedtomato.woff create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/font.eot create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/font.svg create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/font.ttf create mode 100644 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/font.woff create mode 100755 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/js/jquery.min.js create mode 100755 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/js/script.js create mode 100755 package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/logo.png create mode 100755 package/lean/luci-theme-atmaterial/luasrc/view/themes/atmaterial/footer.htm create mode 100755 package/lean/luci-theme-atmaterial/luasrc/view/themes/atmaterial/header.htm create mode 100644 package/lean/luci-theme-atmaterial/root/etc/uci-defaults/30-luci-theme-atmaterial diff --git a/package/lean/luci-theme-atmaterial/Makefile b/package/lean/luci-theme-atmaterial/Makefile new file mode 100644 index 000000000..d0ab1cc0c --- /dev/null +++ b/package/lean/luci-theme-atmaterial/Makefile @@ -0,0 +1,14 @@ +# +# Copyright (C) 2008-2014 The LuCI Team +# +# This is free software, licensed under the Apache License, Version 2.0 . +# + +include $(TOPDIR)/rules.mk + +LUCI_TITLE:=Advanced Tomato Material +LUCI_DEPENDS:= + +include $(TOPDIR)/feeds/luci/luci.mk + +# call BuildPackage - OpenWrt buildroot signature diff --git a/package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/css/style.css b/package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/css/style.css new file mode 100644 index 000000000..50ae8660c --- /dev/null +++ b/package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/css/style.css @@ -0,0 +1,1744 @@ +/** + * Material is a clean HTML5 theme for LuCI. It is based on luci-theme-bootstrap and MUI + * + * luci-theme-material + * Copyright 2015 Lutty Yang + * + * Have a bug? Please create an issue here on GitHub! + * https://github.com/LuttyYang/luci-theme-material/issues + * + * luci-theme-bootstrap: + * Copyright 2008 Steven Barth + * Copyright 2008 Jo-Philipp Wich + * Copyright 2012 David Menting + * + * MUI: + * https://github.com/muicss/mui + * + * Licensed to the public under the Apache License 2.0 + */ + +/* + * Font generate by Icomoon + */ + +@font-face { + font-family: 'Roboto'; + src: local('Roboto Medium'), local('Roboto-Medium'), url('../fonts/Roboto-Medium-webfont.woff') format('woff'); + font-weight: 500; + font-style: normal; +} + +@font-face { + font-family: 'Roboto'; + src: local('Roboto'), local('Roboto Regular'), local('Roboto-Regular'), url('../fonts/Roboto-Regular-webfont.woff') format('woff'); + font-weight: normal; + font-style: normal; +} + +@font-face { + font-family: 'icomoon'; + src: url('../fonts/font.eot'); + src: url('../fonts/font.eot') format('embedded-opentype'), + url('../fonts/font.ttf') format('truetype'), + url('../fonts/font.woff') format('woff'), + url('../fonts/font.svg') format('svg'); + font-weight: normal; + font-style: normal; +} +@font-face { + font-family: "advancedtomato"; + src:url("../fonts/advancedtomato.eot"); + src:url("../fonts/advancedtomato.eot?#iefix") format("embedded-opentype"), + url("../fonts/advancedtomato.woff") format("woff"), + url("../fonts/advancedtomato.ttf") format("truetype"), + url("../fonts/advancedtomato.svg#advancedtomato") format("svg"); + font-weight: normal; + font-style: normal; + +} +.cbi-button-up, +.cbi-button-down, +.cbi-value-helpicon, +.showSide, +.main > .loading > span { + font-family: 'icomoon', Roboto !important; + font-size:10px; + speak: none; + font-style: normal !important; + font-weight: normal !important; + font-variant: normal !important; + text-transform: none !important; + line-height: 1; + + -webkit-font-smoothing: antialiased; + -moz-osx-font-smoothing: grayscale; +} + +* { + margin: 0; + padding: 0; + box-sizing: border-box; +} + +.h1, .h2, .h3, .h4, .h5, .h6, h1, h2, h3, h4, h5, h6 { + font-family: Roboto, 'Microsoft Yahei' !important; + font-weight: 500; + line-height: 1.1; + color: inherit; + clear:both; +} + + +html { + -webkit-text-size-adjust: 100%; + -ms-text-size-adjust: 100%; +} + +html, body { + margin: 0px; + padding: 0px; + height: 100%; + font-family: Roboto, 'Microsoft Yahei' !important; + font-size:10pt; + line-height: 150%; + color:#76838f; + /*min-width: 960px;*/ +} + +body div { + line-height:150%; +} + +a { + color: #76838f; + text-decoration: none; +} + +em {font-style:normal !important;} + +select { + padding: 0.36rem 0.8rem; + color: #555; + background-color: #fff; + background-image: none; + border: 1px solid #ccc; +} + +select, +input { + color: #76838f; + padding: 6px 10px; + margin: 0; + height: 34px; + line-height: normal; + font-size: 10pt; + font-family: "Roboto", sans-serif, Helvetica, Arial, sans-serif; + border: 1px solid #e4eaec; + background-color: #fff; + transition: color 150ms ease, border-color 150ms ease, opacity 150ms ease; + -webkit-transition: color 150ms ease, border-color 150ms ease, opacity 150ms ease; + outline-style: none; + vertical-align: baseline; + border-radius: 3px; +} + +select:not([multiple="multiple"]):focus, +input:focus { + border-color: #0099CC; +} + +select[multiple="multiple"] { + height: auto; +} + +code { + color: #0099CC; +} + +abbr { + color: #333; + text-decoration: underline; + cursor: help; +} + +hr{ + margin: 1rem 0; + border-color: #EEE; + opacity: 0.1; +} + +header, .main { + width: 100%; + position: absolute; +} + +header { + height: 60px; + box-shadow: 0 2px 4px rgba(0, 0, 0, 0.08); + transition: box-shadow .2s; + float: left; + position: fixed; + z-index: 101; +} + +footer { + text-align: right; + padding: 1rem; + color: #aaa; + font-size: 11px; + text-shadow: 0px 0px 2px #BBB; +} + +footer > a { + color: #aaa; + text-decoration: none; +} + +.main { + top: 4rem; + bottom: 0rem; + position: relative; + height: 100%; + height: calc(100% - 4rem); +} + +.main > .loading { + position: fixed; + width: 100%; + height: 100%; + z-index: 1000; + display: block; + background-color: rgb(240, 240, 240); + top: 0; +} + +.main > .loading > span { + display: block; + text-align: center; + margin-top: 2rem; + color: #888; + font-size: 14px; +} + +.main > .loading > span > .loading-img:before { + content: "\e603"; +} + +.main > .loading > span > .loading-img { + animation: anim-rotate 2s infinite linear; + margin-right: 0.2rem; + display: inline-block; +} + +@keyframes anim-rotate { + 0% { + -webkit-transform: rotate(0); + -ms-transform: rotate(0); + transform: rotate(0); + } + 100% { + -webkit-transform: rotate(360deg); + -ms-transform: rotate(360deg); + transform: rotate(360deg) + } +} + +.main-left { + float: left; + top: 4rem; + width: 17rem; + bottom: 0rem; + background-color: #222222; + + overflow-x: auto; + position: fixed; +} + +.main-right { + width: 85%; + width: calc(100% - 17rem); + float: right; + height: 100%; + background-color: #f1f4f5; +} + +.main-right > #maincontent { + background-color: #f1f4f5; +} + +.pull-right { + float: right; + margin-top:10px; + margin-right:10px; +} + +.pull-right span { + font-size:11px !important; +} + +.pull-left { + float: left; +} + +header { + background: #fff; + color: white; +} + +header > .container { +margin:0; +padding:0; +} + +header > .container > .brand { + font-size: 28px; + line-height:60px; + color: white; + cursor: default; + background: #0099CC; + display:block; + width:17rem; + padding-right: 10px; + height:60px; + text-align:center; + float:left; + font-weight:600; + letter-spacing:3px; +} +header > .container > a[class="brand"]:after { + content:"®"; + font-size:14px; + font-family:Tahoma; + position: absolute; + top:-10px; + font-weight:normal !important; +} +.warning { + background-color: #FF7D60 !important; + color: #FFF; +} + +.errorbox, +.alert-message { + margin: 5px 0 0 0; + padding: 2rem; + border: 0; + font-weight: normal; + font-style: normal; + line-height: 1; + font-family: inherit; + min-width: inherit; + overflow: auto; + border-radius: 0; + background-color: #FFF; + box-shadow: 0 2px 2px 0 rgba(0, 0, 0, .16), 0 0 2px 0 rgba(0, 0, 0, .12); +} + +.errorbox { + color: #fff; + background-color: #f0ad4e; + border-color: #eea236; +} + +.error { + color: red; +} + +#maincontent > .container > div:nth-child(1).alert-message.warning > a { + font: inherit; + overflow: visible; + text-transform: none; + display: inline-block; + margin-bottom: 0; + font-weight: 400; + text-align: center; + white-space: nowrap; + vertical-align: middle; + touch-action: manipulation; + cursor: pointer; + -webkit-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; + background-image: none; + min-width: 6rem; + padding: 0.5rem 1rem; + font-size: 14px; + line-height: 1.42857143; + color: #fff; + background-color: #5bc0de; + border-color: #46b8da; + margin-top: 2rem; + text-decoration: inherit; +} + +.main > .main-left > .nav { + margin-top: 2rem; + font-size: 11pt; +} + +.main > .main-left > .nav > li a { + color: #969ba0; + display: block; +} + +.main > .main-left > .nav > li:nth-last-child(1) { + font-size: 11pt; + height:40px; +} + +.main > .main-left > .nav > li { + cursor: pointer; +} + +.main > .main-left > .nav > .slide { + padding: 0; +} +.main > .main-left > .nav > .slide > a[data-title="Status"]:before { + content: "\e026"; + display: inline-block; + top: -1px; + left:-10px; + position: relative; + vertical-align: middle; + display: inline-block; + font-family: "advancedtomato" !important; + font-style: normal !important; + font-weight: normal !important; + font-variant: normal !important; + text-transform: none !important; + speak: none; + line-height: 1; + -webkit-font-smoothing: antialiased; +} +.main > .main-left > .nav > .slide > a:before { + display: inline-block; + top: -1px; + left:-10px; + position: relative; + vertical-align: middle; + display: inline-block; + font-family: "advancedtomato" !important; + font-style: normal !important; + font-weight: normal !important; + font-variant: normal !important; + text-transform: none !important; + speak: none; + line-height: 1; + -webkit-font-smoothing: antialiased; +} + + +.main > .main-left > .nav > .slide > a[data-title="Status"]:before { + content: "\e026"; +} + +.main > .main-left > .nav > .slide > a[data-title="System"]:before { + content: "\e00a"; +} + +.main > .main-left > .nav > .slide > a[data-title="Network"]:before { + content: "\e00e"; +} +.main > .main-left > .nav > .slide > a[data-title="Usbapps"]:before { + content: "\e00b"; +} +.main > .main-left > .nav > .slide > a[data-title="Services"]:before { + content: "\e01b"; +} +.main > .main-left > .nav > .slide > a[data-title="NAS"]:before { + content: "\e00b"; +} + +.main > .main-left > .nav > li > a[data-title="Logout"] { + padding-left:36px; + line-height:40px; +} +.main > .main-left > .nav > li > a[data-title="Logout"]:before { + content: "\e005"; + display: inline-block; + top: -1px; + left:-10px; + position: relative; + vertical-align: middle; + display: inline-block; + font-family: "advancedtomato" !important; + font-style: normal !important; + font-weight: normal !important; + font-variant: normal !important; + text-transform: none !important; + speak: none; + line-height: 1; + -webkit-font-smoothing: antialiased; +} + +.main > .main-left > .nav > li > a[data-title="Reboot"] { + padding-left:36px; + line-height:40px; +} +.main > .main-left > .nav > li > a[data-title="Reboot"]:before { + content: "\e004"; + display: inline-block; + top: -1px; + left:-10px; + position: relative; + vertical-align: middle; + display: inline-block; + font-family: "advancedtomato" !important; + font-style: normal !important; + font-weight: normal !important; + font-variant: normal !important; + text-transform: none !important; + speak: none; + line-height: 1; + -webkit-font-smoothing: antialiased; +} +.main > .main-left > .nav > .slide > ul { + display: none; + list-style:dotted; +} + +.main > .main-left > .nav > .slide > .menu { + display: block; + padding: 10px 35px; + text-decoration: none; + cursor: default; +} + +.main > .main-left > .nav > li:hover, +.main > .main-left > .nav > .slide > .menu:hover { + background: #333; +} + +.main > .main-left > .nav > .slide:hover { + background: none; +} +.slide-menu { + overflow:hidden; + } +.main > .main-left > .nav > .slide > .slide-menu > li { + padding: 6px 50px; + font-size:12px !important; + position: relative; +} + +.slide-menu li:before { + content: ""; + left: 30px; + top: -15px; + bottom: 15px; + position: absolute; + display: block; + width: 1px; + border-left: 1px dashed #606c77; + z-index: 1; +} + +.main > .main-left > .nav > .slide > .slide-menu > .active { + background-color: #1a1a1a; +} + +.main > .main-left > .nav > .slide > .slide-menu > li > a { + position: relative; + display: block; + color: #969ba0; + text-shadow: 0px 1px 3px #222; + vertical-align: middle; +} +.slide-menu li a:before { + content: ""; + left: -20px; + top: 10px; + position: absolute; + display: block; + width: 15px; + border-bottom: 1px dashed #606c77; + z-index: 1; +} + +.main > .main-left > .nav > .slide > .slide-menu > .active > a { + color: white; +} + +.main > .main-left > .nav > .slide > .slide-menu > li:hover { + background: #333; +} + +.main > .main-left > .nav > .slide > .slide-menu > .active:hover { + background-color: #333; + cursor: hand; +} + +li { + list-style-type: none; +} + +#maincontent > .container { + margin:40px 40px 40px 50px; +} + +h1 { + font-size: 20px; + padding-bottom: 10px; + border-bottom: 1px solid #eee; +} + +h2 { + margin: 15px 0 0 0; + font-size: 16px; + padding-bottom: 10px; + padding-left: 5px; +} + +h3 { + margin: 5px 0 0 0; + font-size: 10pt; + padding-bottom: 10px; +} + +h4 { + +} + +label { +display: inline-block; + padding: 0 10px; + vertical-align: middle; +} +fieldset { + margin: 10px 0 0 0; + padding: 2rem; + border: 0; + font-weight: normal; + font-style: normal; + line-height: 1; + font-family: inherit; + + min-width: inherit; + overflow-x: hidden; + overflow-y: hidden; + + border-radius: 0; + background-color: #FFF; + box-shadow: 0 1px 1px rgba(0,0,0,.05); + border-radius: 4px; + -webkit-overflow-scrolling: touch; +} + +fieldset > legend { + display: none !important; +} + +fieldset > fieldset { + margin: 0; + padding: 0; + border: none; + box-shadow: none; +} + +.panel-title { + width: 100%; + display: block; + line-height: 1; + color: #76838f; + font-size: 10pt; + padding-bottom: 10px; +} + +table { + border-spacing: 0; + border-collapse: collapse; + width: 100%; + border: 1px solid #eee; +} + +table > tbody > tr > td, table > tbody > tr > th, table > tfoot > tr > td, table > tfoot > tr > th, table > thead > tr > td, table > thead > tr > th { + padding: 12px; + line-height: 1.42857143; + border-top: 1px dashed #EEE; + + white-space: nowrap; +} + +.cbi-section-table-cell { + text-align: center; +} + +.cbi-section-table-row { + text-align: center; +} + +fieldset > table > tbody > tr:nth-of-type(odd) { + background-color: #f9f9f9; +} + +/* fix progress bar */ +#swaptotal > div, +#swapfree > div, +#memfree > div, +#membuff > div, +#conns > div, +#memtotal > div { + width: 100% !important; + border-color:#ccc !important; + height:20px !important; + color:#76838f !important; +} + +#swaptotal > div > div, +#swapfree > div > div, +#memfree > div > div, +#membuff > div > div, +#conns > div > div, +#memtotal > div > div { + height: 1.4rem !important; + background-color: #e4eaec !important; +} + +/* fix multiple table */ + +table table { + border: none; +} + +.cbi-value-field table { + border: none; +} + +td > table > tbody > tr > td { + border: none; +} + +.cbi-value-field > table > tbody > tr > td { + border: none; +} + +/* button style */ + +.cbi-button { + -webkit-appearance: none; + text-transform: uppercase; + color: #fff; + background-color: #337ab7; + transition: all 0.2s ease-in-out; + display: inline-block; + padding: 0.2rem 1rem; + border: none; + border-radius: 0.2rem; + cursor: pointer; + -ms-touch-action: manipulation; + touch-action: manipulation; + background-image: none; + text-align: center; + white-space: nowrap; + -webkit-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; + font-size: 10pt; + width: auto !important; +} + +.cbi-button:hover, +.cbi-button:focus, +.cbi-button:active { + color: rgba(0, 0, 0, 0.87); + outline: 0; + text-decoration: none; + color: rgba(0, 0, 0, 0.87); +} + +.cbi-button:hover, +.cbi-button:focus { + box-shadow: 0 1px 1px rgba(0,0,0,.05); +} + +.cbi-button:active { + box-shadow: 0 1px 1px rgba(0,0,0,.05); +} + +.cbi-button:disabled { + cursor: not-allowed; + pointer-events: none; + opacity: 0.60; + box-shadow: none; +} + +form.inline + form.inline, +.cbi-button + .cbi-button { + margin-left: 0.6rem; +} + +.cbi-button-reset, +.cbi-input-remove { + color: #fff !important; + background-color: #617486 !important; +} + +.cbi-input-find, +.cbi-input-save, +.cbi-button-add, +.cbi-button-save, +.cbi-button-find, +.cbi-input-reload, +.cbi-button-reload { + color: #fff !important; + background-color: #337ab7 !important; + border-color: #2e6da4 !important; +} + +.cbi-input-apply, +.cbi-button-apply, +.cbi-button-edit { + color: #fff !important; + background-color: #cc181e; +} + +.cbi-input-reset, +.cbi-button-remove { + color: #fff !important; +background: #617486; +} + +.a-to-btn { + text-decoration: none; +} + +/* table */ + +.tabs { + padding-left: 0.5rem; + background-color: #FFFFFF; +} + +.cbi-tabmenu > li, +.tabs > li { + display: inline-block; + padding: 0.9rem 0rem; +} + +.cbi-tabmenu > li > a, +.tabs > li > a { + text-decoration: none; + color: #76838f; + padding: 0.9rem 1.5rem; +} + +.tabs > li[class~="active"], +.tabs > li:hover { + cursor: pointer; + border-bottom: 3px solid red; +} + +.tabs > li[class~="active"] > a { +} + +.tabs > li:hover { + border-bottom: 0.18751rem solid #C9C9C9; +} + +.cbi-tabmenu { + border-top: 1px solid #e4eaec; + border-left: 1px solid #e4eaec; + border-right: 1px solid #e4eaec; + background-color: #F7F7F7; +} + +.cbi-tabmenu > li:hover { + background-color: #F1F1F1; +} + +.cbi-tabmenu > li[class~="cbi-tab"] { + background-color: white; +} + + +.cbi-section-node-tabbed { + padding: 0; + margin-top: 0; + border-bottom: 1px solid #e4eaec; + border-left: 1px solid #e4eaec; + border-right: 1px solid #e4eaec; +} + +.cbi-tabcontainer { + clear:both; +} +.cbi-tabcontainer > .cbi-value:nth-of-type(2n) { + background-color: #f9f9f9; +} + +.cbi-value-field, +.cbi-value-description { + display: table-cell; +} + +.cbi-value-helpicon > img { + display: none; +} + +.cbi-value-helpicon:before { + content: "\f059"; +} + +.cbi-value-description { + font-size: small; + opacity: 0.5; + padding: 0.5rem 0 0 0; +} + +.cbi-value-title { + word-wrap: break-word; + line-height:150%; + vertical-align: middle; + padding:6px 10px; + width: 23rem; + float: left; + text-align: right; + display: table-cell; +} + +.cbi-value { + padding: 5px; + vertical-align: middle; + display: inline-block; + width: 100%; + border-top:1px dashed #e4eaec; +} + +.cbi-section-table-descr > .cbi-section-table-cell, +.cbi-section-table-titles > .cbi-section-table-cell { + border: none; +} + +.cbi-rowstyle-2 { + background-color: #fcfdfd; +} + +.cbi-rowstyle-2 .cbi-button-up, +.cbi-rowstyle-2 .cbi-button-down{ + background-color: #FFF !important; +} + +.cbi-section-table .cbi-section-table-titles .cbi-section-table-cell { + width: auto !important; +} + +/* desc */ +.cbi-section-descr, +.cbi-map-descr { + margin-bottom:10px; + padding-left:5px; + font-size: small; +} + +/* luci */ + +.hidden { + display: none +} + +.left { + text-align: left !important; +} + +.right { + text-align: right !important; +} + +.inline { + display: inline; +} + +.cbi-page-actions { + text-align: right; +} + +/* input */ +.cbi-value input[type="password"], +.cbi-value input[type="text"] { + min-width: 15rem; +} + +/* select */ +.cbi-value-field .cbi-input-select { + min-width: 15rem; +} + +.ifacebadge { + display: inline-flex; + padding: 0.5rem 1rem; + -webkit-box-shadow: inset 0 1px 0 rgba(255, 255, 255, 0.2), 0 1px 2px rgba(0, 0, 0, 0.05); + -moz-box-shadow: inset 0 1px 0 rgba(255, 255, 255, 0.2), 0 1px 2px rgba(0, 0, 0, 0.05); + box-shadow: inset 0 1px 0 rgba(255, 255, 255, 0.2), 0 1px 2px rgba(0, 0, 0, 0.05); +} + +.ifacebadge > img { + float: right; + margin-left: 0.3rem; +} + +/*textarea*/ + +.cbi-input-textarea { + color: #76838f; + padding: 6px 10px; + margin: 0; + line-height: normal; + font-size: 10pt; + font-family: "Roboto", sans-serif, Helvetica, Arial, sans-serif; + border: 1px solid #e4eaec; + background-color: #fff; + transition: color 150ms ease, border-color 150ms ease, opacity 150ms ease; + -webkit-transition: color 150ms ease, border-color 150ms ease, opacity 150ms ease; + outline-style: none; + vertical-align: baseline; + border-radius: 3px; +} + +#syslog { + width: 100%; + min-height: 15rem; + padding: 1rem; + font-size: small; + color: #5F5F5F; + + margin-bottom: 20px; + border-radius: 0; + background-color: #FFF; + box-shadow: 0 2px 2px 0 rgba(0, 0, 0, .16), 0 0 2px 0 rgba(0, 0, 0, .12); + border: none; +} + +/* change */ +#wan4_i, #wan6_i { +width:50px !important; +} + +.uci-change-list { + font-family: monospace; +} + +.uci-change-list ins, +.uci-change-legend-label ins { + text-decoration: none; + border: 1px solid #00FF00; + background-color: #CCFFCC; + display: block; + padding: 2px; +} + +.uci-change-list del, +.uci-change-legend-label del { + text-decoration: none; + border: 1px solid #FF0000; + background-color: #FFCCCC; + display: block; + font-style: normal; + padding: 2px; +} + +.uci-change-list var, +.uci-change-legend-label var { + text-decoration: none; + border: 1px solid #CCCCCC; + background-color: #EEEEEE; + display: block; + font-style: normal; + padding: 2px; +} + +.uci-change-list var ins, +.uci-change-list var del { + border: none; + white-space: pre; + font-style: normal; + padding: 0px; +} + +.uci-change-legend { + padding: 5px; +} + +.uci-change-legend-label { + width: 150px; + float: left; +} + +.uci-change-legend-label > ins, +.uci-change-legend-label > del, +.uci-change-legend-label > var { + float: left; + margin-right: 4px; + width: 10px; + height: 10px; + display: block; +} + +.uci-change-legend-label var ins, +.uci-change-legend-label var del { + line-height: 6px; + border: none; +} + +.uci-change-list var, +.uci-change-list del, +.uci-change-list ins { + padding: 0.5rem; +} + +/* other fix */ +#iwsvg, +#iwsvg2, +#bwsvg { + border: 1px solid #e4eaec !important; + border-top: none !important; +} + +.ifacebox { + border: 1px solid #e4eaec; + background-color: #f9f9f9; +} + +.ifacebox strong { + color:#f7f7f7; +} + +.cbi-image-button { + margin: 5px 10px; +} + +.zonebadge { + padding: 0.2rem 0.5rem; + display: inline-block; + cursor: pointer; +} + +.zonebadge > .ifacebadge { + padding: 0.2rem 1rem; + margin: 0.3rem; + border: 1px solid #6C6C6C; +} + +.zonebadge > input[type="text"] { + padding: 0.16rem 1rem; + min-width: 10rem; + margin-top: 0.3rem; +} + +.cbi-value-field .cbi-input-checkbox, +.cbi-value-field .cbi-input-radio { + vertical-align: middle; +} + +.cbi-section-table-row > .cbi-value-field .cbi-input-select { + min-width: 7rem; +} + +.cbi-section-create > .cbi-button-add { + margin: 0.5rem; +} + +div.cbi-value var, td.cbi-value-field var { + font-style: italic; + color: #0069D6; +} + +small { + font-size: small; + white-space: normal; +} + +.cbi-button-up, +.cbi-button-down { + display: inline-block; + min-width: 0; + padding: 0.2rem 0.3rem; + font-size: 10pt; +} + +.cbi-optionals { + padding: 1rem 1rem 0 1rem; + border-top: 1px solid #CCC; +} + +#diag-rc-output > pre { + background-color: #f5f5f5; + display: block; + padding: 8.5px; + margin: 0 0 18px; + line-height: 1.5rem; + -moz-border-radius: 3px; + white-space: pre-wrap; + word-wrap: break-word; + font-size: 10pt; + color: #76838f; +} + +input[name="ping"], +input[name="traceroute"], +input[name="nslookup"] { + width: 80%; +} + +header > .container > .pull-right > * { + position: relative; + top: 0.45rem; + cursor: pointer; +} + +#xhr_poll_status > .label.success { + background-color: #14CE14; +} + +.label { + padding: 0.3rem 0.8rem; + font-size: 10pt; + font-weight: bold; + color: #ffffff !important; + text-transform: uppercase; + white-space: nowrap; + background-color: #bfbfbf; + -webkit-border-radius: 3px; + -moz-border-radius: 3px; + border-radius: 3px; + text-shadow: none; + text-decoration: none; +} + +.notice { + background-color: #5BC0DE; +} + +.showSide:before { + display:none; + color:#76838f; + content: "\e029"; + font-family: "advancedtomato" !important; + font-weight: normal !important; + font-size:14px; + top: 18px; + left:10px; + position: relative; + vertical-align: middle; + + -webkit-font-smoothing: antialiased; + -moz-osx-font-smoothing: grayscale; +} + +.darkMask { + width: 100%; + height: 100%; + position: fixed; + background-color: rgba(0, 0, 0, 0.56); + content: ""; + z-index: 99; + display: none; +} + +/* fix Main Login*/ +.node-main-login > .main > .main-left { + display: none; +} + +.node-main-login > .main > .main-right { + width: 100%; +} + +.node-main-login > .main fieldset { + padding: 5px; + margin-bottom: 1rem; + display: inline; + background: none; + border: none; + box-shadow: none; + overflow: hidden; +} + +.node-main-login > .main .cbi-value-title { + width: 7rem; +} + +.node-main-login > .main #maincontent { + + text-align: center; +} + +.node-main-login > .main .container { + display: inline-block; + padding: 2rem 4rem; + margin-top: 2rem !important; + background-color: #FFF; + box-shadow: 0 2px 2px 0 rgba(0, 0, 0, .16), 0 0 2px 0 rgba(0, 0, 0, .12); + text-align: left; +} + +.node-main-login > .main form > div:nth-last-child(1) { + float: right; +} + +.node-main-login > .main .cbi-value { + display: block; +} + +.node-main-login > .main .cbi-value > * { + display: inline-block !important; +} + +.node-main-login > .main .cbi-input-user, +.node-main-login > .main .cbi-input-password { + min-width: 15rem; +} + +.node-main-login footer { + bottom: 0; + position: absolute; + width: 100%; +} + +/* fix status overview */ + +.node-status-overview > .main fieldset:nth-child(4) td:nth-child(2) { + white-space: normal; +} + +/* fix status processes */ + +.node-status-processes > .main table tr td:nth-child(3) { + white-space: normal; +} + +.node-status-iptables > .main div > .cbi-map > form { + margin: 2rem 2rem 0 0; +} + +.cbi-map fieldset h3 { + padding:10px 0; + } + +.cbi-map fieldset ul li { + background:#f7f7f7; + margin-right:0 !important; +} +/* fix system reboot */ + +.node-system-reboot > .main > .main-right p, +.node-system-reboot > .main > .main-right h3 { +} + +/* fix Services Network Shares*/ +.node-services-samba > .main .cbi-tabcontainer:nth-child(3) .cbi-value-title { + margin-bottom: 1rem; +} + +.node-services-samba > .main .cbi-tabcontainer:nth-child(3) .cbi-value-field { + display: list-item; +} + +.node-services-samba > .main .cbi-tabcontainer:nth-child(3) .cbi-value-description { + padding-top: 1rem; + line-height:150%; +} + +/* fix System Software*/ +.node-system-packages > .main table tr td:nth-child(1) { + width: auto !important; +} + +.node-system-packages > .main table tr td:nth-last-child(1) { + white-space: normal; + font-size: small; + color: #76838f; +} + +.node-system-packages > .main .cbi-tabmenu > li > a, .tabs > li > a { + padding: 0.5rem 1rem; +} + +.node-system-packages > .main .cbi-value > pre { + background-color: #eee; + padding: 0.5rem; + overflow: auto; +} + +.cbi-tabmenu + .cbi-section { + margin-top: 0; +} + +/* fix network firewall*/ +.node-network-firewall > .main .cbi-section-table-row > .cbi-value-field .cbi-input-select { + min-width: 4rem; +} + +.node-status-iptables fieldset, +.node-system-packages fieldset, +.node-system-flashops fieldset { + margin-top: 0; +} + +.node-status-iptables .cbi-tabmenu, +.node-system-packages .cbi-tabmenu, +.node-system-flashops .cbi-tabmenu { + border: none; +} + +#cbi-firewall-redirect table *, +#cbi-network-switch_vlan table *, +#cbi-firewall-zone table *{ + font-size: small; +} + +#cbi-firewall-redirect table input[type="text"], +#cbi-network-switch_vlan table input[type="text"], +#cbi-firewall-zone table input[type="text"]{ + width: 5rem; +} + +#cbi-firewall-redirect table select, +#cbi-network-switch_vlan table select, +#cbi-firewall-zone table select{ + min-width: 3.5rem; +} + + +/* language fix */ +body.lang_pl.node-main-login .cbi-value-title { + width: 12rem; +} + + +@media screen and (max-width: 1600px) { + .main-left { + /*width: calc(0% + 15rem);*/ + } + + .main-right { + width: calc(100% - 15rem); + } + + .cbi-button { + padding: 0.3rem 0.6rem; + font-size: 1rem; + line-height: 1.5; + } + + header > .container > .pull-right > * { + top: 0.35rem; + } + + .label { + padding: 0.2rem 0.6rem; + } + + .cbi-value-title { + width: 15rem; + padding-right: 0.6rem; + } + + fieldset { + padding: 1rem; + } + + .cbi-input-textarea { + font-size: small; + } + + .node-status-iptables > .main fieldset li > a { + padding: 0.3rem 0.6rem; + } +} + +@media screen and (max-width: 1280px) { + header { + /*height: 3.5rem;*/ + } + + header > .container { + /*margin-top: 0.25rem;*/ + } + + .main { + top: 3.5rem; + height: calc(100% - 3.5rem); + } + + .main-left { + width: calc(0% + 17rem); + top: 3.5rem; + height: calc(100% - 3.5rem); + } + + .main-right { + width: calc(100% - 17rem); + } + + .cbi-tabmenu > li > a, .tabs > li > a { + padding: 0.2rem 0.5rem; + } + + .panel-title { + font-size: 1.3rem; + padding-bottom: 1rem; + } + + table { + font-size: 0.8rem !important; + width: 100% !important; + } + + .main > .main-left > .nav > li, + .main > .main-left > .nav > li a, + .main > .main-left > .nav > .slide > .menu { + font-size: 1.1rem; + } + + .main > .main-left > .nav > .slide > .slide-menu > li > a { + font-size: 0.9rem; + } +} + +@media screen and (max-width: 992px) { + + header { + height: 3.5rem; + } + + header > .container > .brand { + font-size: 18px; + height: 3.5rem; + line-height: 3.5rem; + width: calc(0% + 15rem); + /*width: initial;*/ + padding-left: 5px; + padding-right: 20px; + } + + .main-left { + width: 0; + position: fixed; + z-index: 100; + } + + .main-right { + width: 100%; + } + + .showSide { + margin: 0; + padding: 0; + display: inline-block; + position: absolute; + width: 100%; + height: 100%; + } + + .showSide:before { + content: "\e20e"; + font-size: 1.7rem; + } + + .node-main-login .showSide { + display: none !important; + } + + .cbi-value-title { + width: 9rem; + padding-right: 1rem; + } + + .node-network-diagnostics > .main .cbi-map fieldset > div * { + width: 100% !important; + } + + .node-network-diagnostics > .main .cbi-map fieldset > div input[type="text"] { + margin: 3rem 0 0 0 !important; + } + + .node-network-diagnostics > .main .cbi-map fieldset > div:nth-child(4) input[type="text"] { + margin: 0 !important; + } + + .node-network-diagnostics > .main .cbi-map fieldset > div select, + .node-network-diagnostics > .main .cbi-map fieldset > div input[type="button"] { + margin: 1rem 0 0 0; + } + + .node-network-diagnostics > .main .cbi-map fieldset > div { + width: 100% !important; + } + + #diag-rc-output > pre { + font-size: 1.2rem; + } + + .node-main-login > .main .cbi-value-title { + text-align: left; + } +} + +@media screen and (max-width: 480px) { + fieldset { + padding: 1rem; + margin: 1rem 0 0 0; + overflow-x: auto; + } + + .tabs { + margin: 0 -1rem; + } + + #maincontent > .container { + margin: 0 1rem 1.5rem 1rem; + } + + .main > .main-left > .nav > .slide > .menu { + font-size: 1.3rem; + } + + .main > .main-left > .nav > .slide > .slide-menu > li > a { + font-size: 1.1rem; + } + + .cbi-value-title { + width: 100%; + min-width: 0rem !important; + display: block; + margin-top: 1rem; + margin-bottom: 0.5rem; + text-align: left; + } + + .cbi-value-field, .cbi-value-description { + width: 100%; + } + + .cbi-value > .cbi-value-field { + display: inline-block; + } + + .cbi-tabmenu > li, .tabs > li { + padding: 0.6rem 0rem; + } + + .cbi-tabmenu > li > a, .tabs > li > a { + padding: 0.2rem 0.3rem; + font-size: 0.9rem; + } + + .cbi-page-actions > div > input { + display: none; + } + + .node-main-login > .main .container { + padding: 0.5rem 1rem 2rem 1rem; + } + + .node-main-login > .main .cbi-value { + padding: 0; + } + + .node-main-login > .main form > div:nth-last-child(1) { + margin-top: 2rem; + } + + .node-main-login > .main .cbi-value-title { + width: 100% !important; + font-size: 1.2rem; + } + + .node-main-login > .main fieldset { + margin: 0; + padding: 0.5rem; + } + + h2 { + font-size: 2rem; + } + + .tabs > li > a { + font-size: 0.9rem; + } + + select, + input { + font-size: 0.9rem; + } + + .mobile-hide { + display: none; + } + + .panel-title { + font-size: 1.4rem; + padding-bottom: 1rem; + } + + .node-system-packages > .main .cbi-value.cbi-value-last > div { + width: 100% !important; + } + + .node-system-packages > .main .cbi-value .cbi-value-field input { + width: 100%; + } + + .node-status-iptables > .main div > .cbi-map > form { + position: static !important; + margin: 0 0 2rem 0; + padding: 2rem; + border: 0; + font-weight: normal; + font-style: normal; + line-height: 1; + font-family: inherit; + min-width: inherit; + overflow-x: auto; + overflow-y: hidden; + border-radius: 0; + background-color: #FFF; + box-shadow: 0 2px 2px 0 rgba(0, 0, 0, .16), 0 0 2px 0 rgba(0, 0, 0, .12); + -webkit-overflow-scrolling: touch; + } + + .node-status-iptables > .main div > .cbi-map > form input[type="submit"]{ + width: 100% !important; + margin: 0; + } + + .node-status-iptables > .main div > .cbi-map > form input[type="submit"] + input[type="submit"]{ + margin-top: 1rem; + } +} + +@media screen and (min-width: 992px) { + .cbi-value input[type="password"], + .cbi-value input[type="text"] { + min-width: 20rem; + } + + .cbi-value-field .cbi-input-select { + min-width: 20rem; + } +} + +@media screen and (min-width: 1280px) { + .cbi-value input[type="password"], + .cbi-value input[type="text"] { + min-width: 22rem; + } + + .cbi-value-field .cbi-input-select { + min-width: 22rem; + } +} + +@media screen and (min-width: 1600px) { + .cbi-value input[type="password"], + .cbi-value input[type="text"] { + min-width: 25rem; + } + + .cbi-value-field .cbi-input-select { + min-width: 25rem; + } +} diff --git a/package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/favicon.ico b/package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/favicon.ico new file mode 100755 index 0000000000000000000000000000000000000000..b407d18455773a185059628e632e60c06d6eb858 GIT binary patch literal 2462 zcmcJR&yEaH6o*e6F|iOUG9fZOLP&@Rv5;U2&*0w!;0>@EGb?OJyuet^Lm<@5WC)%> zkg%GqrA0^izRtZ-om6$ws{JP4+;h*l=U2CGb=OQpkDs}@;CDYB?~d3X5yyd4oCfnl zQEO2_{uO*pd}Hi_UInNEw%|dE&oM3}4l_=IeJ4P#cTj-Wx)0ajZQ?p(S9uM+zd!+R z;6|ck+y`BBl4j4l?(e>39j4{~8n1hh&!;5zKDx>?*ZVTOhx+rKXD`V97nvAJBYkDKK6(zC8zOb&vd$Aubw;!E%;jrG`CeXYHE z=rxJ-*noU4#^$Cay}a-2Z#-@P|G9s^3nko27HrO^a0Qz7YtEW$Tsx_D(r^bpz%#fCM-#^8thvUu|04Hz3ZB4A*hmvOF=_Uh3l-%EGlBRqt87^TcB!2LW2|K51tM-tY}S#!-Qm>ahj$|IU(b`hS!7WmH3|G(t-zctsm zwo%LJk~7t>=v9Lu#>!e5Gf}NnqiiyV!O~(3E&xaWo8#PG*^VF8qxilw8$V<3F#iYk Cvy_7X literal 0 HcmV?d00001 diff --git a/package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/Roboto-Medium-webfont.woff b/package/lean/luci-theme-atmaterial/htdocs/luci-static/atmaterial/fonts/Roboto-Medium-webfont.woff new file mode 100644 index 0000000000000000000000000000000000000000..9024faeb8f52376392077cb7f343b072e318daa4 GIT binary patch literal 70200 zcmbSy1ym$Wmu2D5xI<%&yE`CeQ3PaXHK>1wpU zi3y8{erna9G1Xs#0{yZp_ET2jQ(FT7sPzBv`dmoT$iNt@ ztO7j~06@3&+3qtRpxc5(xnW?XXA1z((*OWqqyPZ8w<3@O-@w`N8vwwh_?h$1GT@58 zMjP9jSbb`~pLrnw01RnD@vWkXp2KHbHt5g1|1=~MOE=?B4G92frU!s%xavYw;F}uh z83F+3{GWM@pT-8I!_{T_DSm2>pE2R5k-$BCSvIwDbp6y)KD!G50Fb^1e-)>(v@!V1 zd-&XbsN+xln=AGtxRsvk=W;*(F7w-8gHQn@vDULP`qU^sxA)KII_`#lyNkB9ac~5H zfWUqBwG03dm;7K+`eJKuWD5X6KKyL=xo-i|2rt9gpC!nr0j6#FfPc&WOJusg<>-sW z<3BZ@JphP44HN(d00lDwfPfi;8Gm{v;0T}f;Q!Qol556UCXA=j!rjHg1{5?*@)`pb z6-5YI5tpvqFRoj2^ zd7Fc9D%1W?!SAZW0gT)R29I6%#SKs5Rblf;udv$WVV=8&xt%&0wCjZI^yh0z3#OZ8 zU>lIjqOGAxMH@&s9$z;(>Apszwps@?8hDu;P0R2SxnDaa<@B=0*exH0IXFEd2OZiC z1jB?ZgffOIbodqJmf670`f?zV2~j_hv7XJjSQ_DGV~&73$18jAn!#zJ#0@Mkalk)z z7FoSxaulC1qXZqQ2Wd%tnPhTE|86{)l|C1I@|8CA&Eo6HsWe{p+>k02!=mMgTFfjp zY~;koJLXr7y{HRr>LOWN$NRYNiB94&+3lo$M{Yh79uCu0zcf)&cpZP&EDI##-sb5g z!=*=)hnqfxXRSjk8F( zW8Bt|jd&YaDvItTGFg~m9cuSEO)#ME39F07F|Txb#oY|6lU?%IHY1*rz>W73(QO5BI>6^91v zrt)-pwcHQS_#Ig>nD97!e#o<1jP!6^o3$$&w8C3tIj>W&m*sp+Fpz24O;D>ZO#PjWMJIZqGQg6F#O&1Y z+UdM!<5-bV)HFgq07$K3A9d1?Su24pC}JP$XjRlIzmQuzwpgI?s(Mb%DyUpcJl0;% zS3X2PhVM}8DAJL?IEe(}uA8sJqPPd_9pxv^izvre)~nyT=g#;1CSbLiOM3EXv_}5O zMa?LaGYp4{-9=cZxtPuJlwTZkD!-U-E9qKoRbp44XjQt!z%<27J>jexa>L=QA_s>aggk5Aj#p{IzwdGvVN5;PNh2PD}> zVRq|uhwDN!B zy>SX^xDX#o))!(+?U)Yq34o9Gy?7DOsA9qCj5lPRyC$I~tR|%z_+nh17bdA_i$l5|Ttlc1Uq_MSRhNPxR9d;;uuU-)?wUHV5{T|`O1 zsoou^7r#yn80a_5-9O7|OQ!0EW(g7Q@YaE0&{1rwOFz|Dk(R)6QtIA`r5|7RzsdOC%n zlgRof&q+CP? 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