diff --git a/target/linux/generic/hack-6.1/220-arm-gc_sections.patch b/target/linux/generic/hack-6.1/220-arm-gc_sections.patch index 483118138..c39af024b 100644 --- a/target/linux/generic/hack-6.1/220-arm-gc_sections.patch +++ b/target/linux/generic/hack-6.1/220-arm-gc_sections.patch @@ -16,10 +16,10 @@ Signed-off-by: Gabor Juhos select HAVE_UID16 select HAVE_VIRT_CPU_ACCOUNTING_GEN select IRQ_FORCED_THREADING + select LOCK_MM_AND_FIND_VMA + select HAVE_LD_DEAD_CODE_DATA_ELIMINATION select MODULES_USE_ELF_REL select NEED_DMA_MAP_STATE - select OF_EARLY_FLATTREE if OF --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -91,6 +91,7 @@ endif diff --git a/target/linux/rockchip/patches-5.15/080-v5.18-mmc-core-Improve-fallback-to-speed-modes-if.patch b/target/linux/rockchip/patches-5.15/080-v5.18-mmc-core-Improve-fallback-to-speed-modes-if.patch deleted file mode 100644 index 8f629fbea..000000000 --- a/target/linux/rockchip/patches-5.15/080-v5.18-mmc-core-Improve-fallback-to-speed-modes-if.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 3b6c472822f8bdeaa3cea8290f5b4a210dca5585 Mon Sep 17 00:00:00 2001 -From: Ulf Hansson -Date: Thu, 3 Mar 2022 17:45:22 +0100 -Subject: [PATCH] mmc: core: Improve fallback to speed modes if eMMC HS200 - fails - -In the error path of mmc_select_hs200() we are trying our best to restore -the card/host into a valid state. This makes sense, especially if we -encounter a simple switch error (-EBADMSG). However, rather than then -continue with using the legacy speed mode, let's try the other better speed -modes first. Additionally, let's update the card->mmc_avail_type to avoid -us from trying a broken HS200 mode again. - -In an Amlogic S905W based TV box where the switch to HS200 mode fails for -the eMMC, this allows us to use the eMMC in DDR mode in favor of the legacy -mode, which greatly improves the performance. - -Suggested-by: Heiner Kallweit -Signed-off-by: Ulf Hansson -Tested-by: Heiner Kallweit -Link: https://lore.kernel.org/r/20220303164522.129583-1-ulf.hansson@linaro.org ---- - drivers/mmc/core/mmc.c | 16 +++++++++++++--- - 1 file changed, 13 insertions(+), 3 deletions(-) - ---- a/drivers/mmc/core/mmc.c -+++ b/drivers/mmc/core/mmc.c -@@ -1530,13 +1530,23 @@ static int mmc_select_timing(struct mmc_ - if (!mmc_can_ext_csd(card)) - goto bus_speed; - -- if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400ES) -+ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400ES) { - err = mmc_select_hs400es(card); -- else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200) -+ goto out; -+ } -+ -+ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200) { - err = mmc_select_hs200(card); -- else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS) -+ if (err == -EBADMSG) -+ card->mmc_avail_type &= ~EXT_CSD_CARD_TYPE_HS200; -+ else -+ goto out; -+ } -+ -+ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS) - err = mmc_select_hs(card); - -+out: - if (err && err != -EBADMSG) - return err; - diff --git a/target/linux/rockchip/patches-5.15/109-arm64-dts-rockchip-rk356x-Fix-PCIe-register-map.patch b/target/linux/rockchip/patches-5.15/109-arm64-dts-rockchip-rk356x-Fix-PCIe-register-map.patch deleted file mode 100644 index 3c6d01197..000000000 --- a/target/linux/rockchip/patches-5.15/109-arm64-dts-rockchip-rk356x-Fix-PCIe-register-map.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 0cdf37b755feda3aaceb749750613b5e563e7284 Mon Sep 17 00:00:00 2001 -From: Andrew Powers-Holmes -Date: Sat, 12 Nov 2022 22:41:26 +1100 -Subject: [PATCH] arm64: dts: rockchip: rk356x: Fix PCIe register and - range mappings - -The register and range mappings for the PCIe controller in Rockchip's -RK356x SoCs are incorrect. Replace them with corrected values from the -vendor BSP sources, updated to match current DT schema. - -Tested-by: Ondrej Jirman -Signed-off-by: Andrew Powers-Holmes ---- - arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++------ - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 7 ++++--- - 2 files changed, 12 insertions(+), 9 deletions(-) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -708,7 +708,7 @@ - compatible = "rockchip,rk3568-pcie"; - reg = <0x3 0xc0000000 0x0 0x00400000>, - <0x0 0xfe260000 0x0 0x00010000>, -- <0x3 0x3f000000 0x0 0x01000000>; -+ <0x0 0xf4000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - interrupts = , - , -@@ -738,8 +738,9 @@ - phys = <&combphy2 PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - power-domains = <&power RK3568_PD_PIPE>; -- ranges = <0x01000000 0x0 0x3ef00000 0x3 0x3ef00000 0x0 0x00100000 -- 0x02000000 0x0 0x00000000 0x3 0x00000000 0x0 0x3ef00000>; -+ ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, -+ <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x01e00000>, -+ <0x03000000 0x0 0x40000000 0x3 0x00000000 0x0 0x40000000>; - resets = <&cru SRST_PCIE20_POWERUP>; - reset-names = "pipe"; - #address-cells = <3>; diff --git a/target/linux/rockchip/patches-6.1/109-arm64-dts-rockchip-rk356x-Fix-PCIe-register-map.patch b/target/linux/rockchip/patches-6.1/109-arm64-dts-rockchip-rk356x-Fix-PCIe-register-map.patch deleted file mode 100644 index 2acc4efe8..000000000 --- a/target/linux/rockchip/patches-6.1/109-arm64-dts-rockchip-rk356x-Fix-PCIe-register-map.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 0cdf37b755feda3aaceb749750613b5e563e7284 Mon Sep 17 00:00:00 2001 -From: Andrew Powers-Holmes -Date: Sat, 12 Nov 2022 22:41:26 +1100 -Subject: [PATCH] arm64: dts: rockchip: rk356x: Fix PCIe register and - range mappings - -The register and range mappings for the PCIe controller in Rockchip's -RK356x SoCs are incorrect. Replace them with corrected values from the -vendor BSP sources, updated to match current DT schema. - -Tested-by: Ondrej Jirman -Signed-off-by: Andrew Powers-Holmes ---- - arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++------ - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 7 ++++--- - 2 files changed, 12 insertions(+), 9 deletions(-) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -952,7 +952,7 @@ - compatible = "rockchip,rk3568-pcie"; - reg = <0x3 0xc0000000 0x0 0x00400000>, - <0x0 0xfe260000 0x0 0x00010000>, -- <0x3 0x3f000000 0x0 0x01000000>; -+ <0x0 0xf4000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - interrupts = , - , -@@ -982,8 +982,9 @@ - phys = <&combphy2 PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - power-domains = <&power RK3568_PD_PIPE>; -- ranges = <0x01000000 0x0 0x3ef00000 0x3 0x3ef00000 0x0 0x00100000 -- 0x02000000 0x0 0x00000000 0x3 0x00000000 0x0 0x3ef00000>; -+ ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, -+ <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x01e00000>, -+ <0x03000000 0x0 0x40000000 0x3 0x00000000 0x0 0x40000000>; - resets = <&cru SRST_PCIE20_POWERUP>; - reset-names = "pipe"; - #address-cells = <3>;