298977887/lede
1
0
Fork 0
mirror of https://github.com/coolsnowwolf/lede.git synced 2025-04-16 04:13:31 +00:00
Code Issues Packages Projects Releases Wiki Activity

rockchip: fix 5.15 pwm pinctrl-names

Browse Source
This commit is contained in:
coolsnowwolf 2023-05-12 14:55:48 +08:00 committed by GitHub
parent bcc1a60fe8
commit 52223ba9d6
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 16 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
target/linux/rockchip/patches-5.15/025-v5.16-arm64-dts-rockchip-add-pwm-nodes-for-rk3568.patch
View File

@ -25,7 +25,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm0m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -36,7 +36,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm1m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -47,7 +47,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm2m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -58,7 +58,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm3_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -76,7 +76,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm4_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -87,7 +87,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm5_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -98,7 +98,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm6_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -109,7 +109,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm7_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -120,7 +120,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm8m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -131,7 +131,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm9m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -142,7 +142,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm10m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -153,7 +153,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm11m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -164,7 +164,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm12m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -175,7 +175,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm13m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -186,7 +186,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm14m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
@ -197,7 +197,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+ clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+ clock-names = "pwm", "pclk";
+ pinctrl-0 = <&pwm15m0_pins>;
+ pinctrl-names = "active";
+ pinctrl-names = "default";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };