ipq807x: fix patch for building

target/linux/ipq807x/patches-5.15/0109-PCI-qcom-fix-IPQ8074-Gen2-support.patch

@@ -1,95 +0,0 @@
-From 68de01687bdd59cb6ca4999743166e549fb91856 Mon Sep 17 00:00:00 2001
-From: Robert Marko <robimarko@gmail.com>
-Date: Mon, 20 Dec 2021 15:06:03 +0100
-Subject: [PATCH] PCI: qcom: fix IPQ8074 Gen2 support
-
-IPQ8074 has one Gen2 and one Gen3 port, currently the Gen2 port will
-cause the system to hang as its using DBI registers in the .init
-and those are only accesible after phy_power_on().
-
-So solve this by splitting the DBI read/writes to .post_init.
-
-Signed-off-by: Robert Marko <robimarko@gmail.com>
----
- drivers/pci/controller/dwc/pcie-qcom.c | 48 +++++++++++++++-----------
- 1 file changed, 28 insertions(+), 20 deletions(-)
-
---- a/drivers/pci/controller/dwc/pcie-qcom.c
-+++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -1047,9 +1047,7 @@ static int qcom_pcie_init_2_3_3(struct q
- 	struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3;
- 	struct dw_pcie *pci = pcie->pci;
- 	struct device *dev = pci->dev;
--	u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
- 	int i, ret;
--	u32 val;
- 
- 	for (i = 0; i < ARRAY_SIZE(res->rst); i++) {
- 		ret = reset_control_assert(res->rst[i]);
-@@ -1106,6 +1104,33 @@ static int qcom_pcie_init_2_3_3(struct q
- 		goto err_clk_aux;
- 	}
- 
-+	return 0;
-+
-+err_clk_aux:
-+	clk_disable_unprepare(res->ahb_clk);
-+err_clk_ahb:
-+	clk_disable_unprepare(res->axi_s_clk);
-+err_clk_axi_s:
-+	clk_disable_unprepare(res->axi_m_clk);
-+err_clk_axi_m:
-+	clk_disable_unprepare(res->iface);
-+err_clk_iface:
-+	/*
-+	 * Not checking for failure, will anyway return
-+	 * the original failure in 'ret'.
-+	 */
-+	for (i = 0; i < ARRAY_SIZE(res->rst); i++)
-+		reset_control_assert(res->rst[i]);
-+
-+	return ret;
-+}
-+
-+static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
-+{
-+	struct dw_pcie *pci = pcie->pci;
-+	u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
-+	u32 val;
-+
- 	writel(SLV_ADDR_SPACE_SZ,
- 		pcie->parf + PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE);
- 
-@@ -1133,24 +1158,6 @@ static int qcom_pcie_init_2_3_3(struct q
- 		PCI_EXP_DEVCTL2);
- 
- 	return 0;
--
--err_clk_aux:
--	clk_disable_unprepare(res->ahb_clk);
--err_clk_ahb:
--	clk_disable_unprepare(res->axi_s_clk);
--err_clk_axi_s:
--	clk_disable_unprepare(res->axi_m_clk);
--err_clk_axi_m:
--	clk_disable_unprepare(res->iface);
--err_clk_iface:
--	/*
--	 * Not checking for failure, will anyway return
--	 * the original failure in 'ret'.
--	 */
--	for (i = 0; i < ARRAY_SIZE(res->rst); i++)
--		reset_control_assert(res->rst[i]);
--
--	return ret;
- }
- 
- static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie)
-@@ -1563,6 +1570,7 @@ static const struct qcom_pcie_ops ops_2_
- static const struct qcom_pcie_ops ops_2_3_3 = {
- 	.get_resources = qcom_pcie_get_resources_2_3_3,
- 	.init = qcom_pcie_init_2_3_3,
-+	.post_init = qcom_pcie_post_init_2_3_3,
- 	.deinit = qcom_pcie_deinit_2_3_3,
- 	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
- };

target/linux/ipq807x/patches-5.15/700-ipq8074-overclock-cpu-2.2ghz.patch

@@ -1,50 +0,0 @@
---- a/arch/arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi
-@@ -32,16 +32,37 @@
- 		compatible = "operating-points-v2";
- 		opp-shared;
- 
--		opp-1017600000 {
--			opp-hz = /bits/ 64 <1017600000>;
--			opp-microvolt = <1>;
--			clock-latency-ns = <200000>;
--		};
--		opp-1382400000 {
--			opp-hz = /bits/ 64 <1382400000>;
--			opp-microvolt = <2>;
--			clock-latency-ns = <200000>;
--		};
-+                opp-1017600000 {
-+                        opp-hz = /bits/ 64 <1017600000>;
-+                        opp-microvolt = <1>;
-+                        clock-latency-ns = <100000>;
-+                };
-+                opp-1382400000 {
-+                        opp-hz = /bits/ 64 <1382400000>;
-+                        opp-microvolt = <2>;
-+                        clock-latency-ns = <100000>;
-+                };
-+                opp-1651100000 {
-+                        opp-hz = /bits/ 64 <1651100000>;
-+                        opp-microvolt = <3>;
-+                        clock-latency-ns = <100000>;
-+                };
-+                opp-1843100000 {
-+                        opp-hz = /bits/ 64 <1843100000>;
-+                        opp-microvolt = <4>;
-+                        clock-latency-ns = <100000>;
-+                };
-+                opp-1910000000 {
-+                        opp-hz = /bits/ 64 <1910000000>;
-+                        opp-microvolt = <5>;
-+                        clock-latency-ns = <100000>;
-+                };
-+                opp-2208000000 {
-+                        opp-hz = /bits/ 64 <2208000000>;
-+                        opp-microvolt = <6>;
-+                        clock-latency-ns = <100000>;
-+                };
-+
- 	};
- };
- 

target/linux/ipq807x/patches-5.15/902-5.15-arm64-provide-dma-cache-routines-with-same-API-as-32.patch

@@ -1,29 +0,0 @@
-From a2f32cec773113a9d0a80f0b20947da9bc29f3bd Mon Sep 17 00:00:00 2001
-From: Simon Casey <simon501098c@gmail.com>
-Date: Wed, 2 Feb 2022 20:17:21 +0100
-Subject: [PATCH] Update
- 902-arm64-provide-dma-cache-routines-with-same-API-as-32.patch for kernel
- 5.15
-
----
- arch/arm64/include/asm/cacheflush.h | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/arch/arm64/include/asm/cacheflush.h
-+++ b/arch/arm64/include/asm/cacheflush.h
-@@ -110,6 +110,15 @@ static inline void flush_icache_range(un
- extern void __dma_map_area(const void *, size_t, int);
- extern void __dma_unmap_area(const void *, size_t, int);
- extern void __dma_flush_area(const void *, size_t);
-+extern void __dma_inv_area(const void *start, const void *end);
-+extern void __dma_clean_area(const void *start, const void *end);
-+
-+#define dmac_flush_range(start, end) \
-+	__dma_flush_area(start, (void *)(end) - (void *)(start))
-+#define dmac_inv_range(start, end) \
-+	__dma_inv_area(start, end)
-+#define dmac_clean_range(start, end) \
-+	__dma_clean_area(start, end)
- 
- /*
-  * Copy user data from/to a page which is mapped into a different

target/linux/ipq807x/patches-5.15/903-5.15-arm64-mm-export-__dma_inv_area-and-__dma_clean_area.patch

@@ -1,56 +0,0 @@
-From 6fae2dc7f45d14b5341e9929b5c5fef60596ed4f Mon Sep 17 00:00:00 2001
-From: Simon Casey <simon501098c@gmail.com>
-Date: Wed, 2 Feb 2022 20:25:38 +0100
-Subject: [PATCH] Update
- 903-arm64-mm-export-__dma_inv_area-and-__dma_clean_area.patch for kernel 5.15
-
----
- arch/arm64/include/asm/cacheflush.h | 4 ++--
- arch/arm64/mm/cache.S               | 4 ++--
- arch/arm64/mm/flush.c               | 2 ++
- 3 files changed, 6 insertions(+), 4 deletions(-)
-
---- a/arch/arm64/include/asm/cacheflush.h
-+++ b/arch/arm64/include/asm/cacheflush.h
-@@ -110,8 +110,8 @@ static inline void flush_icache_range(un
- extern void __dma_map_area(const void *, size_t, int);
- extern void __dma_unmap_area(const void *, size_t, int);
- extern void __dma_flush_area(const void *, size_t);
--extern void __dma_inv_area(const void *start, const void *end);
--extern void __dma_clean_area(const void *start, const void *end);
-+extern void __dma_inv_area(const void *, const void *);
-+extern void __dma_clean_area(const void *, const void *);
- 
- #define dmac_flush_range(start, end) \
- 	__dma_flush_area(start, (void *)(end) - (void *)(start))
---- a/arch/arm64/mm/cache.S
-+++ b/arch/arm64/mm/cache.S
-@@ -140,7 +140,7 @@ SYM_FUNC_END(dcache_clean_pou)
-  *	- start   - kernel start address of region
-  *	- end     - kernel end address of region
-  */
--SYM_FUNC_START_LOCAL(__dma_inv_area)
-+SYM_FUNC_START(__dma_inv_area)
- SYM_FUNC_START_PI(dcache_inval_poc)
- 	/* FALLTHROUGH */
- 
-@@ -178,7 +178,7 @@ SYM_FUNC_END(__dma_inv_area)
-  *	- start   - virtual start address of region
-  *	- end     - virtual end address of region
-  */
--SYM_FUNC_START_LOCAL(__dma_clean_area)
-+SYM_FUNC_START(__dma_clean_area)
- SYM_FUNC_START_PI(dcache_clean_poc)
- 	/* FALLTHROUGH */
- 
---- a/arch/arm64/mm/flush.c
-+++ b/arch/arm64/mm/flush.c
-@@ -77,6 +77,8 @@ EXPORT_SYMBOL(flush_dcache_page);
-  * Additional functions defined in assembly.
-  */
- EXPORT_SYMBOL(caches_clean_inval_pou);
-+EXPORT_SYMBOL(__dma_inv_area);
-+EXPORT_SYMBOL(__dma_clean_area);
- 
- #ifdef CONFIG_ARCH_HAS_PMEM_API
- void arch_wb_cache_pmem(void *addr, size_t size)