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uboot-rockchip: refresh rk3399 defconfig

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Fixes: #11118
This commit is contained in:
AmadeusGhost 2023-04-17 00:09:09 +08:00
parent 64a79c9734
commit 4647696044
4 changed files with 56 additions and 23 deletions
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18
package/boot/uboot-rockchip/patches/305-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch
View File

@ -45,24 +45,33 @@
+}; +};
--- /dev/null --- /dev/null
+++ b/configs/nanopi-r4se-rk3399_defconfig +++ b/configs/nanopi-r4se-rk3399_defconfig
@@ -0,0 +1,65 @@ @@ -0,0 +1,73 @@
+CONFIG_ARM=y +CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000 +CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se" +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
+CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y +CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800 +CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y +CONFIG_TPL=y
@ -82,30 +91,29 @@
+CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y +CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y +CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y +CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y +CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y +CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_BAUDRATE=1500000 +CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y +CONFIG_SYSRESET=y
+CONFIG_USB=y +CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y +CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y +CONFIG_VIDEO=y
+CONFIG_DISPLAY=y +CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y +CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y

18
package/boot/uboot-rockchip/patches/306-rockchip-rk3399-Add-support-for-Rongpin-king3399.patch
View File

@ -1,23 +1,32 @@
--- /dev/null --- /dev/null
+++ b/configs/rongpin-king3399-rk3399_defconfig +++ b/configs/rongpin-king3399-rk3399_defconfig
@@ -0,0 +1,65 @@ @@ -0,0 +1,73 @@
+CONFIG_ARM=y +CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000 +CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se" +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
+CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y +CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800 +CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y +CONFIG_TPL=y
@ -37,30 +46,29 @@
+CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y +CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y +CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y +CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y +CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y +CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_BAUDRATE=1500000 +CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y +CONFIG_SYSRESET=y
+CONFIG_USB=y +CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y +CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y +CONFIG_VIDEO=y
+CONFIG_DISPLAY=y +CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y +CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y

21
package/boot/uboot-rockchip/patches/307-rockchip-rk3399-Add-support-for-Rocktech-MPC1903.patch
View File

@ -718,23 +718,33 @@
+}; +};
--- /dev/null --- /dev/null
+++ b/configs/rocktech-mpc1903-rk3399_defconfig +++ b/configs/rocktech-mpc1903-rk3399_defconfig
@@ -0,0 +1,63 @@ @@ -0,0 +1,72 @@
+CONFIG_ARM=y +CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000 +CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-mpc1903"
+CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y +CONFIG_TARGET_EVB_RK3399=y
+CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL_STACK=0x400000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-mpc1903.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-mpc1903.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y +CONFIG_TPL=y
@ -745,7 +755,6 @@
+# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y +CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-mpc1903"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@ -755,7 +764,6 @@
+CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y +CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y +CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y +CONFIG_PMIC_RK8XX=y
@ -764,6 +772,7 @@
+CONFIG_PWM_ROCKCHIP=y +CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000 +CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y +CONFIG_SYSRESET=y
+CONFIG_USB=y +CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_HCD=y
@ -776,7 +785,7 @@
+CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y +CONFIG_VIDEO=y
+CONFIG_DISPLAY=y +CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y +CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y

22
package/boot/uboot-rockchip/patches/308-rockchip-rk3399-Add-support-for-sharevdi-h3399pc.patch
View File

@ -858,23 +858,33 @@
+}; +};
--- /dev/null --- /dev/null
+++ b/configs/sharevdi-h3399pc-rk3399_defconfig +++ b/configs/sharevdi-h3399pc-rk3399_defconfig
@@ -0,0 +1,63 @@ @@ -0,0 +1,72 @@
+CONFIG_ARM=y +CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000 +CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-h3399pc"
+CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y +CONFIG_TARGET_EVB_RK3399=y
+CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL_STACK=0x400000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-h3399pc.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-h3399pc.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y +CONFIG_TPL=y
@ -885,7 +895,6 @@
+# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y +CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-h3399pc"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@ -895,7 +904,6 @@
+CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y +CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y +CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y +CONFIG_PMIC_RK8XX=y
@ -904,6 +912,7 @@
+CONFIG_PWM_ROCKCHIP=y +CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000 +CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y +CONFIG_SYSRESET=y
+CONFIG_USB=y +CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_HCD=y
@ -916,10 +925,9 @@
+CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y +CONFIG_VIDEO=y
+CONFIG_DISPLAY=y +CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y +CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y +CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y +CONFIG_ERRNO_STR=y