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rockchip: add support for HINLINK OPC-H69K

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This commit is contained in:
aiamadeus 2023-03-23 23:26:04 +08:00
parent abc7a549ef
commit 45898e59c5
10 changed files with 131 additions and 22 deletions
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3
package/boot/uboot-rockchip/Makefile
View File

@ -176,7 +176,8 @@ define U-Boot/opc-h68k-rk3568
NAME:=OPC-H68K Board
BUILD_DEVICES:= \
hinlink_opc-h66k \
hinlink_opc-h68k
hinlink_opc-h68k \
hinlink_opc-h69k
DEPENDS:=+PACKAGE_u-boot-opc-h68k-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.28.elf

3
target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
View File

@ -28,7 +28,8 @@ friendlyarm,nanopi-r5s)
ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "eth2"
;;
hinlink,opc-h66k|\
hinlink,opc-h68k)
hinlink,opc-h68k|\
hinlink,opc-h69k)
ucidef_set_led_netdev "wan" "WAN" "blue:net" "eth0"
;;
esac

4
target/linux/rockchip/armv8/base-files/etc/board.d/02_network
View File

@ -22,7 +22,8 @@ rockchip_setup_interfaces()
xunlong,orangepi-r1-plus-lts)
ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
;;
hinlink,opc-h68k)
hinlink,opc-h68k|\
hinlink,opc-h69k)
ucidef_set_interfaces_lan_wan 'eth1 eth2 eth3' 'eth0'
;;
fastrhino,r66s|\
@ -83,6 +84,7 @@ rockchip_setup_macs()
ezpro,mrkaio-m68s-plus|\
hinlink,opc-h66k|\
hinlink,opc-h68k|\
hinlink,opc-h69k|\
fastrhino,r66s|\
fastrhino,r68s|\
firefly,rk3568-roc-pc|\

22
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi
View File

@ -443,6 +443,10 @@
};
};
&i2c5 {
status = "okay";
};
#ifdef DTS_NO_LEGACY
&i2s0_8ch {
status = "okay";
@ -454,20 +458,6 @@
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&pcie2x1 {
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
@ -485,7 +475,7 @@
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
pcie@10 {
pcie@0,0 {
reg = <0x00100000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -503,7 +493,7 @@
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
pcie@20 {
pcie@0,0 {
reg = <0x00200000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

1
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts
View File

@ -1,4 +1,5 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2022 AmadeusGhost <amadeus@jmu.edu.cn>
/dts-v1/;

14
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts
View File

@ -57,6 +57,20 @@
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&vcc3v3_pcie {
gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
};

89
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts Normal file
View File

@ -0,0 +1,89 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2023 AmadeusGhost <amadeus@jmu.edu.cn>
/dts-v1/;
#include "rk3568-hinlink-opc.dtsi"
/ {
model = "HINLINK OPC-H69K Board";
compatible = "hinlink,opc-h69k", "rockchip,rk3568";
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
};
};
&cpu0_opp_table {
/delete-node/ opp-1608000000;
/delete-node/ opp-1800000000;
/delete-node/ opp-1992000000;
};
#ifdef DTS_NO_LEGACY
&gpu_opp_table {
/delete-node/ opp-700000000;
/delete-node/ opp-800000000;
};
#endif
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x3c>;
rx_delay = <0x2f>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
&gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus>;
snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x4f>;
rx_delay = <0x26>;
phy-handle = <&rgmii_phy1>;
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&vcc3v3_pcie {
gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
};

11
target/linux/rockchip/image/armv8.mk
View File

@ -34,7 +34,6 @@ TARGET_DEVICES += ezpro_mrkaio-m68s-plus
define Device/hinlink_common
DEVICE_VENDOR := HINLINK
SOC := rk3568
UBOOT_DEVICE_NAME := opc-h68k-rk3568
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-mt7921e kmod-r8125 kmod-usb-serial-cp210x wpad-openssl
@ -43,15 +42,25 @@ endef
define Device/hinlink_opc-h66k
$(call Device/hinlink_common)
DEVICE_MODEL := OPC-H66K
SOC := rk3568
endef
TARGET_DEVICES += hinlink_opc-h66k
define Device/hinlink_opc-h68k
$(call Device/hinlink_common)
DEVICE_MODEL := OPC-H68K
SOC := rk3568
endef
TARGET_DEVICES += hinlink_opc-h68k
define Device/hinlink_opc-h69k
$(call Device/hinlink_common)
DEVICE_MODEL := OPC-H69K
SOC := rk3568
DEVICE_PACKAGES += kmod-usb-serial-option uqmi
endef
TARGET_DEVICES += hinlink_opc-h69k
define Device/fastrhino_common
DEVICE_VENDOR := FastRhino
SOC := rk3568

3
target/linux/rockchip/patches-5.15/210-rockchip-rk356x-add-support-for-new-boards.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -59,3 +59,14 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
@@ -59,3 +59,15 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
@ -11,6 +11,7 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h66k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h69k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb

3
target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -79,3 +79,13 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so
@@ -79,3 +79,14 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
@ -11,6 +11,7 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h66k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h69k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb