ramips: switch to kernel 5.10

This commit is contained in:
coolsnowwolf 2021-07-13 00:37:50 +08:00
parent 4b4261fff3
commit 3625a73046
182 changed files with 4486 additions and 6367 deletions

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@ -28,7 +28,7 @@ config PACKAGE_TURBOACC_INCLUDE_OFFLOADING
config PACKAGE_TURBOACC_INCLUDE_SHORTCUT_FE
bool "Include Shortcut-FE"
default y if !(TARGET_ipq806x||TARGET_ipq807x)
default y if !(TARGET_ipq806x||TARGET_ipq807x||TARGET_ramips)
config PACKAGE_TURBOACC_INCLUDE_BBR_CCA
bool "Include BBR CCA"

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@ -9,9 +9,8 @@ BOARD:=ramips
BOARDNAME:=MediaTek Ralink MIPS
SUBTARGETS:=mt7620 mt7621 mt76x8 rt288x rt305x rt3883
FEATURES:=squashfs gpio
MAINTAINER:=John Crispin <john@phrozen.org>
KERNEL_PATCHVER:=5.4
KERNEL_PATCHVER:=5.10
KERNEL_TESTING_PATCHVER:=5.10
define Target/Description

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@ -72,10 +72,6 @@
status = "okay";
};
&gsw {
mediatek,port4 = "ephy";
};
&ohci {
status = "okay";
};

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@ -141,10 +141,6 @@
status = "okay";
};
&gsw {
mediatek,port4 = "ephy";
};
&i2c {
status = "okay";
};

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@ -114,10 +114,6 @@
status = "okay";
};
&gsw {
mediatek,port4 = "ephy";
};
&ohci {
status = "okay";
};

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@ -153,8 +153,7 @@
};
};
&gsw {
mediatek,port4 = "ephy";
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
};

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@ -157,10 +157,6 @@
};
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -144,10 +144,6 @@
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
pinctrl-names = "default";

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@ -144,10 +144,6 @@
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -132,10 +132,6 @@
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&gpio2 {
status = "okay";
};

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@ -171,10 +171,6 @@
mtd-mac-address = <&factory 0x4>;
};
&gsw {
ralink,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
pinctrl-names = "default";

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@ -120,10 +120,6 @@
};
};
&gsw {
mediatek,port4 = "ephy";
};
&state_default {
default {
groups = "i2c", "uartf";

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@ -185,5 +185,6 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};

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@ -173,6 +173,6 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,ephy-base-address = /bits/ 16 < 2 >;
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <2>;
};

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@ -135,7 +135,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&pcie {

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@ -178,7 +178,7 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,ephy-base = /bits/ 8 <12>;
};
&wmac {

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@ -170,7 +170,7 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,ephy-base = /bits/ 8 <12>;
};
&wmac {

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@ -155,8 +155,6 @@
mtd-mac-address = <&factory 0x4>;
mediatek,mdio-mode = <1>;
phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
phy-reset-duration = <30>;
@ -202,7 +200,7 @@
};
&gsw {
mediatek,port5 = "gmac";
mediatek,ephy-base = /bits/ 8 <8>;
};
&wmac {

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@ -144,7 +144,6 @@
mdio-bus {
status = "okay";
mediatek,mdio-mode;
ethernet-phy@0 {
reg = <0>;
@ -160,6 +159,10 @@
};
};
&gsw {
mediatek,ephy-base = /bits/ 8 <8>;
};
&state_default {
gpio {
groups = "i2c", "uartf", "nd_sd", "wled";

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@ -136,7 +136,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&wmac {

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@ -149,6 +149,11 @@
};
};
&gsw {
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -184,6 +184,10 @@
};
};
&gsw {
mediatek,ephy-base = /bits/ 8 <12>;
};
&state_default {
gpio {
groups = "i2c", "uartf";

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@ -101,3 +101,7 @@
};
};
};
&gsw {
mediatek,ephy-base = /bits/ 8 <12>;
};

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@ -115,9 +115,8 @@
mdio-bus {
status = "okay";
mediatek,mdio-mode = <1>;
phy0: ethernet-phy@0 {
ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
@ -127,27 +126,11 @@
0x94 0x00000000 /* PORT6_STATUS */
>;
};
};
};
phy1: ethernet-phy@1 {
reg = <1>;
phy-mode = "rgmii";
};
phy2: ethernet-phy@2 {
reg = <2>;
phy-mode = "rgmii";
};
phy3: ethernet-phy@3 {
reg = <3>;
phy-mode = "rgmii";
};
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
&gsw {
mediatek,ephy-base = /bits/ 8 <8>;
};
&pcie {

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@ -135,6 +135,10 @@
};
};
&gsw {
mediatek,ephy-base = /bits/ 8 <12>;
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -111,5 +111,6 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};

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@ -145,7 +145,7 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,ephy-base = /bits/ 8 <12>;
};
&wmac {

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@ -142,6 +142,10 @@
};
};
&gsw {
mediatek,ephy-base = /bits/ 8 <12>;
};
&pcie {
status = "okay";
};

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@ -103,10 +103,6 @@
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -122,10 +122,6 @@
mediatek,portmap = "llllw";
};
&gsw {
ralink,port4 = "ephy";
};
&sdhci {
status = "okay";
};

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@ -94,10 +94,6 @@
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -114,10 +114,6 @@
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -105,7 +105,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&sdhci {

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@ -100,7 +100,7 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,ephy-base = /bits/ 8 <12>;
};
&pcie {

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@ -71,10 +71,6 @@
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&sdhci {
status = "okay";
};

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@ -99,7 +99,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&pcie {

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@ -166,7 +166,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&ehci {

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@ -1,204 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7620a.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "tplink,archer-c5-v4", "ralink,mt7620a-soc";
model = "TP-Link Archer C5 v4";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &ethernet;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "green:power";
gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "green:wlan2g";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "green:wlan5g";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wan {
label = "green:wan";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
wan_orange {
label = "orange:wan";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
};
lan {
label = "green:lan";
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
};
usb {
label = "green:usb";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port1>, <&ehci_port1>;
linux,default-trigger = "usbport";
};
wps {
label = "green:wps";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
rtl8367s {
compatible = "realtek,rtl8367b";
cpu_port = <7>;
realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
mii-bus = <&mdio0>;
phy_id = <29>;
};
};
&gpio2 {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x20000 0x7a0000>;
};
partition@7c0000 {
label = "config";
reg = <0x7c0000 0x10000>;
read-only;
};
rom: partition@7d0000 {
label = "rom";
reg = <0x7d0000 0x10000>;
read-only;
};
partition@7e0000 {
label = "romfile";
reg = <0x7e0000 0x10000>;
read-only;
};
radio: partition@7f0000 {
label = "radio";
reg = <0x7f0000 0x10000>;
read-only;
};
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "i2c", "uartf", "ephy", "rgmii2";
ralink,function = "gpio";
};
};
};
&ethernet {
pinctrl-names = "default";
mtd-mac-address = <&rom 0xf100>;
pinctrl-0 = <&rgmii1_pins &mdio_pins>;
port@5 {
status = "okay";
mediatek,fixed-link = <1000 1 1 1>;
phy-mode = "rgmii";
};
mdio0: mdio-bus {
status = "okay";
reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
reset-delay-us = <10000>;
};
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&wmac {
ralink,mtd-eeprom = <&radio 0>;
mtd-mac-address = <&rom 0xf100>;
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&rom 0xf100>;
mtd-mac-address-increment = <2>;
};
};

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@ -178,10 +178,6 @@
status = "okay";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&radio 0x0>;
};

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@ -105,10 +105,6 @@
status = "okay";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&radio 0x0>;
};

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@ -61,7 +61,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&ethernet {

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@ -14,7 +14,6 @@
led-failsafe = &led_status_blue;
led-running = &led_status_blue;
led-upgrade = &led_status_blue;
serial0 = &uartlite;
};
leds {

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@ -195,7 +195,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&wmac {

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@ -1,169 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "xiaomi,miwifi-r3", "ralink,mt7620a-soc";
model = "Xiaomi Mi Router R3";
aliases {
led-status = &led_status_blue;
};
chosen {
bootargs = "console=ttyS0,115200";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_status_blue: blue {
label = "blue:status";
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
default-state = "on";
};
yellow {
label = "yellow:status";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
};
red {
label = "red:status";
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
};
};
nand {
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
compatible = "mtk,mt7620-nand";
partition@0 {
label = "Bootloader";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Config";
reg = <0x40000 0x40000>;
};
partition@80000 {
label = "Bdata";
reg = <0x80000 0x40000>;
read-only;
};
factory: partition@0xc0000 {
label = "factory";
reg = <0xc0000 0x40000>;
read-only;
};
partition@100000 {
label = "crash";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
label = "crash_syslog";
reg = <0x140000 0x40000>;
read-only;
};
partition@180000 {
label = "reserved0";
reg = <0x180000 0x80000>;
read-only;
};
partition@200000 {
label = "kernel_stock";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "kernel";
reg = <0x600000 0x400000>;
};
/* ubi partition is the result of squashing
* next consequent stock partitions:
* - rootfs0 (rootfs partition for stock kernel0),
* - rootfs1 (rootfs partition for stock failsafe kernel1),
* - overlay (used as ubi overlay in stock fw)
* resulting 117,5MiB space for packages.
*/
partition@a00000 {
label = "ubi";
reg = <0xa00000 0x7600000>;
};
};
};
&gpio1 {
status = "okay";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x28>;
mediatek,portmap = "llllw";
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
groups = "rgmii1";
function = "gpio";
};
pa {
groups = "pa";
function = "pa";
};
};
};

View File

@ -103,6 +103,7 @@
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x28>;

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@ -141,10 +141,6 @@
mediatek,portmap = "llllw";
};
&gsw {
ralink,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};

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@ -111,7 +111,3 @@
&ohci {
status = "okay";
};
&gsw {
mediatek,port4 = "ephy";
};

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@ -157,7 +157,8 @@
};
&gsw {
mediatek,port4 = "gmac";
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&wmac {

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@ -322,20 +322,6 @@
reset-names = "fe", "esw";
mediatek,switch = <&gsw>;
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
port@4 {
compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
reg = <4>;
status = "disabled";
};
};
gsw: gsw@10110000 {
@ -347,7 +333,6 @@
interrupt-parent = <&intc>;
interrupts = <17>;
mediatek,port4 = "ephy";
};
ehci: ehci@101c0000 {

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@ -133,12 +133,6 @@
status = "okay";
};
&ethernet {
port@4 {
status = "okay";
};
};
&state_default {
default {
groups = "spi refclk", "i2c", "ephy", "wled";

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@ -136,12 +136,6 @@
status = "okay";
};
&ethernet {
port@4 {
status = "okay";
};
};
&state_default {
default {
groups = "spi refclk", "i2c", "ephy", "wled";

View File

@ -37,21 +37,6 @@
compatible = "mti,cpu-interrupt-controller";
};
reserved-memory {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
ramoops@3f00000 {
compatible = "ramoops";
reg = <0x3f00000 0x80000>;
record-size = <0x10000>;
console-size = <0x10000>;
ftrace-size = <0x20000>;
};
};
chosen {
bootargs = "console=ttyS0,57600";
};
@ -453,14 +438,6 @@
clock-names = "nfi_clk";
};
crypto@1e004000 {
compatible = "mediatek,mtk-eip93";
reg = <0x1e004000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 19 IRQ_TYPE_LEVEL_HIGH>;
};
ethsys: syscon@1e000000 {
compatible = "mediatek,mt7621-ethsys",
"syscon";
@ -486,9 +463,6 @@
mediatek,ethsys = <&ethsys>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &mdio_pins>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;

View File

@ -12,7 +12,7 @@
led-failsafe = &led_power_blue;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
label-mac-device = &ethernet;
label-mac-device = &gmac0;
};
chosen {
@ -148,19 +148,38 @@
};
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
ports {
port@0 {
status = "okay";
label = "lan4";
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe006>;
};
};
};
&state_default {

View File

@ -0,0 +1,204 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "dlink,dir-853-a3", "mediatek,mt7621-soc";
model = "D-Link DIR-853 A3";
aliases {
label-mac-device = &gmac0;
led-boot = &led_power_orange;
led-failsafe = &led_power_blue;
led-running = &led_power_blue;
led-upgrade = &led_net_orange;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
wifi {
label = "wifi";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
leds {
compatible = "gpio-leds";
led_power_orange: power_orange {
label = "orange:power";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
led_power_blue: power_blue {
label = "blue:power";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
led_net_orange: net_orange {
label = "orange:net";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
net_blue {
label = "blue:net";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
usb_blue {
label = "blue:usb";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
trigger-sources = <&xhci_ehci_port1>;
linux,default-trigger = "usbport";
};
wlan2g {
label = "blue:wlan2g";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0radio";
};
wlan5g {
label = "blue:wlan5g";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1radio";
};
};
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "config";
reg = <0x80000 0x80000>;
read-only;
};
factory: partition@100000 {
label = "factory";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
label = "config2";
reg = <0x140000 0x40000>;
read-only;
};
partition@180000 {
label = "firmware";
compatible = "openwrt,uimage", "denx,uimage";
openwrt,padding = <96>;
reg = <0x180000 0x2800000>;
};
partition@2980000 {
label = "private";
reg = <0x2980000 0x2000000>;
read-only;
};
partition@4980000 {
label = "firmware2";
reg = <0x4980000 0x2800000>;
};
partition@7180000 {
label = "mydlink";
reg = <0x7180000 0x600000>;
read-only;
};
partition@7780000 {
label = "reserved";
reg = <0x7780000 0x880000>;
read-only;
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0>;
/* 5 GHz (phy1) does not take the address from calibration data,
but setting it manually here works */
mtd-mac-address = <&factory 0x4>;
};
};
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan4";
};
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe006>;
};
};
};
&state_default {
gpio {
groups = "i2c", "uart2", "uart3", "jtag", "wdt";
function = "gpio";
};
};

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@ -0,0 +1,144 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include "mt7621_dlink_flash-16m-r1.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "dlink,dir-853-r1", "mediatek,mt7621-soc";
model = "D-Link DIR-853 R1";
aliases {
label-mac-device = &wan;
led-boot = &led_power_orange;
led-failsafe = &led_power_blue;
led-running = &led_power_blue;
led-upgrade = &led_net_orange;
};
leds {
compatible = "gpio-leds";
led_power_orange: power_orange {
label = "orange:power";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
led_power_blue: power_blue {
label = "blue:power";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
led_net_orange: net_orange {
label = "orange:net";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
net_blue {
label = "blue:net";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
usb_blue {
label = "blue:usb";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
trigger-sources = <&xhci_ehci_port1>;
linux,default-trigger = "usbport";
};
wlan2g {
label = "blue:wlan2g";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0radio";
};
wlan5g {
label = "blue:wlan5g";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1radio";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
wifi {
label = "wifi";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0>;
/* 5 GHz (phy1) does not take the address from calibration data,
but setting it manually here works */
mtd-mac-address = <&factory 0x4>;
};
};
&gmac0 {
mtd-mac-address = <&factory 0x4>;
mtd-mac-address-increment = <(-1)>;
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan4";
};
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
wan: port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0x4>;
mtd-mac-address-increment = <(-2)>;
};
};
};
&state_default {
gpio {
groups = "i2c", "uart3", "uart2", "jtag", "wdt";
function = "gpio";
};
};

View File

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_dlink_dir-8xx-a1.dtsi"
#include "mt7621_dlink_dir-8xx.dtsi"
#include "mt7621_dlink_flash-16m-a1.dtsi"
/ {
compatible = "dlink,dir-867-a1", "mediatek,mt7621-soc";

View File

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_dlink_dir-8xx-a1.dtsi"
#include "mt7621_dlink_dir-8xx.dtsi"
#include "mt7621_dlink_flash-16m-a1.dtsi"
/ {
compatible = "dlink,dir-878-a1", "mediatek,mt7621-soc";

View File

@ -1,9 +1,25 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_dlink_dir-8xx-a1.dtsi"
#include "mt7621_dlink_dir-882-x1.dtsi"
#include "mt7621_dlink_dir-8xx.dtsi"
#include "mt7621_dlink_flash-16m-a1.dtsi"
/ {
compatible = "dlink,dir-882-a1", "mediatek,mt7621-soc";
model = "D-Link DIR-882 A1";
};
&leds {
usb2 {
label = "green:usb2";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port2>;
linux,default-trigger = "usbport";
};
usb3 {
label = "green:usb3";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
trigger-sources = <&xhci_ehci_port1>;
linux,default-trigger = "usbport";
};
};

View File

@ -1,9 +1,25 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_dlink_dir-8xx-r1.dtsi"
#include "mt7621_dlink_dir-882-x1.dtsi"
#include "mt7621_dlink_dir-8xx.dtsi"
#include "mt7621_dlink_flash-16m-r1.dtsi"
/ {
compatible = "dlink,dir-882-r1", "mediatek,mt7621-soc";
model = "D-Link DIR-882 R1";
};
&leds {
usb2 {
label = "green:usb2";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port2>;
linux,default-trigger = "usbport";
};
usb3 {
label = "green:usb3";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
trigger-sources = <&xhci_ehci_port1>;
linux,default-trigger = "usbport";
};
};

View File

@ -1,17 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
&leds {
usb2 {
label = "green:usb2";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port2>;
linux,default-trigger = "usbport";
};
usb3 {
label = "green:usb3";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
trigger-sources = <&xhci_ehci_port1>;
linux,default-trigger = "usbport";
};
};

View File

@ -1,7 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_dlink_dir-8xx-x1.dtsi"
&spi0 {
status = "okay";
@ -29,14 +27,15 @@
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
reg = <0x40000 0x20000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
partition@60000 {
compatible = "openwrt,uimage", "denx,uimage";
openwrt,padding = <96>;
label = "firmware";
reg = <0x50000 0xfb0000>;
reg = <0x60000 0xfa0000>;
};
};
};

View File

@ -1,7 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_dlink_dir-8xx-x1.dtsi"
&spi0 {
status = "okay";

View File

@ -0,0 +1,199 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "elecom,wrc-2533ghbk-i", "mediatek,mt7621-soc";
model = "ELECOM WRC-2533GHBK-I";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
wps {
label = "red:wps";
gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
};
led_power: power {
label = "white:power";
gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
};
wlan2g {
label = "white:wlan2g";
gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0radio";
};
wlan5g {
label = "white:wlan5g";
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1radio";
};
};
keys {
compatible = "gpio-keys";
auto {
label = "auto";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
reset {
label = "reset";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x9a0000>;
};
partition@9f0000 {
label = "TM_1";
reg = <0x9f0000 0x200000>;
read-only;
};
partition@bf0000 {
label = "TM_2";
reg = <0xbf0000 0x200000>;
read-only;
};
partition@df0000 {
label = "manufacture";
reg = <0xdf0000 0x180000>;
read-only;
};
partition@f70000 {
label = "backup";
reg = <0xf70000 0x10000>;
read-only;
};
partition@f80000 {
label = "storage";
reg = <0xf80000 0x80000>;
read-only;
};
};
};
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "wan";
};
port@1 {
status = "okay";
label = "lan4";
};
port@2 {
status = "okay";
label = "lan3";
};
port@3 {
status = "okay";
label = "lan2";
};
port@4 {
status = "okay";
label = "lan1";
};
};
};
&state_default {
gpio {
groups = "uart2", "uart3", "jtag", "wdt";
function = "gpio";
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&xhci {
status = "disabled";
};

View File

@ -9,10 +9,6 @@
compatible = "gehua,ghl-r-001", "mediatek,mt7621-soc";
model = "GeHua GHL-R-001";
aliases {
label-mac-device = &ethernet;
};
leds {
compatible = "gpio-leds";
@ -110,19 +106,34 @@
};
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
ports {
port@0 {
status = "okay";
label = "lan1";
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
port@1 {
status = "okay";
label = "lan2";
};
port@2 {
status = "okay";
label = "lan3";
};
port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe000>;
mtd-mac-address-increment = <1>;
};
};
};
&state_default {

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7621.dtsi"
@ -16,10 +15,6 @@
led-upgrade = &led_internet;
};
chosen {
bootargs = "console=ttyS0,57600";
};
leds {
compatible = "gpio-leds";
@ -93,19 +88,38 @@
};
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
ports {
port@0 {
status = "okay";
label = "lan4";
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
wan: port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe006>;
};
};
};
&state_default {

View File

@ -1,162 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "jdcloud,re-sp-01b", "mediatek,mt7621-soc";
model = "JDCloud RE-SP-01B";
aliases {
led-boot = &led_red;
led-failsafe = &led_red;
led-running = &led_green;
led-upgrade = &led_blue;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_red: red {
label = "red:sys";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
panic-indicator;
};
led_green: green {
label = "green:sys";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_blue: blue {
label = "blue:sys";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};
};
&sdhci {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
config: partition@30000 {
label = "config";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x1ab0000>;
};
partition@1b00000 {
label = "mini";
reg = <0x1b00000 0x400000>;
read-only;
};
partition@1f00000 {
label = "oem";
reg = <0x1f00000 0x100000>;
read-only;
};
};
};
};
&gmac0 {
mtd-mac-address-ascii = <&config 0x4429>;
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "wan";
};
port@1 {
status = "okay";
label = "lan1";
};
port@2 {
status = "okay";
label = "lan2";
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mtd-mac-address-ascii = <&config 0x4429>;
mediatek,mtd-eeprom = <&factory 0x0>;
};
};
&pcie1 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mtd-mac-address-ascii = <&config 0x4429>;
mtd-mac-address-increment = <0x80>;
mtd-mac-address-increment-byte = <3>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&state_default {
gpio {
groups = "uart2", "uart3", "wdt";
function = "gpio";
};
};

View File

@ -0,0 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_linksys_ea7xxx.dtsi"
/ {
compatible = "linksys,ea7300-v2", "mediatek,mt7621-soc";
model = "Linksys EA7300 v2";
};

View File

@ -0,0 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_linksys_ea7xxx.dtsi"
/ {
compatible = "linksys,ea8100-v2", "mediatek,mt7621-soc";
model = "Linksys EA8100 v2";
};

View File

@ -1,46 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_dlink_dir-8xx-a1.dtsi"
/ {
compatible = "motorola,motorola-mr2600", "mediatek,mt7621-soc";
model = "Motorola MR2600";
aliases {
led-boot = &led_power_orange;
led-failsafe = &led_power_green;
led-running = &led_power_green;
led-upgrade = &led_net_orange;
};
leds {
compatible = "gpio-leds";
led_power_orange: power_orange {
label = "orange:power";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
led_net_orange: net_orange {
label = "orange:net";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
net_green {
label = "green:net";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
usb {
label = "green:usb";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
linux,default-trigger = "usbport";
};
};
};

View File

@ -9,7 +9,7 @@
compatible = "mediatek,mt7621-soc";
aliases {
label-mac-device = &ethernet;
label-mac-device = &gmac0;
led-boot = &led_power_white;
led-failsafe = &led_power_orange;
led-running = &led_power_white;
@ -161,19 +161,39 @@
};
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
&gmac0 {
mtd-mac-address = <&factory 0x4>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
ports {
port@0 {
status = "okay";
label = "lan4";
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0x4>;
mtd-mac-address-increment = <2>;
};
};
};
&i2c {

View File

@ -151,23 +151,12 @@
read-only;
};
partition@1 {
partition@100000 {
label = "SC PART_MAP";
reg = <0x100000 0x100000>;
read-only;
};
partition@100000 {
label = "BootEnv";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x80000>;
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x400000>;
@ -178,11 +167,6 @@
reg = <0x600000 0x2800000>;
};
partition@2 {
label = "firmware";
reg = <0x200000 0x2c00000>;
};
partition@2e00000 {
label = "reserved0";
reg = <0x2e00000 0x1800000>;
@ -195,12 +179,6 @@
read-only;
};
partition@3 {
label = "epprom";
reg = <0x4600000 0x80000>;
read-only;
};
partition@4800000 {
label = "reserved1";
reg = <0x4800000 0x3800000>;

View File

@ -102,19 +102,38 @@
};
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
ports {
port@0 {
status = "okay";
label = "lan1";
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
port@1 {
status = "okay";
label = "lan2";
};
port@2 {
status = "okay";
label = "lan3";
};
port@3 {
status = "okay";
label = "lan4";
};
port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe006>;
};
};
};
&state_default {

View File

@ -0,0 +1,196 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tenbay,t-mb5eu-v01", "mediatek,mt7621-soc";
model = "Tenbay T-MB5EU-V01";
aliases {
led-boot = &led_green;
led-failsafe = &led_red;
led-running = &led_blue;
led-upgrade = &led_red;
label-mac-device = &wan_port;
};
chosen {
bootargs = "console=ttyS0,115200";
bootargs-override = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
led_blue: blue {
label = "blue";
gpios = <&aw9523 0 GPIO_ACTIVE_LOW>;
};
led_red: red {
label = "red";
gpios = <&aw9523 1 GPIO_ACTIVE_LOW>;
};
led_green: green {
label = "green";
gpios = <&aw9523 11 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <50>;
pinctrl-names = "default";
pinctrl-0 = <&button_pins>;
reset {
label = "reset";
gpios = <&aw9523 9 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&aw9523 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
i2c-gpio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
gpios = <&gpio 7 GPIO_ACTIVE_HIGH &gpio 8 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <10>;
aw9523: gpio-expander@5b {
compatible = "awinic,aw9523-pinctrl";
reg = <0x5b>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&aw9523 0 0 16>;
reset-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
button_pins: button-pins {
pins = "gpio8", "gpio9";
function = "gpio";
bias-pull-up;
drive-open-drain;
input-enable;
};
led_pins: led-pins {
pins = "gpio0", "gpio1", "gpio11";
function = "gpio";
input-disable;
output-low;
};
};
};
};
&pcie {
status = "okay";
};
&pcie1 {
wifi@0,0 {
reg = <0x0 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0>;
};
};
&gmac0 {
mtd-mac-address = <&factory 0x4>;
};
&switch0 {
ports {
wan_port: port@0 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0x28>;
};
port@1 {
status = "okay";
label = "lan1";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan3";
};
port@4 {
status = "okay";
label = "lan4";
};
};
};
&state_default {
gpio {
groups = "uart3";
function = "gpio";
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "product";
reg = <0x40000 0x10000>;
read-only;
};
factory: partition@50000 {
label = "factory";
reg = <0x50000 0x40000>;
read-only;
};
partition@90000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x90000 0xf70000>;
};
};
};
};

View File

@ -1,4 +1,4 @@
/dts-v1/;
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
@ -6,15 +6,29 @@
#include <dt-bindings/input/input.h>
/ {
compatible = "zbtlink,zbt-wg108", "mediatek,mt7621-soc";
model = "Zbtlink ZBT-WG108";
compatible = "totolink,x5000r", "mediatek,mt7621-soc";
model = "TOTOLINK X5000R";
aliases {
label-mac-device = &wifi1;
led-boot = &led_sys;
led-failsafe = &led_sys;
led-running = &led_sys;
led-upgrade = &led_sys;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = "serial0:115200n8";
bootargs = "console=ttyS0,115200n8";
};
leds {
compatible = "gpio-leds";
led_sys: sys {
label = "blue:sys";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
};
};
keys {
@ -22,26 +36,21 @@
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
linux,code = <KEY_RESTART>;
};
};
};
&state_default {
gpio {
groups = "wdt";
function = "gpio";
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
spi-max-frequency = <50000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
@ -75,6 +84,18 @@
};
};
&pcie {
status = "okay";
};
&pcie1 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
@ -109,26 +130,9 @@
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi0: mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
&state_default {
gpio {
groups = "i2c", "wdt";
function = "gpio";
};
};
&pcie1 {
wifi1: mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&sdhci {
status = "okay";
};

View File

@ -0,0 +1,84 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_ubnt_unifi.dtsi"
/ {
compatible = "ubnt,unifi-6-lite", "mediatek,mt7621-soc";
model = "Ubiquiti UniFi 6 Lite";
chosen {
bootargs-override = "console=ttyS0,115200";
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x60000>;
read-only;
};
partition@60000 {
label = "u-boot-env";
reg = <0x60000 0x10000>;
read-only;
};
factory: partition@70000 {
label = "factory";
reg = <0x70000 0x40000>;
read-only;
};
eeprom: partition@b0000 {
label = "eeprom";
reg = <0xb0000 0x10000>;
read-only;
};
partition@c0000 {
label = "bs";
reg = <0xc0000 0x10000>;
};
partition@d0000 {
label = "cfg";
reg = <0xd0000 0x100000>;
read-only;
};
partition@1d0000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x1d0000 0xf10000>;
};
partition@10e0000 {
label = "kernel1";
reg = <0x10e0000 0xf10000>;
};
};
};
};
&wlan_2g {
mtd-mac-address = <&eeprom 0x0>;
};
&wlan_5g {
mediatek,mtd-eeprom = <&factory 0x20000>;
mtd-mac-address = <&eeprom 0x6>;
ieee80211-freq-limit = <5000000 6000000>;
};

View File

@ -1,49 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7621_ubnt_unifi.dtsi"
/ {
compatible = "ubnt,unifi-nanohd", "mediatek,mt7621-soc";
model = "Ubiquiti UniFi nanoHD";
aliases {
led-boot = &led_white;
led-failsafe = &led_white;
led-running = &led_blue;
led-upgrade = &led_blue;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led_blue: dome_blue {
label = "blue:dome";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
};
led_white: dome_white {
label = "white:dome";
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&spi0 {
@ -53,7 +14,6 @@
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
broken-flash-reset;
partitions {
compatible = "fixed-partitions";
@ -110,40 +70,6 @@
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
reg = <0x0 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie1 {
wifi@0,0 {
reg = <0x0 0 0 0 0>;
&wlan_5g {
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};
&gmac0 {
mtd-mac-address = <&eeprom 0x0>;
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan";
};
};
};
&state_default {
gpio {
groups = "i2c", "uart2";
function = "gpio";
};
};

View File

@ -0,0 +1,81 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_white;
led-failsafe = &led_white;
led-running = &led_blue;
led-upgrade = &led_blue;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led_blue: dome_blue {
label = "blue:dome";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
};
led_white: dome_white {
label = "white:dome";
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wlan_2g: wifi@0,0 {
reg = <0x0 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0>;
};
};
&pcie1 {
wlan_5g: wifi@0,0 {
reg = <0x0 0 0 0 0>;
};
};
&gmac0 {
mtd-mac-address = <&eeprom 0x0>;
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan";
};
};
};
&state_default {
gpio {
groups = "i2c", "uart2";
function = "gpio";
};
};

View File

@ -6,7 +6,7 @@
#include <dt-bindings/input/input.h>
/ {
compatible = "xiaomi,mir3p", "mediatek,mt7621-soc";
compatible = "xiaomi,mi-router-3-pro", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 3 Pro";
aliases {

View File

@ -0,0 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_xiaomi_mi-router-4a-3g-v2.dtsi"
/ {
compatible = "xiaomi,mi-router-3g-v2", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 3G v2";
};

View File

@ -0,0 +1,117 @@
#include "mt7621_xiaomi_nand_128m.dtsi"
/ {
compatible = "xiaomi,mi-router-3g", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 3G";
aliases {
led-boot = &led_status_yellow;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_yellow;
label-mac-device = &gmac0;
};
leds {
compatible = "gpio-leds";
led_status_red: status_red {
label = "red:status";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
led_status_blue: status_blue {
label = "blue:status";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_status_yellow: status_yellow {
label = "yellow:status";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
};
wan_amber {
label = "amber:wan";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "dsa-0.0:01:1Gbps";
};
lan1_amber {
label = "amber:lan1";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "dsa-0.0:03:1Gbps";
};
lan2_amber {
label = "amber:lan2";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "dsa-0.0:02:1Gbps";
};
};
reg_usb_vbus: regulator {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&xhci {
vbus-supply = <&reg_usb_vbus>;
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac0 {
mtd-mac-address = <&factory 0xe006>;
};
&switch0 {
ports {
port@1 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe000>;
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
};
};
&state_default {
gpio {
groups = "jtag", "uart2", "uart3", "wdt";
function = "gpio";
};
};

View File

@ -0,0 +1,96 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_xiaomi_nand_128m.dtsi"
/ {
compatible = "xiaomi,mi-router-4", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 4";
aliases {
led-boot = &led_status_yellow;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_yellow;
label-mac-device = &gmac0;
};
leds {
compatible = "gpio-leds";
led_status_red: status_red {
label = "red:status";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
led_status_blue: status_blue {
label = "blue:status";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_status_yellow: status_yellow {
label = "yellow:status";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
};
};
};
&keys {
minet {
label = "minet";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
&switch0 {
ports {
port@1 {
status = "okay";
label = "lan2";
};
port@2 {
status = "okay";
label = "lan1";
};
port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe006>;
};
};
};
&state_default {
gpio {
groups = "jtag", "uart2", "uart3", "wdt";
function = "gpio";
};
};

View File

@ -6,9 +6,6 @@
#include <dt-bindings/input/input.h>
/ {
compatible = "xiaomi,mir3g-v2", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 3G v2";
aliases {
led-boot = &led_status_yellow;
led-failsafe = &led_status_yellow;
@ -52,7 +49,8 @@
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
spi-max-frequency = <50000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
@ -147,6 +145,7 @@
status = "okay";
label = "lan1";
};
wan: port@4 {
status = "okay";
label = "wan";

View File

@ -0,0 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_xiaomi_mi-router-4a-3g-v2.dtsi"
/ {
compatible = "xiaomi,mi-router-4a-gigabit", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 4A Gigabit Edition";
};

View File

@ -11,7 +11,7 @@
led-failsafe = &led_status_yellow;
led-running = &led_status_blue;
led-upgrade = &led_status_blue;
label-mac-device = &ethernet;
label-mac-device = &gmac0;
};
leds {

View File

@ -8,7 +8,7 @@
/ {
compatible = "xiaomi,mi-router-cr6606", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router CR6606";
model = "Xiaomi Mi Router CR6606/CR6608/CR6609";
aliases {
led-boot = &led_sys_yellow;

View File

@ -1,220 +0,0 @@
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "xiaomi,mir3g", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 3G";
aliases {
led-boot = &led_status_yellow;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_yellow;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
leds {
compatible = "gpio-leds";
led_status_red: status_red {
label = "red:status";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
led_status_blue: status_blue {
label = "blue:status";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_status_yellow: status_yellow {
label = "yellow:status";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
};
wan_amber {
label = "amber:wan";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "dsa-0.0:01:1Gbps";
};
lan1_amber {
label = "amber:lan1";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "dsa-0.0:03:1Gbps";
};
lan2_amber {
label = "amber:lan2";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "dsa-0.0:02:1Gbps";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
reg_usb_vbus: regulator {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&xhci {
vbus-supply = <&reg_usb_vbus>;
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "Config";
reg = <0x80000 0x40000>;
};
partition@c0000 {
label = "Bdata";
reg = <0xc0000 0x40000>;
read-only;
};
factory: partition@100000 {
label = "factory";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
label = "crash";
reg = <0x140000 0x40000>;
};
partition@180000 {
label = "crash_syslog";
reg = <0x180000 0x40000>;
};
partition@1c0000 {
label = "reserved0";
reg = <0x1c0000 0x40000>;
read-only;
};
/* uboot expects to find kernels at 0x200000 & 0x600000
* referred to as system 1 & system 2 respectively.
* a kernel is considered suitable for handing control over
* if its linux magic number exists & uImage CRC are correct.
* If either of those conditions fail, a matching sys'n'_fail flag
* is set in uboot env & a restart performed in the hope that the
* alternate kernel is okay.
* if neither kernel checksums ok and both are marked failed, system 2
* is booted anyway.
*
* Note uboot's tftp flash install writes the transferred
* image to both kernel partitions.
*/
partition@200000 {
label = "kernel_stock";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "kernel";
reg = <0x600000 0x400000>;
};
/* ubi partition is the result of squashing
* next consecutive stock partitions:
* - rootfs0 (rootfs partition for stock kernel0),
* - rootfs1 (rootfs partition for stock failsafe kernel1),
* - overlay (used as ubi overlay in stock fw)
* resulting 117,5MiB space for packages.
*/
partition@a00000 {
label = "ubi";
reg = <0xa00000 0x7580000>;
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac0 {
mtd-mac-address = <&factory 0xe006>;
};
&switch0 {
ports {
port@1 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe000>;
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
};
};
&state_default {
gpio {
groups = "jtag", "uart2", "uart3", "wdt";
function = "gpio";
};
};

View File

@ -6,41 +6,11 @@
#include <dt-bindings/input/input.h>
/ {
compatible = "xiaomi,mir4", "mediatek,mt7621-soc";
model = "Xiaomi Mi Router 4";
aliases {
led-boot = &led_status_yellow;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_yellow;
label-mac-device = &ethernet;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
leds {
compatible = "gpio-leds";
led_status_red: status_red {
label = "red:status";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
led_status_blue: status_blue {
label = "blue:status";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_status_yellow: status_yellow {
label = "yellow:status";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
};
};
keys {
keys: keys {
compatible = "gpio-keys";
reset {
@ -48,12 +18,6 @@
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
minet {
label = "minet";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
@ -68,6 +32,7 @@
partition@0 {
label = "Bootloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
@ -78,11 +43,13 @@
partition@c0000 {
label = "Bdata";
reg = <0xc0000 0x40000>;
read-only;
};
factory: partition@100000 {
label = "factory";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
@ -98,6 +65,7 @@
partition@1c0000 {
label = "reserved0";
reg = <0x1c0000 0x40000>;
read-only;
};
/* uboot expects to find kernels at 0x200000 & 0x600000
@ -114,6 +82,7 @@
* image to both kernel partitions.
*/
/* We keep stock xiaomi firmware (kernel0) here */
partition@200000 {
label = "kernel_stock";
reg = <0x200000 0x400000>;
@ -138,47 +107,3 @@
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
mtd-mac-address = <&factory 0xe006>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
};
&state_default {
gpio {
groups = "jtag", "uart2", "uart3", "wdt";
function = "gpio";
};
};

View File

@ -11,7 +11,7 @@
led-failsafe = &led_status_amber;
led-running = &led_status_white;
led-upgrade = &led_status_white;
label-mac-device = &ethernet;
label-mac-device = &gmac0;
};
leds {

View File

@ -1,89 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
bootargs = "console=ttyS0,115200n8";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x0 0x80000>;
};
partition@80000 {
label = "Config";
reg = <0x80000 0x40000>;
};
partition@c0000 {
label = "Bdata";
reg = <0xc0000 0x40000>;
read-only;
};
factory: partition@100000 {
label = "factory";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
label = "crash";
reg = <0x140000 0x40000>;
};
partition@180000 {
label = "crash_syslog";
reg = <0x180000 0x40000>;
};
partition@1c0000 {
label = "reserved0";
reg = <0x1c0000 0x40000>;
read-only;
};
/* We keep stock xiaomi firmware (kernel0) here */
partition@200000 {
label = "kernel_stock";
reg = <0x200000 0x400000>;
};
partition@600000 {
label = "kernel";
reg = <0x600000 0x400000>;
};
partition@a00000 {
label = "ubi";
reg = <0xa00000 0x7580000>;
};
};
};
#include "mt7621_xiaomi_nand_128m.dtsi"
&pcie {
status = "okay";
@ -107,19 +24,33 @@
};
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
mtd-mac-address = <&factory 0xe006>;
&gmac0 {
mtd-mac-address = <&factory 0xe000>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
ports {
port@0 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0xe006>;
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
port@2 {
status = "okay";
label = "lan1";
};
port@3 {
status = "okay";
label = "lan2";
};
port@4 {
status = "okay";
label = "lan3";
};
};
};
&state_default {

View File

@ -12,7 +12,7 @@
led-failsafe = &led_sys;
led-running = &led_sys;
led-upgrade = &led_sys;
label-mac-device = &ethernet;
label-mac-device = &gmac0;
};
leds {
@ -84,19 +84,39 @@
status = "okay";
};
&ethernet {
compatible = "mediatek,ralink-mt7621-eth";
mediatek,switch = <&gsw>;
&gmac0 {
mtd-mac-address = <&factory 0x4>;
};
&switch0 {
/delete-property/ compatible;
phy-mode = "rgmii";
};
ports {
port@0 {
status = "okay";
label = "lan1";
};
&gsw {
compatible = "mediatek,ralink-mt7621-gsw";
port@1 {
status = "okay";
label = "lan2";
};
port@2 {
status = "okay";
label = "lan3";
};
port@3 {
status = "okay";
label = "lan4";
};
port@4 {
status = "okay";
label = "wan";
mtd-mac-address = <&factory 0x4>;
mtd-mac-address-increment = <1>;
};
};
};
&state_default {

View File

@ -429,8 +429,8 @@
interrupt-parent = <&cpuintc>;
interrupts = <5>;
resets = <&rstctrl 21 &rstctrl 23>;
reset-names = "fe", "esw";
resets = <&rstctrl 21>;
reset-names = "fe";
mediatek,switch = <&esw>;
};
@ -439,8 +439,8 @@
compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>;
resets = <&rstctrl 23>;
reset-names = "esw";
resets = <&rstctrl 23 &rstctrl 24>;
reset-names = "esw", "ephy";
interrupt-parent = <&intc>;
interrupts = <17>;

View File

@ -47,6 +47,7 @@
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
broken-flash-reset;
partitions {
compatible = "fixed-partitions";

View File

@ -25,30 +25,11 @@
};
};
&pinctrl {
sdxc_router_pins: sdxc_router_mode {
gpio {
groups = "i2s", "sdmode", "uart1", "gpio";
function= "gpio";
};
esdmode {
groups = "esdmode";
function= "sdxc";
};
};
state_default: pinctrl0 {
&state_default {
gpio {
groups = "i2c", "refclk", "wdt", "wled_an";
function= "gpio";
function = "gpio";
};
};
};
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_router_pins>;
};
&ehci {

View File

@ -44,25 +44,11 @@
};
};
&pinctrl {
sdxc_router_pins: sdxc_router_mode {
gpio {
groups = "i2s", "sdmode", "uart1", "gpio";
function = "gpio";
};
esdmode {
groups = "esdmode";
function = "sdxc";
};
};
state_default: pinctrl0 {
&state_default {
gpio {
groups = "i2c", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
function = "gpio";
};
};
};
&pcie {
@ -76,8 +62,3 @@
ieee80211-freq-limit = <5000000 6000000>;
};
};
&sdhci {
status = "okay";
pinctrl-0 = <&sdxc_router_pins>;
};

View File

@ -0,0 +1,142 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Minew G1-C";
compatible = "minew,g1-c", "mediatek,mt7628an-soc";
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x8000000>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_system: system {
label = "red:system";
gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
ws2812 {
gpio-export,name = "ws2812";
gpio-export,output = <1>;
gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
};
nrf_power {
gpio-export,name = "nrf_power";
gpio-export,output = <1>;
gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
};
};
};
&state_default {
gpio {
groups = "gpio";
function = "gpio";
};
p0led_an {
groups = "p0led_an";
function = "gpio";
};
uart1 {
groups = "uart1";
function = "gpio";
};
wdt {
groups = "wdt";
function = "gpio";
};
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&ethernet {
mtd-mac-address = <&factory 0x28>;
};
&esw {
mediatek,portmap = <0x3e>;
};
&wmac {
status = "okay";
};
&sdhci {
status = "okay";
mediatek,cd-high;
};

View File

@ -16,10 +16,6 @@
led-upgrade = &led_globe;
};
chosen {
bootargs = "console=ttyS0,57600";
};
leds {
compatible = "gpio-leds";

View File

@ -0,0 +1,91 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an_tplink_8m.dtsi"
/ {
compatible = "tplink,tl-mr6400-v5", "mediatek,mt7628an-soc";
model = "TP-Link TL-MR6400 v5";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
leds {
compatible = "gpio-leds";
wlan {
label = "white:wlan";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
lan {
label = "white:lan";
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
};
led_power: power {
label = "white:power";
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
};
wan {
label = "white:wan";
gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
};
signal1 {
label = "white:signal1";
gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
};
signal2 {
label = "white:signal2";
gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
};
signal3 {
label = "white:signal3";
gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
};
};
};
&state_default {
gpio {
groups = "i2c", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "uart1", "wdt";
function = "gpio";
};
};
&esw {
mediatek,portmap = <0x37>;
mediatek,portdisable = <0x30>;
};
&wmac {
mtd-mac-address = <&factory 0x1f100>;
};
&ethernet {
mtd-mac-address = <&factory 0x1f100>;
};

View File

@ -6,29 +6,26 @@
#include <dt-bindings/input/input.h>
/ {
compatible = "xiaomi,mir4a-100m", "mediatek,mt7628an-soc";
model = "Xiaomi Mi Router 4A (100M Edition)";
aliases {
led-boot = &led_power_yellow;
led-failsafe = &led_power_yellow;
led-running = &led_power_blue;
led-upgrade = &led_power_yellow;
};
chosen {
bootargs = "console=ttyS0,115200";
};
aliases {
led-boot = &power_yellow;
led-failsafe = &power_yellow;
led-running = &power_blue;
led-upgrade = &power_yellow;
};
leds {
compatible = "gpio-leds";
power_blue: power_blue {
led_power_blue: power_blue {
label = "blue:power";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
power_yellow: power_yellow {
led_power_yellow: power_yellow {
label = "yellow:power";
gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};
@ -48,12 +45,12 @@
&spi0 {
status = "okay";
flash@0 {
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@ -88,31 +85,8 @@
read-only;
};
partition@60000 {
label = "overlay";
reg = <0x60000 0x100000>;
read-only;
/* additional partitions in DTS */
};
partition@160000 {
label = "firmware";
reg = <0x160000 0xea0000>;
compatible = "denx,uimage";
};
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
@ -123,16 +97,6 @@
};
};
&ethernet {
mtd-mac-address = <&factory 0x4>;
mtd-mac-address-increment = <(-1)>;
};
&esw {
mediatek,portmap = <0x3e>;
mediatek,portdisable = <0x2a>;
};
&wmac {
status = "okay";
};

View File

@ -0,0 +1,45 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an_xiaomi_mi-router-4.dtsi"
/ {
compatible = "xiaomi,mi-router-4a-100m", "mediatek,mt7628an-soc";
model = "Xiaomi Mi Router 4A (100M Edition)";
};
&partitions {
partition@60000 {
label = "overlay";
reg = <0x60000 0x100000>;
read-only;
};
partition@160000 {
label = "firmware";
reg = <0x160000 0xea0000>;
compatible = "denx,uimage";
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&ethernet {
mtd-mac-address = <&factory 0x4>;
mtd-mac-address-increment = <(-1)>;
};
&esw {
mediatek,portmap = <0x3e>;
mediatek,portdisable = <0x2a>;
};

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