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ip60xx/ipq807x: Drop upstream patch
Already fixed in upstream kernel (5.10.191/5.15.127)
This commit is contained in:
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@ -1,56 +0,0 @@
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From e362372fa8d56c669516dc83abe75cd057d94171 Mon Sep 17 00:00:00 2001
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From: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
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Date: Wed, 18 Mar 2020 17:08:11 +0530
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Subject: [PATCH 133/137] clk: ipq: support for resetting multiple bits
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Current reset structure takes only one reset bit and
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calculates the bitmask in its reset operation. Some of the
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reset registers contains multiple bits in which each bit
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will be associated with subsystem reset inside the block. To
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reset properly the complete block, all the subsystem reset
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should be triggered at same time i.e the register write
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should go in one AHB write.
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This patch adds the support for giving the complete bitmask
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in reset structure and reset operation will use this bitmask
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for all reset operations.
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Change-Id: Ief49f8746624a0fc1e067d815725ae7c254c2c6f
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Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
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(cherry picked from commit ef555fc1cffa6e823a9d929711cacae0821b35ec)
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Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
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---
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drivers/clk/qcom/reset.c | 4 ++--
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drivers/clk/qcom/reset.h | 1 +
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2 files changed, 3 insertions(+), 2 deletions(-)
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--- a/drivers/clk/qcom/reset.c
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+++ b/drivers/clk/qcom/reset.c
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@@ -28,7 +28,7 @@ qcom_reset_assert(struct reset_controlle
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rst = to_qcom_reset_controller(rcdev);
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map = &rst->reset_map[id];
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- mask = BIT(map->bit);
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+ mask = map->bitmask ? map->bitmask : BIT(map->bit);
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return regmap_update_bits(rst->regmap, map->reg, mask, mask);
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}
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@@ -42,7 +42,7 @@ qcom_reset_deassert(struct reset_control
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rst = to_qcom_reset_controller(rcdev);
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map = &rst->reset_map[id];
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- mask = BIT(map->bit);
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+ mask = map->bitmask ? map->bitmask : BIT(map->bit);
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return regmap_update_bits(rst->regmap, map->reg, mask, 0);
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}
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--- a/drivers/clk/qcom/reset.h
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+++ b/drivers/clk/qcom/reset.h
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@@ -11,6 +11,7 @@
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struct qcom_reset_map {
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unsigned int reg;
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u8 bit;
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+ u32 bitmask;
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};
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struct regmap;
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@ -1,56 +0,0 @@
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From 027818c51e6732f8a2f7986515264cebaf9a1704 Mon Sep 17 00:00:00 2001
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From: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
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Date: Wed, 18 Mar 2020 17:08:11 +0530
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Subject: [PATCH 1/8] clk: ipq: support for resetting multiple bits
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Current reset structure takes only one reset bit and
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calculates the bitmask in its reset operation. Some of the
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reset registers contains multiple bits in which each bit
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will be associated with subsystem reset inside the block. To
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reset properly the complete block, all the subsystem reset
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should be triggered at same time i.e the register write
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should go in one AHB write.
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This patch adds the support for giving the complete bitmask
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in reset structure and reset operation will use this bitmask
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for all reset operations.
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Change-Id: Ief49f8746624a0fc1e067d815725ae7c254c2c6f
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Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
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(cherry picked from commit ef555fc1cffa6e823a9d929711cacae0821b35ec)
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Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
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---
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drivers/clk/qcom/reset.c | 4 ++--
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drivers/clk/qcom/reset.h | 1 +
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2 files changed, 3 insertions(+), 2 deletions(-)
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--- a/drivers/clk/qcom/reset.c
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+++ b/drivers/clk/qcom/reset.c
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@@ -28,7 +28,7 @@ qcom_reset_assert(struct reset_controlle
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rst = to_qcom_reset_controller(rcdev);
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map = &rst->reset_map[id];
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- mask = BIT(map->bit);
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+ mask = map->bitmask ? map->bitmask : BIT(map->bit);
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return regmap_update_bits(rst->regmap, map->reg, mask, mask);
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}
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@@ -42,7 +42,7 @@ qcom_reset_deassert(struct reset_control
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rst = to_qcom_reset_controller(rcdev);
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map = &rst->reset_map[id];
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- mask = BIT(map->bit);
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+ mask = map->bitmask ? map->bitmask : BIT(map->bit);
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return regmap_update_bits(rst->regmap, map->reg, mask, 0);
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}
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--- a/drivers/clk/qcom/reset.h
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+++ b/drivers/clk/qcom/reset.h
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@@ -11,6 +11,7 @@
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struct qcom_reset_map {
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unsigned int reg;
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u8 bit;
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+ u32 bitmask;
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};
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struct regmap;
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@ -1,56 +0,0 @@
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From 2fc17ac5ce7a8c6c7564c4b91e06f2cde62d58be Mon Sep 17 00:00:00 2001
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From: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
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Date: Wed, 18 Mar 2020 17:08:11 +0530
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Subject: [PATCH] clk: ipq: support for resetting multiple bits
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Current reset structure takes only one reset bit and
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calculates the bitmask in its reset operation. Some of the
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reset registers contains multiple bits in which each bit
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will be associated with subsystem reset inside the block. To
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reset properly the complete block, all the subsystem reset
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should be triggered at same time i.e the register write
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should go in one AHB write.
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This patch adds the support for giving the complete bitmask
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in reset structure and reset operation will use this bitmask
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for all reset operations.
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Change-Id: Ief49f8746624a0fc1e067d815725ae7c254c2c6f
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Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
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(cherry picked from commit ef555fc1cffa6e823a9d929711cacae0821b35ec)
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Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
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---
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drivers/clk/qcom/reset.c | 4 ++--
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drivers/clk/qcom/reset.h | 1 +
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2 files changed, 3 insertions(+), 2 deletions(-)
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--- a/drivers/clk/qcom/reset.c
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+++ b/drivers/clk/qcom/reset.c
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@@ -28,7 +28,7 @@ qcom_reset_assert(struct reset_controlle
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rst = to_qcom_reset_controller(rcdev);
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map = &rst->reset_map[id];
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- mask = BIT(map->bit);
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+ mask = map->bitmask ? map->bitmask : BIT(map->bit);
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return regmap_update_bits(rst->regmap, map->reg, mask, mask);
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}
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@@ -42,7 +42,7 @@ qcom_reset_deassert(struct reset_control
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rst = to_qcom_reset_controller(rcdev);
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map = &rst->reset_map[id];
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- mask = BIT(map->bit);
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+ mask = map->bitmask ? map->bitmask : BIT(map->bit);
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return regmap_update_bits(rst->regmap, map->reg, mask, 0);
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}
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--- a/drivers/clk/qcom/reset.h
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+++ b/drivers/clk/qcom/reset.h
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@@ -11,6 +11,7 @@
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struct qcom_reset_map {
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unsigned int reg;
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u8 bit;
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+ u32 bitmask;
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};
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struct regmap;
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