From 2f12c63bd0a6c978daf6654ffa0bbb7d6edb55ea Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 18 Apr 2025 22:41:00 +0800 Subject: [PATCH] rockchip: adds the otp node to the rk3576 soc for 6.12 --- .../312-01-v6.13-rk3576-otp-support.patch | 23 +++++++ .../312-02-v6.13-rk3576-otp-support.patch | 52 ++++++++++++++++ .../312-03-v6.13-rk3576-otp-support.patch | 49 +++++++++++++++ .../312-04-v6.13-rk3576-otp-support.patch | 40 +++++++++++++ .../312-05-v6.13-rk3576-otp-support.patch | 60 +++++++++++++++++++ 5 files changed, 224 insertions(+) create mode 100644 target/linux/rockchip/patches-6.12/312-01-v6.13-rk3576-otp-support.patch create mode 100644 target/linux/rockchip/patches-6.12/312-02-v6.13-rk3576-otp-support.patch create mode 100644 target/linux/rockchip/patches-6.12/312-03-v6.13-rk3576-otp-support.patch create mode 100644 target/linux/rockchip/patches-6.12/312-04-v6.13-rk3576-otp-support.patch create mode 100644 target/linux/rockchip/patches-6.12/312-05-v6.13-rk3576-otp-support.patch diff --git a/target/linux/rockchip/patches-6.12/312-01-v6.13-rk3576-otp-support.patch b/target/linux/rockchip/patches-6.12/312-01-v6.13-rk3576-otp-support.patch new file mode 100644 index 000000000..b6c56cd61 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/312-01-v6.13-rk3576-otp-support.patch @@ -0,0 +1,23 @@ +The phy clock of the OTP block is also present, but was not defined +so far. Though its clk-id already existed, so just define its location. + +Signed-off-by: Heiko Stuebner +--- + drivers/clk/rockchip/clk-rk3576.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/clk/rockchip/clk-rk3576.c b/drivers/clk/rockchip/clk-rk3576.c +index 595e010341f7..029939a98416 100644 +--- a/drivers/clk/rockchip/clk-rk3576.c ++++ b/drivers/clk/rockchip/clk-rk3576.c +@@ -541,6 +541,8 @@ static struct rockchip_clk_branch rk3576_clk_branches[] __initdata = { + RK3576_CLKGATE_CON(5), 14, GFLAGS), + GATE(CLK_OTPC_AUTO_RD_G, "clk_otpc_auto_rd_g", "xin24m", 0, + RK3576_CLKGATE_CON(5), 15, GFLAGS), ++ GATE(CLK_OTP_PHY_G, "clk_otp_phy_g", "xin24m", 0, ++ RK3588_CLKGATE_CON(6), 0, GFLAGS), + COMPOSITE(CLK_MIPI_CAMERAOUT_M0, "clk_mipi_cameraout_m0", mux_24m_spll_gpll_cpll_p, 0, + RK3576_CLKSEL_CON(38), 8, 2, MFLAGS, 0, 8, DFLAGS, + RK3576_CLKGATE_CON(6), 3, GFLAGS), +-- +2.45.2 diff --git a/target/linux/rockchip/patches-6.12/312-02-v6.13-rk3576-otp-support.patch b/target/linux/rockchip/patches-6.12/312-02-v6.13-rk3576-otp-support.patch new file mode 100644 index 000000000..8a9d65b86 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/312-02-v6.13-rk3576-otp-support.patch @@ -0,0 +1,52 @@ +The RK3588 has an offset into the OTP area where the readable area begins +and automatically adds this to the start address. +Other variants are very much similar to rk3588, just with a different +offset, so move that value into variant-data. + +To match the size in bytes, store this value also in bytes and not in +number of blocks. + +Signed-off-by: Heiko Stuebner +--- + drivers/nvmem/rockchip-otp.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c +index ebc3f0b24166..3edfbfc2d722 100644 +--- a/drivers/nvmem/rockchip-otp.c ++++ b/drivers/nvmem/rockchip-otp.c +@@ -59,7 +59,6 @@ + #define RK3588_OTPC_AUTO_EN 0x08 + #define RK3588_OTPC_INT_ST 0x84 + #define RK3588_OTPC_DOUT0 0x20 +-#define RK3588_NO_SECURE_OFFSET 0x300 + #define RK3588_NBYTES 4 + #define RK3588_BURST_NUM 1 + #define RK3588_BURST_SHIFT 8 +@@ -69,6 +68,7 @@ + + struct rockchip_data { + int size; ++ int read_offset; + const char * const *clks; + int num_clks; + nvmem_reg_read_t reg_read; +@@ -196,7 +196,7 @@ static int rk3588_otp_read(void *context, unsigned int offset, + addr_start = round_down(offset, RK3588_NBYTES) / RK3588_NBYTES; + addr_end = round_up(offset + bytes, RK3588_NBYTES) / RK3588_NBYTES; + addr_len = addr_end - addr_start; +- addr_start += RK3588_NO_SECURE_OFFSET; ++ addr_start += otp->data->read_offset / RK3588_NBYTES; + + buf = kzalloc(array_size(addr_len, RK3588_NBYTES), GFP_KERNEL); + if (!buf) +@@ -280,6 +280,7 @@ static const char * const rk3588_otp_clocks[] = { + + static const struct rockchip_data rk3588_data = { + .size = 0x400, ++ .read_offset = 0xc00, + .clks = rk3588_otp_clocks, + .num_clks = ARRAY_SIZE(rk3588_otp_clocks), + .reg_read = rk3588_otp_read, +-- +2.45.2 diff --git a/target/linux/rockchip/patches-6.12/312-03-v6.13-rk3576-otp-support.patch b/target/linux/rockchip/patches-6.12/312-03-v6.13-rk3576-otp-support.patch new file mode 100644 index 000000000..5a4ba6771 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/312-03-v6.13-rk3576-otp-support.patch @@ -0,0 +1,49 @@ +Document the OTP memory found on Rockchip RK3576 SoC. + +The RK3576 uses the same set of clocks as the px30/rk3308 +but has one reset more, so adapt the binding to handle this +variant as well. + +Signed-off-by: Heiko Stuebner +--- + .../bindings/nvmem/rockchip,otp.yaml | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml +index a44d44b32809..dae7543a0179 100644 +--- a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml ++++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml +@@ -14,6 +14,7 @@ properties: + enum: + - rockchip,px30-otp + - rockchip,rk3308-otp ++ - rockchip,rk3576-otp + - rockchip,rk3588-otp + + reg: +@@ -68,6 +69,23 @@ allOf: + items: + - const: phy + ++ - if: ++ properties: ++ compatible: ++ contains: ++ enum: ++ - rockchip,rk3576-otp ++ then: ++ properties: ++ clocks: ++ minItems: 3 ++ resets: ++ minItems: 2 ++ reset-names: ++ items: ++ - const: otp ++ - const: apb ++ + - if: + properties: + compatible: +-- +2.45.2 diff --git a/target/linux/rockchip/patches-6.12/312-04-v6.13-rk3576-otp-support.patch b/target/linux/rockchip/patches-6.12/312-04-v6.13-rk3576-otp-support.patch new file mode 100644 index 000000000..e4c971aaa --- /dev/null +++ b/target/linux/rockchip/patches-6.12/312-04-v6.13-rk3576-otp-support.patch @@ -0,0 +1,40 @@ +The variant works very similar to the rk3588, just with a different +read-offset and size. + +Signed-off-by: Heiko Stuebner +--- + drivers/nvmem/rockchip-otp.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c +index 3edfbfc2d722..d88f12c53242 100644 +--- a/drivers/nvmem/rockchip-otp.c ++++ b/drivers/nvmem/rockchip-otp.c +@@ -274,6 +274,14 @@ static const struct rockchip_data px30_data = { + .reg_read = px30_otp_read, + }; + ++static const struct rockchip_data rk3576_data = { ++ .size = 0x100, ++ .read_offset = 0x700, ++ .clks = px30_otp_clocks, ++ .num_clks = ARRAY_SIZE(px30_otp_clocks), ++ .reg_read = rk3588_otp_read, ++}; ++ + static const char * const rk3588_otp_clocks[] = { + "otp", "apb_pclk", "phy", "arb", + }; +@@ -295,6 +303,10 @@ static const struct of_device_id rockchip_otp_match[] = { + .compatible = "rockchip,rk3308-otp", + .data = &px30_data, + }, ++ { ++ .compatible = "rockchip,rk3576-otp", ++ .data = &rk3576_data, ++ }, + { + .compatible = "rockchip,rk3588-otp", + .data = &rk3588_data, +-- +2.45.2 diff --git a/target/linux/rockchip/patches-6.12/312-05-v6.13-rk3576-otp-support.patch b/target/linux/rockchip/patches-6.12/312-05-v6.13-rk3576-otp-support.patch new file mode 100644 index 000000000..a8d08ba18 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/312-05-v6.13-rk3576-otp-support.patch @@ -0,0 +1,60 @@ +This adds the otp node to the rk3576 soc devicetree including the +individual fields we know about. + +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3576.dtsi | 39 ++++++++++++++++++++++++ + 1 file changed, 39 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi +index 436232ffe4d1..c70c9dcfad82 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi +@@ -1149,6 +1149,45 @@ sdhci: mmc@2a330000 { + status = "disabled"; + }; + ++ otp: otp@2a580000 { ++ compatible = "rockchip,rk3576-otp"; ++ reg = <0x0 0x2a580000 0x0 0x400>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, ++ <&cru CLK_OTP_PHY_G>; ++ clock-names = "otp", "apb_pclk", "phy"; ++ resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>; ++ reset-names = "otp", "apb"; ++ ++ /* Data cells */ ++ cpu_code: cpu-code@2 { ++ reg = <0x02 0x2>; ++ }; ++ otp_cpu_version: cpu-version@5 { ++ reg = <0x05 0x1>; ++ bits = <3 3>; ++ }; ++ otp_id: id@a { ++ reg = <0x0a 0x10>; ++ }; ++ cpub_leakage: cpub-leakage@1e { ++ reg = <0x1e 0x1>; ++ }; ++ cpul_leakage: cpul-leakage@1f { ++ reg = <0x1f 0x1>; ++ }; ++ npu_leakage: npu-leakage@20 { ++ reg = <0x20 0x1>; ++ }; ++ gpu_leakage: gpu-leakage@21 { ++ reg = <0x21 0x1>; ++ }; ++ log_leakage: log-leakage@22 { ++ reg = <0x22 0x1>; ++ }; ++ }; ++ + gic: interrupt-controller@2a701000 { + compatible = "arm,gic-400"; + reg = <0x0 0x2a701000 0 0x10000>, +-- +2.45.2