From 246241f742400c3be9c84b38a5c9835a65c2a059 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Tue, 24 Apr 2018 20:00:37 +0800 Subject: [PATCH] update ath10k firmware --- package/firmware/ath10k-firmware/Makefile | 6 +- .../600-custom-fix-txpower-and-dfs.patch | 41 +++ .../arch/arm/boot/dts/qcom-ipq4019-a62.dts | 240 ++++++++++++++++++ ...msm-fix-gpio-hog-related-boot-issues.patch | 103 ++++++++ 4 files changed, 387 insertions(+), 3 deletions(-) create mode 100644 package/firmware/wireless-regdb/patches/600-custom-fix-txpower-and-dfs.patch create mode 100644 target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a62.dts create mode 100644 target/linux/ipq40xx/patches-4.14/105-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch diff --git a/package/firmware/ath10k-firmware/Makefile b/package/firmware/ath10k-firmware/Makefile index 79af6b7f1..6b81e1a00 100644 --- a/package/firmware/ath10k-firmware/Makefile +++ b/package/firmware/ath10k-firmware/Makefile @@ -8,9 +8,9 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ath10k-firmware -PKG_SOURCE_DATE:=2018-02-09 -PKG_SOURCE_VERSION:=8f4bafdd400d21a65966004d0ce6e0686ef4d9bc -PKG_MIRROR_HASH:=4f4f0678b9d07c0282f18c69bd63a5e2a2ae015b9ce7298cedb88a60be87ed3a +PKG_SOURCE_DATE:=2018-04-19 +PKG_SOURCE_VERSION:=71e50312b54cc972657a7b08c470088447cb9676 +PKG_MIRROR_HASH:=726e7bce9917532e3b39ced6a17ca2d4c39fdf4c9bec4a3f8f2ea3e5defa6a54 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git diff --git a/package/firmware/wireless-regdb/patches/600-custom-fix-txpower-and-dfs.patch b/package/firmware/wireless-regdb/patches/600-custom-fix-txpower-and-dfs.patch new file mode 100644 index 000000000..7974389e5 --- /dev/null +++ b/package/firmware/wireless-regdb/patches/600-custom-fix-txpower-and-dfs.patch @@ -0,0 +1,41 @@ +From 7eb6313910023f1be6015a8cd9e1b380ae01af64 Mon Sep 17 00:00:00 2001 +From: Chen Minqiang +Date: Sun, 7 Jan 2018 14:38:36 +0800 +Subject: [PATCH] custom fix txpower and dfs + +--- + db.txt | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/db.txt b/db.txt +index 75dc0a3..24989ad 100644 +--- a/db.txt ++++ b/db.txt +@@ -277,9 +277,9 @@ country CL: DFS-JP + (5735 - 5835 @ 80), (20) + + country CN: DFS-FCC +- (2402 - 2482 @ 40), (20) +- (5170 - 5250 @ 80), (23), AUTO-BW +- (5250 - 5330 @ 80), (23), DFS, AUTO-BW ++ (2402 - 2482 @ 40), (30) ++ (5170 - 5250 @ 80), (30), AUTO-BW ++ (5250 - 5330 @ 80), (30), AUTO-BW + (5735 - 5835 @ 80), (30) + # 60 GHz band channels 1,4: 28dBm, channels 2,3: 44dBm + # ref: http://www.miit.gov.cn/n11293472/n11505629/n11506593/n11960250/n11960606/n11960700/n12330791.files/n12330790.pdf +@@ -1238,9 +1238,9 @@ country UG: DFS-FCC + country US: DFS-FCC + (2402 - 2472 @ 40), (30) + # 5.15 ~ 5.25 GHz: 30 dBm for master mode, 23 dBm for clients +- (5170 - 5250 @ 80), (23), AUTO-BW +- (5250 - 5330 @ 80), (23), DFS, AUTO-BW +- (5490 - 5730 @ 160), (23), DFS ++ (5170 - 5250 @ 80), (30), AUTO-BW ++ (5250 - 5330 @ 80), (30), AUTO-BW ++ (5490 - 5730 @ 160), (30) + (5735 - 5835 @ 80), (30) + # 60g band + # reference: http://cfr.regstoday.com/47cfr15.aspx#47_CFR_15p255 +-- +2.7.4 diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a62.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a62.dts new file mode 100644 index 000000000..dd6d6bd77 --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a62.dts @@ -0,0 +1,240 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2017-2018, Sven Eckelmann + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include "qcom-ipq4019-bus.dtsi" +#include +#include +#include + +/ { + model = "OpenMesh A62"; + compatible = "openmesh,a62", "qcom,ipq4019"; + + soc { + mdio@90000 { + status = "okay"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + serial@78af000 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + ess-switch@c000000 { + switch_lan_bmp = <0x10>; + switch_wan_bmp = <0x20>; + + status = "okay"; + }; + + edma@c080000 { + status = "okay"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + gpio-leds { + compatible = "gpio-leds"; + + red { + label = "a62:red:status"; + gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + power: green { + label = "a62:green:status"; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + }; + + blue { + label = "a62:blue:status"; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + /* hw_margin_ms is actually 300s but driver limits it to 60s */ + hw_margin_ms = <60000>; + always-running; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + enable-usb-power { + gpio-hog; + gpios = <58 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "enable USB2 power"; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&spi_0 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + /* partitions are passed via bootloader */ + }; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac0 { + qcom,phy_mdio_addr = <3>; + qcom,poll_required = <1>; + qcom,forced_speed = <1000>; + qcom,forced_duplex = <1>; + vlan_tag = <1 0x10>; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + + ath10k@0,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0 0 0 0 0>; + device_type = "pci"; + qcom,ath10k-calibration-variant = "OM-A62"; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A62"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A62"; +}; diff --git a/target/linux/ipq40xx/patches-4.14/105-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch b/target/linux/ipq40xx/patches-4.14/105-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch new file mode 100644 index 000000000..57ed940fd --- /dev/null +++ b/target/linux/ipq40xx/patches-4.14/105-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch @@ -0,0 +1,103 @@ +From: Christian Lamparter +Date: Thu, 12 Apr 2018 21:01:38 +0200 +Subject: [PATCH] pinctrl: msm: fix gpio-hog related boot issues + +Sven Eckelmann reported an issue with the current IPQ4019 pinctrl. +Setting up any gpio-hog in the device-tree for his device would +"kill the bootup completely": + +| [ 0.477838] msm_serial 78af000.serial: could not find pctldev for node /soc/pinctrl@1000000/serial_pinmux, deferring probe +| [ 0.499828] spi_qup 78b5000.spi: could not find pctldev for node /soc/pinctrl@1000000/spi_0_pinmux, deferring probe +| [ 1.298883] requesting hog GPIO enable USB2 power (chip 1000000.pinctrl, offset 58) failed, -517 +| [ 1.299609] gpiochip_add_data: GPIOs 0..99 (1000000.pinctrl) failed to register +| [ 1.308589] ipq4019-pinctrl 1000000.pinctrl: Failed register gpiochip +| [ 1.316586] msm_serial 78af000.serial: could not find pctldev for node /soc/pinctrl@1000000/serial_pinmux, deferring probe +| [ 1.322415] spi_qup 78b5000.spi: could not find pctldev for node /soc/pinctrl@1000000/spi_0_pinmux, deferri + +This was also verified on a RT-AC58U (IPQ4018) which would +no longer boot, if a gpio-hog was specified. (Tried forcing +the USB LED PIN (GPIO0) to high.). + +The problem is that Pinctrl+GPIO registration is currently +peformed in the following order in pinctrl-msm.c: + 1. pinctrl_register() + 2. gpiochip_add() + 3. gpiochip_add_pin_range() + +The actual error code -517 == -EPROBE_DEFER is coming from +pinctrl_get_device_gpio_range(), which is called through: + gpiochip_add + of_gpiochip_add + of_gpiochip_scan_gpios + gpiod_hog + gpiochip_request_own_desc + __gpiod_request + chip->request + gpiochip_generic_request + pinctrl_gpio_request + pinctrl_get_device_gpio_range + +pinctrl_get_device_gpio_range() is unable to find any valid +pin ranges, since nothing has been added to the pinctrldev_list yet. +so the range can't be found, and the operation fails with -EPROBE_DEFER. + +This patch fixes the issue by adding the "gpio-ranges" property to +the pinctrl device node of all upstream Qcom SoC. The pin ranges are +then added by the gpio core. + +In order to remain compatible with older, existing DTs (and ACPI) +a check for the "gpio-ranges" property has been added to +msm_gpio_init(). This prevents the driver of adding the same entry +to the pinctrldev_list twice. + +Reported-by: Sven Eckelmann +Signed-off-by: Christian Lamparter + +Origin: other, https://patchwork.kernel.org/patch/10339127/ +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 1 + + drivers/pinctrl/qcom/pinctrl-msm.c | 23 ++++++++++++++++++----- + 14 files changed, 32 insertions(+), 6 deletions(-) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -166,6 +166,7 @@ + compatible = "qcom,ipq4019-pinctrl"; + reg = <0x01000000 0x300000>; + gpio-controller; ++ gpio-ranges = <&tlmm 0 0 100>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; +--- a/drivers/pinctrl/qcom/pinctrl-msm.c ++++ b/drivers/pinctrl/qcom/pinctrl-msm.c +@@ -831,11 +831,24 @@ static int msm_gpio_init(struct msm_pinc + return ret; + } + +- ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio); +- if (ret) { +- dev_err(pctrl->dev, "Failed to add pin range\n"); +- gpiochip_remove(&pctrl->chip); +- return ret; ++ /* ++ * For DeviceTree-supported systems, the gpio core checks the ++ * pinctrl's device node for the "gpio-ranges" property. ++ * If it is present, it takes care of adding the pin ranges ++ * for the driver. In this case the driver can skip ahead. ++ * ++ * In order to remain compatible with older, existing DeviceTree ++ * files which don't set the "gpio-ranges" property or systems that ++ * utilize ACPI the driver has to call gpiochip_add_pin_range(). ++ */ ++ if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) { ++ ret = gpiochip_add_pin_range(&pctrl->chip, ++ dev_name(pctrl->dev), 0, 0, chip->ngpio); ++ if (ret) { ++ dev_err(pctrl->dev, "Failed to add pin range\n"); ++ gpiochip_remove(&pctrl->chip); ++ return ret; ++ } + } + + ret = gpiochip_irqchip_add(chip,