qualcommax: ipq50xx: add support for GL.iNet GL-B3000

target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-gl-b3000.dts

@@ -5,118 +5,120 @@
 #include "ipq5018-ess.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+
 / {
-	model = "GL.iNET B3000";
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "GL.iNet GL-B3000";
 	compatible = "glinet,gl-b3000", "qcom,ipq5018";
-	
 	interrupt-parent = <&intc>;
-	
+
 	aliases {
-		serial0 = &blsp1_uart1;
-		
-		ethernet0 = &dp1;
 		ethernet1 = &dp2;
 		label-mac-device = &dp2;
-		
+		serial0 = &blsp1_uart1;
-		led-boot = &led_system_blue;
+		led-boot = &led_blue;
-		led-failsafe = &led_status_white;
+		led-failsafe = &led_blue;
-		led-running = &led_status_white;
+		led-running = &led_blue;
-		led-upgrade = &led_system_blue;
+		led-upgrade = &led_white;
 	};
+
 	chosen {
-		bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
 		stdout-path = "serial0:115200n8";
+		bootargs-append = " root=/dev/ubiblock0_1";
 	};
-	
+
+	keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		pinctrl-0 = <&leds_pins>;
 		pinctrl-names = "default";
-		led_system_blue: led_system_blue {
+
-			label = "led_system_blue";
+		led_blue: status_blue {
-			gpio = <&tlmm 24 0>;
+			label = "blue:status";
-			default-state = "on";
+			gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
 		};
-		
+
-		led_status_white: led_status_white {
+		led_white: status_white {
-			label = "led_status_white";
+			label = "white:status";
-			gpio = <&tlmm 23 0>;
+			gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
-			default-state = "off";
-		};
-	};
-	
-	button {
-		compatible = "gpio-keys";
-		pinctrl-0 = <&button_pins>;
-		pinctrl-names = "default";
-		button_reset {
-			label = "reset";
-			gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
-			linux,input-type = <EV_KEY>;//<1>;
-			linux,code = <KEY_RESTART>;
-			debounce-interval = <60>;
 		};
 	};
+
 	reserved-memory {
 		tz_appps@4a400000 {
 			no-map;
 			reg = <0x0 0x4a400000 0x0 0x400000>;
 		};
-		
+
 		q6_mem_regions: q6_mem_regions@4b000000 {
 			no-map;
 			reg = <0x0 0x4b000000 0x0 0x3000000>;
 		};
 	};
 };
-&switch {
+
-	status = "okay";
+&sleep_clk {
-	switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
+	clock-frequency = <32000>;
-	qcom,port_phyinfo {
-		// MAC0 -> GE Phy -> QCA8337 Phy2
-		port@0 {
-			port_id = <1>;
-			mdiobus = <&mdio0>;
-			phy_address = <7>;
-			phy_dac = <0x10 0x10>;
-			// status = "disabled";
-		};
-		// MAC1 ---SGMII---> QCA8337 SerDes
-		port@1 {
-			port_id = <2>;
-			forced-speed = <1000>;
-			forced-duplex = <1>;
-		};
-	};
 };
-// MAC0 -> GE Phy
+
+&xo_board_clk {
+	clock-frequency = <24000000>;
+};
+
+&blsp1_uart1 {
+	pinctrl-0 = <&blsp0_uart_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&crypto {
+	status = "okay";
+};
+
+&cryptobam {
+	status = "okay";
+};
+
 &dp1 {
 	status = "okay";
 };
-// MAC1 ---SGMII---> QCA8337 SerDes
+
 &dp2 {
-	status = "okay";
 	phy-mode = "sgmii";
-	nvmem-cells = <&macaddr_dp2>;
+	status = "okay";
-	nvmem-cell-names = "mac-address";
+
-	
 	fixed-link {
 		speed = <1000>;
 		full-duplex;
 	};
 };
-&mdio0 {
+
-	status = "okay";
-};
-// IPQ5018 GE Phy -> QCA8337 Phy1
 &ge_phy {
 	status = "okay";
 };
-&mdio1 {
+
+&mdio0 {
 	status = "okay";
+};
+
+&mdio1 {
 	pinctrl-0 = <&mdio1_pins>;
 	pinctrl-names = "default";
 	reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
 	// QCA8337 Phy0 -> WAN
 	qca8337_0: ethernet-phy@0 {
 		reg = <0>;
@@ -140,12 +142,13 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		switch_cpu_bmp = <0x40>;  /* cpu port bitmap */
-		switch_lan_bmp = <0x0c>; /* lan port bitmap */
+		switch_lan_bmp = <0x0c>;  /* lan port bitmap */
 		switch_wan_bmp = <0x02>;  /* wan port bitmap */
+
 		ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
-			
+
 			switch0cpu: port@0 {
 				reg = <0>;
 				label = "cpu";
@@ -165,7 +168,7 @@
 				port_id = <1>;
 				phy_address = <0>;
 			};
-			
+
 			// QCA8337 Phy1 -> LAN1
 			port@2 {
 				reg = <2>;
@@ -181,201 +184,13 @@
 				phy-handle = <&qca8337_2>;
 				port_id = <3>;
 				phy_address = <2>;
-				
 			};
 		};
 	};
 };
-&sleep_clk {
-	clock-frequency = <32000>;
-};
-&xo_board_clk {
-	clock-frequency = <24000000>;
-};
-&blsp1_uart1 {
-	status = "okay";
-	pinctrl-0 = <&blsp_uart0_pins>;
-	pinctrl-names = "default";
-};
-&crypto {
-	status = "okay";
-};
-&cryptobam {
-	status = "okay";
-};
-&qpic_bam {
-	status = "okay";
-};
-&qpic_nand {
-	pinctrl-0 = <&qpic_pins>;
-	pinctrl-names = "default";
-	status = "okay";
-	partitions {
-		status = "disabled";
-	};
-    nand@0 {
-        compatible = "spi-nand";
-		reg = <0>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		nand-ecc-engine = <&qpic_nand>;
-        nand-ecc-strength = <8>;
-        nand-ecc-step-size = <512>;
-        nand-bus-width = <8>;
-        partitions {
-            compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			partition@0 {
-				label = "0:SBL1";
-				reg = <0x00000000 0x80000>;
-				read-only;
-			};
-            partition@80000 {
-				label = "0:MIBIB";
-				reg = <0x00080000 0x80000>;
-				read-only;
-			};
-			partition@100000 {
-				label = "0:BOOTCONFIG";
-				reg = <0x00100000 0x40000>;
-				read-only;
-			};
-            partition@140000 {
-				label = "0:QSEE";
-				reg = <0x00140000 0x100000>;
-				read-only;
-			};
-            partition@240000 {
-				label = "0:DEVCFG";
-				reg = <0x00240000 0x40000>;
-				read-only;
-			};
-            partition@280000 {
-				label = "0:CDT";
-				reg = <0x00280000 0x40000>;
-				read-only;
-			};
-            partition@2c0000 {
-				label = "0:APPSBLENV";
-				reg = <0x002c0000 0x80000>;
-			};
-            partition@340000 {
-				label = "0:APPSBL";
-				reg = <0x00340000 0x140000>;
-				read-only;
-			};
-			partition@480000 {
-				label = "0:ART";
-				reg = <0x00480000 0x100000>;
-				read-only;
-				
-				nvmem-layout {
-					compatible = "fixed-layout";
-					#address-cells = <1>;
-					#size-cells = <1>;
-					macaddr_dp2: macaddr@0 {
-						reg = <0x0 0x6>;
-					};
-				};
-			};
-            partition@580000 {
-				label = "0:TRAINING";
-				reg = <0x00580000 0x80000>;
-				read-only;
-			};
-            partition@600000 {
-				label = "CFG";
-				reg = <0x00600000 0x200000>;
-			};
-            partition@800000 {
-				label = "rootfs";
-				reg = <0x00800000 0x7800000>;
-			};
-        };
-    };
-};
-&tlmm {
-	mdio1_pins: mdio-state {
-		mdc-pins {
-			pins = "gpio36";
-			function = "mdc";
-			drive-strength = <8>;
-			bias-pull-up;
-		};
-		mdio-pins {
-			pins = "gpio37";
-			function = "mdio";
-			drive-strength = <8>;
-			bias-pull-up;
-		};
-	};
-	
-	leds_pins: leds_pins {
-		led_system_blue {
-			pins = "gpio24";
-			function = "gpio";
-			drive-strength = <8>;
-			bias-pull-down;
-		};
-		
-		led_status_white {
-			pins = "gpio23";
-			function = "gpio";
-			drive-strength = <8>;
-			bias-pull-down;
-		};
-	};
-	button_pins: button_pins {
-		button_reset {
-			pins = "gpio27";
-			function = "gpio";
-			drive-strength = <8>;
-			bias-pull-up;
-		};
-	};
-	
-	qpic_pins: qpic-state {
-		clock-pins {
-			pins = "gpio9";
-			function = "qspi_clk";
-			drive-strength = <8>;
-			bias-disable;
-		};
-		cs-pins {
-			pins = "gpio8";
-			function = "qspi_cs";
-			drive-strength = <8>;
-			bias-disable;
-		};
-		data-pins {
-			pins = "gpio4", "gpio5", "gpio6", "gpio7";
-			function = "qspi_data";
-			drive-strength = <8>;
-			bias-disable;
-		};
-	};
-	blsp_uart0_pins: blsp_uart0_pins {
-		pins =
-			"gpio20", // RX
-			"gpio21"; // TX
-		function = "blsp0_uart0";
-		drive-strength = <8>;
-		bias-disable;
-	};
-};
 
-&tsens {
+&prng {
-	status = "disabled";
+	status = "okay";
-};
-
-&pcie_x2phy {
-	status = "disabled";
-};
-
-&pcie_x2 {
-	status = "disabled";
-	perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
 };
 
 &q6v5_wcss {
@@ -385,13 +200,13 @@
 					"ath11k/IPQ5018/hw1.0/m3_fw.mdt",
 					"ath11k/qcn6122/hw1.0/m3_fw.mdt";
 
-	boot-args = 
+	boot-args =
 			</*       type: */ 0x1 /* PCIE0 */
 		     /*     length: */ 4
 		     /*      PD id: */ 3
 		     /* reset GPIO: */ 15
 		     /*   reserved: */ 0 0>;
-	
+
 	// IPQ5018
 	q6_wcss_pd1: pd-1 {
 		firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
@@ -430,7 +245,6 @@
 			"shutdown",
 			"stop",
 			"spawn";
-		status = "okay";
 	};
 
 	// QCN6102 5G
@@ -454,12 +268,121 @@
 			"shutdown",
 			"stop",
 			"spawn";
-
-		status = "okay";
 	};
 };
+
+&qpic_bam {
+	status = "okay";
+};
+
+&qpic_nand {
+	pinctrl-0 = <&qpic_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	nand@0 {
+		compatible = "spi-nand";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+
+		nand-ecc-engine = <&qpic_nand>;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+
+		partitions {
+			compatible = "qcom,smem-part";
+		};
+	};
+};
+
+&switch {
+	switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
+	status = "okay";
+
+	qcom,port_phyinfo {
+		// MAC0 -> GE Phy -> QCA8337 Phy2
+		port@0 {
+			port_id = <1>;
+			mdiobus = <&mdio0>;
+			phy_address = <7>;
+			phy_dac = <0x10 0x10>;
+		};
+		// MAC1 ---SGMII---> QCA8337 SerDes
+		port@1 {
+			port_id = <2>;
+			forced-speed = <1000>;
+			forced-duplex = <1>;
+		};
+	};
+};
+
+&tlmm {
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	button_pins: button_pins {
+		mux {
+			pins = "gpio27";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	leds_pins: leds_pins {
+		mux {
+			pins = "gpio23", "gpio24";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	mdio1_pins: mdio-state {
+		mdc-pins {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+		mdio-pins {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	qpic_pins: qpic-state {
+		clock-pins {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		cs-pins {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		data-pins {
+			pins = "gpio4", "gpio5", "gpio6", "gpio7";
+			function = "qspi_data";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+};
+
 &wifi0 {
-	// IPQ5018
 	qcom,rproc = <&q6_wcss_pd1>;
 	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
 	qcom,ath11k-calibration-variant = "GL-iNet-GL-B3000";
@@ -467,6 +390,7 @@
 	qcom,bdf-addr = <0x4c400000>;
 	status = "okay";
 };
+
 &wifi1 {
 	qcom,rproc = <&q6_wcss_pd3>;
 	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";

target/linux/qualcommax/patches-6.6/0137-arm64-dts-qcom-ipq6018-add-SDHCI-node.patch

@@ -13,16 +13,15 @@ Tested-by: Robert Marko <robimarko@gmail.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -470,6 +470,29 @@
+@@ -470,6 +470,25 @@
  			};
  		};
  
-+		sdhc_1: mmc@7804000 {
++		sdhc: mmc@7804000 {
 +			compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5";
 +			reg = <0x0 0x07804000 0x0 0x1000>,
-+			      <0x0 0x07805000 0x0 0x1000>,
++			      <0x0 0x07805000 0x0 0x1000>;
-+			      <0x0 0x07808000 0x0 0x2000>;
++			reg-names = "hc", "cqhci";
-+			reg-names = "hc", "cqhci", "ice";
 +
 +			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
@@ -30,13 +29,10 @@ Tested-by: Robert Marko <robimarko@gmail.com>
 +
 +			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
 +				 <&gcc GCC_SDCC1_APPS_CLK>,
-+				 <&xo>,
++				 <&xo>;
-+				 <&gcc GCC_SDCC1_ICE_CORE_CLK>;
++			clock-names = "iface", "core", "xo";
-+			clock-names = "iface", "core", "xo", "ice";
-+
 +			resets = <&gcc GCC_SDCC1_BCR>;
-+			supports-cqe;
++			max-frequency = <192000000>;
-+			bus-width = <8>;
 +			status = "disabled";
 +		};
 +