diff --git a/package/boot/arm-trusted-firmware-rockchip-vendor/Makefile b/package/boot/arm-trusted-firmware-rockchip-vendor/Makefile index 77932c655..1374f16a2 100644 --- a/package/boot/arm-trusted-firmware-rockchip-vendor/Makefile +++ b/package/boot/arm-trusted-firmware-rockchip-vendor/Makefile @@ -1,17 +1,17 @@ # SPDX-License-Identifier: GPL-2.0-only # -# Copyright (C) 2021-2023 ImmortalWrt.org +# Copyright (C) 2022 ImmortalWrt.org include $(TOPDIR)/rules.mk PKG_NAME:=arm-trusted-firmware-rockchip-vendor -PKG_RELEASE:=1 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git -PKG_SOURCE_URL:=https://github.com/rockchip-linux/rkbin.git -PKG_SOURCE_DATE:=2024-02-22 -PKG_SOURCE_VERSION:=a2a0b89b6c8c612dca5ed9ed8a68db8a07f68bc0 -PKG_MIRROR_HASH:=ada1db5d73938c61847b3608844bb5a95d26a92574677e21322327d4438db19f +PKG_SOURCE_URL=https://github.com/rockchip-linux/rkbin.git +PKG_SOURCE_DATE:=2023-07-26 +PKG_SOURCE_VERSION:=b4558da0860ca48bf1a571dd33ccba580b9abe23 +PKG_MIRROR_HASH:=039f0f72d0dd179487b5d4b135d13684b220f3d81fa7308a34431a86701f69c6 PKG_MAINTAINER:=Tianling Shen @@ -37,12 +37,6 @@ define Package/arm-trusted-firmware-rk3399 VARIANT:=rk3399 endef -define Package/arm-trusted-firmware-rk3528 - $(Package/arm-trusted-firmware-rockchip-vendor) - DEPENDS:=@TARGET_rockchip_armv8 - VARIANT:=rk3528 -endef - define Package/arm-trusted-firmware-rk3566 $(Package/arm-trusted-firmware-rockchip-vendor) DEPENDS:=@TARGET_rockchip_armv8 @@ -55,12 +49,6 @@ define Package/arm-trusted-firmware-rk3568 VARIANT:=rk3568 endef -define Package/arm-trusted-firmware-rk3588 - $(Package/arm-trusted-firmware-rockchip-vendor) - DEPENDS:=@TARGET_rockchip_armv8 - VARIANT:=rk3588 -endef - define Build/Configure $(SED) 's,$$$$(PKG_BUILD_DIR),$(PKG_BUILD_DIR),g' $(PKG_BUILD_DIR)/trust.ini $(SED) 's,$$$$(VARIANT),$(BUILD_VARIANT),g' $(PKG_BUILD_DIR)/trust.ini @@ -81,21 +69,13 @@ endef define Package/arm-trusted-firmware-rk3399/install endef -define Package/arm-trusted-firmware-rk3528/install -endef - define Package/arm-trusted-firmware-rk3566/install endef define Package/arm-trusted-firmware-rk3568/install endef -define Package/arm-trusted-firmware-rk3588/install -endef - $(eval $(call BuildPackage,arm-trusted-firmware-rk3328)) $(eval $(call BuildPackage,arm-trusted-firmware-rk3399)) -$(eval $(call BuildPackage,arm-trusted-firmware-rk3528)) $(eval $(call BuildPackage,arm-trusted-firmware-rk3566)) $(eval $(call BuildPackage,arm-trusted-firmware-rk3568)) -$(eval $(call BuildPackage,arm-trusted-firmware-rk3588)) diff --git a/package/boot/arm-trusted-firmware-rockchip-vendor/atf-version.mk b/package/boot/arm-trusted-firmware-rockchip-vendor/atf-version.mk deleted file mode 100644 index f3881df77..000000000 --- a/package/boot/arm-trusted-firmware-rockchip-vendor/atf-version.mk +++ /dev/null @@ -1,17 +0,0 @@ -RK3328_ATF:=rk322xh_bl31_v1.49.elf -RK3328_DDR:=rk3328_ddr_333MHz_v1.19.bin -RK3328_LOADER:=rk322xh_miniloader_v2.50.bin - -RK3399_ATF:=rk3399_bl31_v1.36.elf -RK3399_DDR:=rk3399_ddr_800MHz_v1.30.bin -RK3399_LOADER:=rk3399_miniloader_v1.30.bin - -RK3528_ATF:=rk3528_bl31_v1.16.elf -RK3528_DDR:=rk3528_ddr_1056MHz_v1.07.bin - -RK3568_ATF:=rk3568_bl31_v1.43.elf -RK3568_DDR:=rk3568_ddr_1560MHz_v1.18.bin -RK3566_DDR:=rk3566_ddr_1056MHz_v1.18.bin - -RK3588_ATF:=rk3588_bl31_v1.41.elf -RK3588_DDR:=rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.13.bin diff --git a/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh b/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh index 67f3e6be2..82e8f379c 100755 --- a/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh +++ b/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh @@ -18,20 +18,20 @@ case "$VARIANT" in LOADER="rk33/rk3399_miniloader_v1.30.bin" ;; "rk3528") - ATF="rk35/rk3528_bl31_v1.17.elf" - DDR="rk35/rk3528_ddr_1056MHz_v1.09.bin" + ATF="rk35/rk3528_bl31_v1.16.elf" + DDR="rk35/rk3528_ddr_1056MHz_v1.06.bin" ;; "rk3566") - ATF="rk35/rk3568_bl31_v1.44.elf" - DDR="rk35/rk3566_ddr_1056MHz_v1.21.bin" + ATF="rk35/rk3568_bl31_v1.43.elf" + DDR="rk35/rk3566_ddr_1056MHz_v1.18.bin" ;; "rk3568") - ATF="rk35/rk3568_bl31_v1.44.elf" - DDR="rk35/rk3568_ddr_1560MHz_v1.21.bin" + ATF="rk35/rk3568_bl31_v1.43.elf" + DDR="rk35/rk3568_ddr_1560MHz_v1.18.bin" ;; "rk3588") - ATF="rk35/rk3588_bl31_v1.45.elf" - DDR="rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin" + ATF="rk35/rk3588_bl31_v1.40.elf" + DDR="rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.12.bin" ;; *) echo -e "Not compatible with your platform: $VARIANT." @@ -43,7 +43,7 @@ set -x if [ "$ACTION" == "build" ]; then case "$VARIANT" in rk33*) - mkimage -n "$VARIANT" -T "rksd" -d "$PKG_BUILD_DIR/bin/$DDR" "$PKG_BUILD_DIR/$VARIANT-idbloader.bin" + "$PKG_BUILD_DIR"/tools/mkimage -n "$VARIANT" -T "rksd" -d "$PKG_BUILD_DIR/bin/$DDR" "$PKG_BUILD_DIR/$VARIANT-idbloader.bin" cat "$PKG_BUILD_DIR/bin/$LOADER" >> "$PKG_BUILD_DIR/$VARIANT-idbloader.bin" "$PKG_BUILD_DIR/tools/trust_merger" --replace "bl31.elf" "$PKG_BUILD_DIR/bin/$ATF" "$PKG_BUILD_DIR/trust.ini" ;; diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index c08fffda8..54cc71af5 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -188,8 +188,8 @@ define U-Boot/panther-x2-rk3566 panther_x2 DEPENDS:=+PACKAGE_u-boot-panther-x2-rk3566:arm-trusted-firmware-rk3566 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3566_ddr_1056MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3566_ddr_1056MHz_v1.18.bin endef # RK3568 boards @@ -201,8 +201,8 @@ define U-Boot/lyt-t68m-rk3568 lyt_t68m DEPENDS:=+PACKAGE_u-boot-lyt-t68m-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/mrkaio-m68s-rk3568 @@ -213,8 +213,8 @@ define U-Boot/mrkaio-m68s-rk3568 ezpro_mrkaio-m68s-plus DEPENDS:=+PACKAGE_u-boot-mrkaio-m68s-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/nanopi-r5s-rk3568 @@ -225,8 +225,8 @@ define U-Boot/nanopi-r5s-rk3568 friendlyarm_nanopi-r5s DEPENDS:=+PACKAGE_u-boot-nanopi-r5s-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/opc-h68k-rk3568 @@ -238,8 +238,8 @@ define U-Boot/opc-h68k-rk3568 hinlink_opc-h69k DEPENDS:=+PACKAGE_u-boot-opc-h68k-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/photonicat-rk3568 @@ -249,8 +249,8 @@ define U-Boot/photonicat-rk3568 ariaboard_photonicat DEPENDS:=+PACKAGE_u-boot-photonicat-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/radxa-e25-rk3568 @@ -260,8 +260,8 @@ define U-Boot/radxa-e25-rk3568 radxa_e25 DEPENDS:=+PACKAGE_u-boot-radxa-e25-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/rock-3a-rk3568 @@ -271,8 +271,8 @@ define U-Boot/rock-3a-rk3568 radxa_rock-3a DEPENDS:=+PACKAGE_u-boot-rock-3a-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/r66s-rk3568 @@ -283,8 +283,8 @@ define U-Boot/r66s-rk3568 fastrhino_r68s DEPENDS:=+PACKAGE_u-boot-r66s-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/seewo-sv21-rk3568 @@ -294,8 +294,8 @@ define U-Boot/seewo-sv21-rk3568 seewo_sv21-rk3568 DEPENDS:=+PACKAGE_u-boot-seewo-sv21-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/station-p2-rk3568 @@ -305,8 +305,8 @@ define U-Boot/station-p2-rk3568 firefly_station-p2 DEPENDS:=+PACKAGE_u-boot-station-p2-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef define U-Boot/advantech-rsb4810-rk3568 @@ -316,8 +316,8 @@ define U-Boot/advantech-rsb4810-rk3568 advantech_rsb4810 DEPENDS:=+PACKAGE_u-boot-advantech-rsb4810-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.44.elf - DDR:=rk3568_ddr_1560MHz_v1.21.bin + ATF:=rk3568_bl31_v1.43.elf + DDR:=rk3568_ddr_1560MHz_v1.18.bin endef UBOOT_TARGETS := \ @@ -354,12 +354,12 @@ UBOOT_MAKE_FLAGS += \ PATH=$(STAGING_DIR_HOST)/bin:$(PATH) \ BL31=$(STAGING_DIR_IMAGE)/$(ATF) -ifeq ($(CONFIG_PACKAGE_arm-trusted-firmware-rk3566),y) +ifeq ($(CONFIG_PACKAGE_arm-trusted-firmware-rk3568),y) UBOOT_MAKE_FLAGS += \ ROCKCHIP_TPL=$(STAGING_DIR_IMAGE)/$(DDR) endif -ifeq ($(CONFIG_PACKAGE_arm-trusted-firmware-rk3568),y) +ifeq ($(CONFIG_PACKAGE_arm-trusted-firmware-rk3566),y) UBOOT_MAKE_FLAGS += \ ROCKCHIP_TPL=$(STAGING_DIR_IMAGE)/$(DDR) endif diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile index a92748158..19731ed40 100644 --- a/package/boot/uboot-sunxi/Makefile +++ b/package/boot/uboot-sunxi/Makefile @@ -132,12 +132,6 @@ define U-Boot/OLIMEX_A13_SOM BUILD_DEVICES:=olimex_a13-olimex-som endef -define U-Boot/licheepi_nano - BUILD_SUBTARGET:=arm926ejs - NAME:=LicheePi Nano - BUILD_DEVICES:=licheepi-nano -endef - define U-Boot/Linksprite_pcDuino BUILD_SUBTARGET:=cortexa8 NAME:=Linksprite pcDuino @@ -249,12 +243,6 @@ define U-Boot/pangolin UENV:=pangolin endef -define U-Boot/popstick - BUILD_SUBTARGET:=arm926ejs - NAME:=PopStick - BUILD_DEVICES:=popstick-v1.1 -endef - define U-Boot/libretech_all_h3_cc_h5 BUILD_SUBTARGET:=cortexa53 NAME:=Libre Computer ALL-H3-CC H5 @@ -358,15 +346,6 @@ define U-Boot/orangepi_zero3 ATF:=h616 endef -define U-Boot/hechuang_x98h - BUILD_SUBTARGET:=cortexa53 - NAME:=Hechuang X98H - BUILD_DEVICES:=hechuang_x98h - DEPENDS:=+PACKAGE_u-boot-hechuang_x98h:trusted-firmware-a-sunxi-h616 - UENV:=h616 - ATF:=h616 -endef - define U-Boot/Bananapi_M2_Ultra BUILD_SUBTARGET:=cortexa7 NAME:=Bananapi M2 Ultra @@ -404,12 +383,10 @@ UBOOT_TARGETS := \ Cubieboard \ Cubieboard2 \ Cubietruck \ - hechuang_x98h \ Hummingbird_A31 \ Marsboard_A10 \ Mele_M9 \ OLIMEX_A13_SOM \ - licheepi_nano \ Linksprite_pcDuino \ Linksprite_pcDuino3 \ Linksprite_pcDuino3_Nano \ @@ -434,7 +411,6 @@ UBOOT_TARGETS := \ orangepi_zero2 \ orangepi_zero3 \ pangolin \ - popstick \ pine64_plus \ Sinovoip_BPI_M3 \ sopine_baseboard \ diff --git a/package/boot/uboot-sunxi/patches/255-sunxi-h6-add-support-for-x98h.patch b/package/boot/uboot-sunxi/patches/255-sunxi-h6-add-support-for-x98h.patch deleted file mode 100644 index 95e258c1f..000000000 --- a/package/boot/uboot-sunxi/patches/255-sunxi-h6-add-support-for-x98h.patch +++ /dev/null @@ -1,218 +0,0 @@ -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index c16b6471..3262517a 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -836,7 +836,8 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \ - dtb-$(CONFIG_MACH_SUN50I_H616) += \ - sun50i-h616-orangepi-zero2.dtb \ - sun50i-h618-orangepi-zero3.dtb \ -- sun50i-h616-x96-mate.dtb -+ sun50i-h616-x96-mate.dtb \ -+ sun50i-h618-x98h.dtb - dtb-$(CONFIG_MACH_SUN50I) += \ - sun50i-a64-amarula-relic.dtb \ - sun50i-a64-bananapi-m64.dtb \ -diff --git a/arch/arm/dts/sun50i-h618-x98h.dts b/arch/arm/dts/sun50i-h618-x98h.dts -new file mode 100644 -index 00000000..d3bc2284 ---- /dev/null -+++ b/arch/arm/dts/sun50i-h618-x98h.dts -@@ -0,0 +1,161 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) 2021 Arm Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "sun50i-h616.dtsi" -+ -+#include -+#include -+ -+/ { -+ model = "X98H"; -+ compatible = "hechuang,x98h", "allwinner,sun50i-h618"; -+ -+ aliases { -+ ethernet0 = &emac1; -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ reg_vcc5v: vcc5v { -+ /* board wide 5V supply directly from the DC input */ -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-5v"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+}; -+ -+&emac1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rmii_pins>; -+ phy-mode = "rmii"; -+ phy-handle = <&rmii_phy>; -+ phy-supply = <®_aldo1>; -+ allwinner,rx-delay-ps = <3100>; -+ allwinner,tx-delay-ps = <700>; -+ status = "okay"; -+}; -+ -+&mdio1 { -+ rmii_phy: ethernet-phy@16 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <16>; -+ }; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci2 { -+ status = "okay"; -+}; -+ -+&ir { -+ status = "okay"; -+}; -+ -+&mmc0 { -+ vmmc-supply = <®_dldo1>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&mmc2 { -+ vmmc-supply = <®_dldo1>; -+ vqmmc-supply = <®_aldo1>; -+ bus-width = <8>; -+ non-removable; -+ cap-mmc-hw-reset; -+ mmc-ddr-1_8v; -+ mmc-hs200-1_8v; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&ohci2 { -+ status = "okay"; -+}; -+ -+&r_i2c { -+ status = "okay"; -+ -+ axp313: pmic@36 { -+ compatible = "x-powers,axp313a"; -+ reg = <0x36>; -+ #interrupt-cells = <1>; -+ interrupt-controller; -+ interrupt-parent = <&pio>; -+ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */ -+ -+ vin1-supply = <®_vcc5v>; -+ vin2-supply = <®_vcc5v>; -+ vin3-supply = <®_vcc5v>; -+ -+ regulators { -+ /* Supplies VCC-PLL, so needs to be always on. */ -+ reg_aldo1: aldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc1v8"; -+ }; -+ -+ /* Supplies VCC-IO, so needs to be always on. */ -+ reg_dldo1: dldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc3v3"; -+ }; -+ -+ reg_dcdc1: dcdc1 { -+ regulator-always-on; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <990000>; -+ regulator-name = "vdd-gpu-sys"; -+ }; -+ -+ reg_dcdc2: dcdc2 { -+ regulator-always-on; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-cpu"; -+ }; -+ -+ reg_dcdc3: dcdc3 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-dram"; -+ }; -+ }; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ph_pins>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ dr_mode = "host"; /* USB A type receptable */ -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -diff --git a/configs/hechuang_x98h_defconfig b/configs/hechuang_x98h_defconfig -new file mode 100644 -index 00000000..3d97900b ---- /dev/null -+++ b/configs/hechuang_x98h_defconfig -@@ -0,0 +1,31 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-x98h" -+CONFIG_SPL=y -+CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 -+CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e -+CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1f12 -+CONFIG_DRAM_SUN50I_H616_TPR0=0xc0001002 -+CONFIG_DRAM_SUN50I_H616_TPR10=0x2f1107 -+CONFIG_DRAM_SUN50I_H616_TPR11=0xddddcccc -+CONFIG_DRAM_SUN50I_H616_TPR12=0xeddc7665 -+CONFIG_MACH_SUN50I_H616=y -+CONFIG_SUNXI_DRAM_H616_DDR3_1333=y -+CONFIG_DRAM_CLK=648 -+CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -+CONFIG_R_I2C_ENABLE=y -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_SPL_I2C=y -+CONFIG_SPL_I2C_SUPPORT=y -+CONFIG_SPL_SYS_I2C_LEGACY=y -+CONFIG_SYS_I2C_MVTWSI=y -+CONFIG_SYS_I2C_SLAVE=0x7f -+CONFIG_SYS_I2C_SPEED=100000 -+CONFIG_PHY_REALTEK=y -+CONFIG_SUN8I_EMAC=y -+CONFIG_I2C3_ENABLE=y -+CONFIG_SUPPORT_EMMC_BOOT=y -+CONFIG_AXP313_POWER=y -+CONFIG_AXP_DCDC3_VOLT=1360 -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_OHCI_HCD=y diff --git a/package/boot/uboot-sunxi/patches/500-add-h6-internal-eth-phy-support.patch b/package/boot/uboot-sunxi/patches/500-add-h6-internal-eth-phy-support.patch deleted file mode 100644 index d16f85b52..000000000 --- a/package/boot/uboot-sunxi/patches/500-add-h6-internal-eth-phy-support.patch +++ /dev/null @@ -1,189 +0,0 @@ ---- a/arch/arm/dts/sun50i-h616.dtsi -+++ b/arch/arm/dts/sun50i-h616.dtsi -@@ -209,6 +209,14 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ -+ rmii_pins: rmii-pins { -+ pins = "PA0", "PA1", "PA2", "PA3", "PA4", -+ "PA5", "PA6", "PA7", "PA8", "PA9"; -+ function = "emac1"; -+ drive-strength = <40>; -+ }; -+ - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC0", "PC2", "PC4"; -@@ -504,6 +512,25 @@ - }; - }; - -+ emac1: ethernet@5030000 { -+ compatible = "allwinner,sun50i-h616-emac1"; -+ syscon = <&syscon 1>; -+ reg = <0x05030000 0x10000>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC1>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC1>; -+ clock-names = "stmmaceth"; -+ status = "disabled"; -+ -+ mdio1: mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ - usbotg: usb@5100000 { - compatible = "allwinner,sun50i-h616-musb", - "allwinner,sun8i-h3-musb"; ---- a/arch/arm/include/asm/arch-sunxi/i2c.h -+++ b/arch/arm/include/asm/arch-sunxi/i2c.h -@@ -13,6 +13,9 @@ - #ifdef CONFIG_I2C1_ENABLE - #define CFG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE - #endif -+#ifdef CONFIG_I2C3_ENABLE -+#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE -+#endif - #ifdef CONFIG_R_I2C_ENABLE - #define CFG_I2C_MVTWSI_BASE2 SUNXI_R_TWI_BASE - #endif ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -771,6 +771,15 @@ config I2C1_ENABLE - ---help--- - See I2C0_ENABLE help text. - -+if MACH_SUN50I_H616 -+config I2C3_ENABLE -+ bool "Enable I2C/TWI controller 3" -+ default n -+ select CMD_I2C -+ ---help--- -+ See I2C0_ENABLE help text. -+endif -+ - if SUNXI_GEN_SUN6I || SUN50I_GEN_H6 - config R_I2C_ENABLE - bool "Enable the PRCM I2C/TWI controller" ---- a/arch/arm/mach-sunxi/board.c -+++ b/arch/arm/mach-sunxi/board.c -@@ -460,6 +460,7 @@ void board_init_f(ulong dummy) - /* Needed early by sunxi_board_init if PMU is enabled */ - i2c_init_board(); - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -+ i2c_set_bus_num(0); - #endif - sunxi_board_init(); - } ---- a/arch/arm/mach-sunxi/clock_sun50i_h6.c -+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c -@@ -46,6 +46,10 @@ void clock_init_safe(void) - * DRAM initialization code. - */ - writel(MBUS_CLK_SRC_PLL6X2 | MBUS_CLK_M(3), &ccm->mbus_cfg); -+ -+ writel(0x10001, 0x030017ac); -+ writel(0x50, 0x0300a028); -+ writel(0x20, 0x0300a040); - } - #endif - ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -107,6 +108,17 @@ void i2c_init_board(void) - #endif - #endif - -+#ifdef CONFIG_I2C3_ENABLE -+#if defined(CONFIG_MACH_SUN50I_H616) -+ sunxi_gpio_set_cfgpin(SUNXI_GPA(10), 2); -+ sunxi_gpio_set_cfgpin(SUNXI_GPA(11), 2); -+ sunxi_gpio_set_cfgpin(SUNXI_GPA(12), 2); -+ sunxi_gpio_set_pull(SUNXI_GPA(10), SUNXI_GPIO_PULL_UP); -+ sunxi_gpio_set_pull(SUNXI_GPA(11), SUNXI_GPIO_PULL_UP); -+ clock_twi_onoff(3, 1); -+#endif -+#endif -+ - #ifdef CONFIG_R_I2C_ENABLE - #ifdef CONFIG_MACH_SUN50I - clock_twi_onoff(5, 1); -@@ -572,6 +584,7 @@ static void sunxi_spl_store_dram_size(phys_addr_t dram_size) - void sunxi_board_init(void) - { - int power_failed = 0; -+ u8 data[2]; - - #ifdef CONFIG_LED_STATUS - if (IS_ENABLED(CONFIG_SPL_DRIVERS_MISC)) -@@ -666,6 +679,23 @@ void sunxi_board_init(void) - clock_set_pll1(get_board_sys_clk()); - else - printf("Failed to set core voltage! Can't set CPU frequency\n"); -+ -+ i2c_set_bus_num(1); -+ data[0] = 0; -+ data[1] = 0; -+ i2c_write(0x10, 0xfe, 1, data, 2); -+ i2c_write(0x10, 2, 1, data, 2); -+ data[1] = 1; -+ i2c_write(0x10, 2, 1, data, 2); -+ data[1] = 0xf; -+ i2c_write(0x10, 0x16, 1, data, 2); -+ data[1] = 3; -+ i2c_write(0x10, 0x14, 1, data, 2); -+ data[1] = 0x60; -+ i2c_write(0x10, 0xfe, 1, data, 2); -+ data[0] = 0x08; -+ data[1] = 0x14; -+ i2c_write(0x10, 0, 1, data, 2); - } - #endif /* CONFIG_SPL_BUILD */ - ---- a/drivers/net/sun8i_emac.c -+++ b/drivers/net/sun8i_emac.c -@@ -909,6 +909,11 @@ static const struct emac_variant emac_variant_h6 = { - .support_rmii = true, - }; - -+static const struct emac_variant emac_variant_h616_1 = { -+ .syscon_offset = 0x34, -+ .support_rmii = true, -+}; -+ - static const struct udevice_id sun8i_emac_eth_ids[] = { - { .compatible = "allwinner,sun8i-a83t-emac", - .data = (ulong)&emac_variant_a83t }, -@@ -920,6 +925,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = { - .data = (ulong)&emac_variant_a64 }, - { .compatible = "allwinner,sun50i-h6-emac", - .data = (ulong)&emac_variant_h6 }, -+ { .compatible = "allwinner,sun50i-h616-emac1", -+ .data = (ulong)&emac_variant_h616_1 }, - { } - }; - ---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c -+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c -@@ -710,6 +710,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_r_pinctrl_desc = - - static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = { - { "emac0", 2 }, /* PI0-PI16 */ -+ { "emac1", 2 }, /* PA0-PA9 */ - { "gpio_in", 0 }, - { "gpio_out", 1 }, - { "mmc0", 2 }, /* PF0-PF5 */ diff --git a/package/boot/uboot-sunxi/patches/501-fix-int-phy-eth-h3-h6-with-ac300.patch b/package/boot/uboot-sunxi/patches/501-fix-int-phy-eth-h3-h6-with-ac300.patch deleted file mode 100644 index bf734d294..000000000 --- a/package/boot/uboot-sunxi/patches/501-fix-int-phy-eth-h3-h6-with-ac300.patch +++ /dev/null @@ -1,211 +0,0 @@ ---- a/arch/arm/mach-sunxi/clock_sun50i_h6.c -+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c -@@ -55,6 +55,7 @@ - writel(MBUS_CLK_SRC_PLL6X2 | MBUS_CLK_M(3), &ccm->mbus_cfg); - - writel(0x10001, 0x030017ac); -+ writel(0x80004, 0x0300a104); - writel(0x50, 0x0300a028); - writel(0x20, 0x0300a040); - } ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -574,10 +574,13 @@ - spl->dram_size = dram_size >> 20; - } - -+#define sunxi_ac300_key (1<<8) -+ - void sunxi_board_init(void) - { - int power_failed = 0; - u8 data[2]; -+ int val; - - #ifdef CONFIG_LED_STATUS - if (IS_ENABLED(CONFIG_SPL_DRIVERS_MISC)) -@@ -667,25 +670,33 @@ - */ - if (!power_failed) - clock_set_pll1(get_board_sys_clk()); -- else -- printf("Failed to set core voltage! Can't set CPU frequency\n"); -+ else { -+ clock_set_pll1(792000000); -+ printf("Failed to set core voltage! set CPU 792000000hz frequency\n"); -+ } - -- i2c_set_bus_num(1); -- data[0] = 0; -- data[1] = 0; -- i2c_write(0x10, 0xfe, 1, data, 2); -- i2c_write(0x10, 2, 1, data, 2); -- data[1] = 1; -- i2c_write(0x10, 2, 1, data, 2); -- data[1] = 0xf; -- i2c_write(0x10, 0x16, 1, data, 2); -- data[1] = 3; -- i2c_write(0x10, 0x14, 1, data, 2); -- data[1] = 0x60; -- i2c_write(0x10, 0xfe, 1, data, 2); -- data[0] = 0x08; -- data[1] = 0x14; -- i2c_write(0x10, 0, 1, data, 2); -+#if CONFIG_IS_ENABLED(SPL_I2C) && CONFIG_IS_ENABLED(SPL_SYS_I2C_LEGACY) -+ val=readl(0x300622c); -+ if((val&sunxi_ac300_key)==0) -+ { -+ i2c_set_bus_num(1); -+ data[0] = 0; -+ data[1] = 0; -+ i2c_write(0x10, 0xfe, 1, data, 2); -+ i2c_write(0x10, 2, 1, data, 2); -+ data[1] = 1; -+ i2c_write(0x10, 2, 1, data, 2); -+ data[1] = 0xf; -+ i2c_write(0x10, 0x16, 1, data, 2); -+ data[1] = 3; -+ i2c_write(0x10, 0x14, 1, data, 2); -+ data[1] = 0x60; -+ i2c_write(0x10, 0xfe, 1, data, 2); -+ data[0] = 0x08; -+ data[1] = 0x14; -+ i2c_write(0x10, 0, 1, data, 2); -+ } -+#endif - } - #endif /* CONFIG_SPL_BUILD */ - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -384,10 +385,79 @@ - return 0; - } - -+static void disable_intelligent_ieee(struct phy_device *phydev) -+{ -+ unsigned int value; -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0100); /* switch to page 1 */ -+ value = phy_read(phydev, MDIO_DEVAD_NONE, 0x17); /* read address 0 0x17 register */ -+ value &= ~(1 << 3); /* reg 0x17 bit 3, set 0 to disable IEEE */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x17, value); -+ phy_write(phydev, MDIO_DEVAD_NONE,0x1f, 0x0000); /* switch to page 0 */ -+} -+ -+static void disable_802_3az_ieee(struct phy_device *phydev) -+{ -+ unsigned int value; -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x3c); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x1 << 14 | 0x7); -+ value = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); -+ value &= ~(0x1 << 1); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x3c); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x1 << 14 | 0x7); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, value); -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0200); /* switch to page 2 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x18, 0x0000); -+} -+ -+static void ephy_config_default(struct phy_device *phydev) -+{ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0100); /* Switch to Page 1 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x12, 0x4824); /* Disable APS */ -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0200); /* Switch to Page 2 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x18, 0x0000); /* PHYAFE TRX optimization */ -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0600); /* Switch to Page 6 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x708b); /* PHYAFE TX optimization */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x13, 0xF000); /* PHYAFE RX optimization */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x1530); -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0800); /* Switch to Page 6 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x18, 0x00bc); /* PHYAFE TRX optimization */ -+} -+ -+static void __maybe_unused ephy_config_fixed(struct phy_device *phydev) -+{ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0100); /*switch to Page 1 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x12, 0x4824); /*Disable APS */ -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0200); /*switch to Page 2 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x18, 0x0000); /*PHYAFE TRX optimization */ -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0600); /*switch to Page 6 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x7809); /*PHYAFE TX optimization */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x13, 0xf000); /*PHYAFE RX optimization */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x5523); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x3533); -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0800); /*switch to Page 8 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x0844); /*disable auto offset */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x18, 0x00bc); /*PHYAFE TRX optimization */ -+ -+} -+ -+#define sunxi_ac300_key (1<<8) -+ - int genphy_config(struct phy_device *phydev) - { - int val; - u32 features; -+ u16 sid_value; - - features = (SUPPORTED_TP | SUPPORTED_MII - | SUPPORTED_AUI | SUPPORTED_FIBRE | -@@ -432,6 +502,42 @@ - - genphy_config_aneg(phydev); - -+ val=readl(0x300622c); -+ sid_value=0xffff&val; -+ if(val&sunxi_ac300_key) -+ { -+ /*add quirk for h313/H616 emac1 ephy bb version bug*/ -+ /*printf("apply fix for AC300 ephy bb version bug ...\n");*/ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x1f83); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x1fb7); -+ phy_write(phydev, MDIO_DEVAD_NONE, 5, 0xa81f); -+ phy_write(phydev, MDIO_DEVAD_NONE, 6, 0); -+ udelay(500000); -+ -+ val=phy_read(phydev, MDIO_DEVAD_NONE, 6); -+ val&=~(0x0f<<12); -+ val|=(0x0f&(0x03+sid_value))<<12; -+ phy_write(phydev,MDIO_DEVAD_NONE, 6,val); -+ -+ if(sid_value&0x200) { -+ /*printf("using AC300 emac1 ephy fixed config ...\n");*/ -+ ephy_config_fixed(phydev); -+ } -+ else { -+ /*printf("using AC300 emac1 ephy default config ...\n");*/ -+ ephy_config_default(phydev); -+ } -+ -+ disable_intelligent_ieee(phydev); -+ -+ disable_802_3az_ieee(phydev); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0000); -+ -+ val=phy_read(phydev, MDIO_DEVAD_NONE, 6); -+ val|=(0x1<<11); -+ phy_write(phydev,MDIO_DEVAD_NONE, 6,val); -+ /*add end*/ -+ } - return 0; - } -