mediatek: add support for BananaPi BPI-R4 board

Hardware
--------
SOC:    MediaTek MT7988A (4x Cortex-A73)
RAM:    4 GiB DDR4
Flash:  128 MiB Winbond SPI-NAND
MMC:    8 GiB eMMC *or* microSD (cannot be used both)
ETH:    4x 1GE (1x WAN, 3x LAN)
        2x SFP+ (10G, 5G, 2.5G, 1G)
USB:    on-board USB 3.2 4-port hub
        1x USB 3.2 port (type A connector)
        1x M.2 for 4G/5G modem
        2x mPCIe for additional modems
WiFi:   optional MediaTek MT7996 Wi-Fi 7 module
        (using 2x PCIe gen3 x2 on the mPCIe slots and 12V power)

Installation
------------
1. Decompress and write the sdcard image to a micro SD card and use that
to boot the R4 (both dip switches in upper position).

2. Use the bootloader menu accessible via the serial console to install
to SPI-NAND.

3. Switch to boot from SPI-NAND and install to eMMC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2024-07-01 13:36:10 +08:00
parent 21ab9a9f1a
commit 08aaf074b9
15 changed files with 767 additions and 15 deletions

View File

@ -12,7 +12,9 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
bananapi,bpi-r3)
bananapi,bpi-r3|\
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
case "$(cmdline_get_var root)" in
/dev/mmc*)
local envdev=$(find_mmc_part "ubootenv" $rootdev)

View File

@ -9,7 +9,9 @@ unielec,u7623-02)
[ -z "$(fw_printenv -n ethaddr 2>/dev/null)" ] &&
fw_setenv ethaddr "$(cat /sys/class/net/eth0/address)"
;;
bananapi,bpi-r3)
bananapi,bpi-r3|\
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
[ -z "$(fw_printenv -n ethaddr 2>/dev/null)" ] &&
fw_setenv ethaddr "$(cat /sys/class/net/eth0/address)"
[ -z "$(fw_printenv -n eth1addr 2>/dev/null)" ] &&

View File

@ -0,0 +1,62 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2021 MediaTek Inc.
* Author: Frank Wunderlich <frank-w@public-files.de>
*/
/dts-v1/;
/plugin/;
/ {
compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
fragment@0 {
target-path = "/soc/mmc@11230000";
__overlay__ {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_emmc_51>;
pinctrl-1 = <&mmc0_pins_emmc_51>;
bus-width = <8>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
hs400-ds-delay = <0x12814>;
vqmmc-supply = <&reg_1p8v>;
vmmc-supply = <&reg_3p3v>;
non-removable;
no-sd;
no-sdio;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
card@0 {
compatible = "mmc-card";
reg = <0>;
block {
compatible = "block-device";
partitions {
block-partition-env {
partname = "ubootenv";
nvmem-layout {
compatible = "u-boot,env-layout";
};
};
emmc_rootfs: block-partition-production {
partname = "production";
};
};
};
};
};
};
fragment@2 {
target-path = "/chosen";
__overlay__ {
rootdisk-emmc = <&emmc_rootfs>;
};
};
};

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@ -0,0 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 MediaTek Inc.
* Author: Sam.Shih <sam.shih@mediatek.com>
*/
#include "mt7988a-bananapi-bpi-r4.dts"
/ {
model = "Bananapi BPI-R4 2.5GE PoE";
compatible = "bananapi,bpi-r4-poe",
"mediatek,mt7988a";
};
&gmac1 {
phy-mode = "internal";
phy-connection-type = "internal";
phy = <&int_2p5g_phy>;
status = "okay";
};
&int_2p5g_phy {
pinctrl-names = "i2p5gbe-led";
pinctrl-0 = <&i2p5gbe_led0_pins>;
};

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@ -0,0 +1,19 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2023
* Author: Daniel Golle <daniel@makrotopia.org>
*/
/dts-v1/;
/plugin/;
/ {
compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
fragment@0 {
target = <&pcf8563>;
__overlay__ {
status = "okay";
};
};
};

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@ -0,0 +1,60 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2023 MediaTek Inc.
* Author: Frank Wunderlich <frank-w@public-files.de>
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
fragment@1 {
target-path = "/soc/mmc@11230000";
__overlay__ {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_sdcard>;
pinctrl-1 = <&mmc0_pins_sdcard>;
cd-gpios = <&pio 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
max-frequency = <52000000>;
cap-sd-highspeed;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
no-mmc;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
card@0 {
compatible = "mmc-card";
reg = <0>;
block {
compatible = "block-device";
partitions {
block-partition-env {
partname = "ubootenv";
nvmem-layout {
compatible = "u-boot,env-layout";
};
};
sd_rootfs: block-partition-production {
partname = "production";
};
};
};
};
};
};
fragment@2 {
target-path = "/chosen";
__overlay__ {
rootdisk-sd = <&sd_rootfs>;
};
};
};

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@ -0,0 +1,99 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
fragment@0 {
target-path = "/";
__overlay__ {
wifi_12v: regulator-wifi-12v {
compatible = "regulator-fixed";
regulator-name = "wifi";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&pio 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
};
};
fragment@1 {
target = <&i2c_wifi>;
__overlay__ {
// 5G WIFI MAC Address EEPROM
wifi_eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
address-bits = <8>;
page-size = <8>;
size = <256>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_5g: macaddr@0 {
reg = <0x0 0x6>;
};
};
};
// 6G WIFI MAC Address EEPROM
wifi_eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
address-bits = <8>;
page-size = <8>;
size = <256>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_6g: macaddr@0 {
reg = <0x0 0x6>;
};
};
};
};
};
fragment@2 {
target = <&pcie0>;
__overlay__ {
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_5g>;
};
};
};
};
fragment@3 {
target = <&pcie1>;
__overlay__ {
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_6g>;
};
};
};
};
};

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@ -0,0 +1,395 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 MediaTek Inc.
* Author: Sam.Shih <sam.shih@mediatek.com>
*/
/dts-v1/;
#include "mt7988a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
/ {
model = "Bananapi BPI-R4";
compatible = "bananapi,bpi-r4",
"mediatek,mt7988";
aliases {
serial0 = &uart0;
led-boot = &led_green;
led-failsafe = &led_green;
led-running = &led_green;
led-upgrade = &led_green;
};
chosen {
stdout-path = &uart0;
bootargs = "console=ttyS0,115200n1 loglevel=8 pci=pcie_bus_perf ubi.block=0,fit root=/dev/fit0";
rootdisk-spim-nand = <&ubi_rootfs>;
};
memory {
reg = <0x00 0x40000000 0x00 0x10000000>;
};
/* SFP1 cage (WAN) */
sfp1: sfp1 {
compatible = "sff,sfp";
i2c-bus = <&i2c_sfp1>;
los-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&pio 82 GPIO_ACTIVE_LOW>;
tx-disable-gpios = <&pio 70 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
rate-select0-gpios = <&pio 21 GPIO_ACTIVE_LOW>;
maximum-power-milliwatt = <3000>;
};
/* SFP2 cage (LAN) */
sfp2: sfp2 {
compatible = "sff,sfp";
i2c-bus = <&i2c_sfp2>;
los-gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&pio 83 GPIO_ACTIVE_LOW>;
tx-disable-gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
rate-select0-gpios = <&pio 3 GPIO_ACTIVE_LOW>;
maximum-power-milliwatt = <3000>;
};
gpio-keys {
compatible = "gpio-keys";
wps {
label = "WPS";
linux,code = <KEY_RESTART>;
gpios = <&pio 14 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led_green: led-green {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 79 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_blue: led-blue {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 63 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&eth {
status = "okay";
};
&gmac0 {
status = "okay";
};
&gmac1 {
sfp = <&sfp2>;
managed = "in-band-status";
phy-mode = "usxgmii";
status = "okay";
};
&gmac2 {
sfp = <&sfp1>;
managed = "in-band-status";
phy-mode = "usxgmii";
status = "okay";
};
&switch {
status = "okay";
};
&gsw_phy0 {
pinctrl-names = "gbe-led";
pinctrl-0 = <&gbe0_led0_pins>;
};
&gsw_port0 {
label = "wan";
};
&gsw_phy0_led0 {
status = "okay";
color = <LED_COLOR_ID_GREEN>;
};
&gsw_phy1 {
pinctrl-names = "gbe-led";
pinctrl-0 = <&gbe1_led0_pins>;
};
&gsw_phy1_led0 {
status = "okay";
color = <LED_COLOR_ID_GREEN>;
};
&gsw_phy2 {
pinctrl-names = "gbe-led";
pinctrl-0 = <&gbe2_led0_pins>;
};
&gsw_phy2_led0 {
status = "okay";
color = <LED_COLOR_ID_GREEN>;
};
&gsw_phy3 {
pinctrl-names = "gbe-led";
pinctrl-0 = <&gbe3_led0_pins>;
};
&gsw_phy3_led0 {
status = "okay";
color = <LED_COLOR_ID_GREEN>;
};
&cpu0 {
proc-supply = <&rt5190_buck3>;
};
&cpu1 {
proc-supply = <&rt5190_buck3>;
};
&cpu2 {
proc-supply = <&rt5190_buck3>;
};
&cpu3 {
proc-supply = <&rt5190_buck3>;
};
&cci {
proc-supply = <&rt5190_buck3>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
rt5190a_64: rt5190a@64 {
compatible = "richtek,rt5190a";
reg = <0x64>;
vin2-supply = <&rt5190_buck1>;
vin3-supply = <&rt5190_buck1>;
vin4-supply = <&rt5190_buck1>;
regulators {
rt5190_buck1: buck1 {
regulator-name = "rt5190a-buck1";
regulator-min-microvolt = <5090000>;
regulator-max-microvolt = <5090000>;
regulator-allowed-modes =
<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
regulator-boot-on;
regulator-always-on;
};
buck2 {
regulator-name = "vcore";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1400000>;
regulator-boot-on;
regulator-always-on;
};
rt5190_buck3: buck3 {
regulator-name = "vproc";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1400000>;
regulator-boot-on;
};
buck4 {
regulator-name = "rt5190a-buck4";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-allowed-modes =
<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
regulator-boot-on;
regulator-always-on;
};
ldo {
regulator-name = "rt5190a-ldo";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_1_pins>;
status = "okay";
pca9545: i2c-switch@70 {
reg = <0x70>;
compatible = "nxp,pca9545";
reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
i2c_rtc: i2c@0 { //eeprom,rtc,ngff
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
address-bits = <8>;
page-size = <8>;
size = <256>;
};
eeprom@57 {
compatible = "atmel,24c02";
reg = <0x57>;
address-bits = <8>;
page-size = <8>;
size = <256>;
};
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "disabled";
};
};
i2c_sfp1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_sfp2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_wifi: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
/* mPCIe SIM2 */
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
/* mPCIe SIM3 */
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
/* M.2 key-B SIM1 */
&pcie2 {
pinctrl-names = "default";
pinctrl-0 = <&pcie2_pins>;
status = "okay";
};
/* M.2 key-M SSD */
&pcie3 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3_pins>;
status = "okay";
};
&ssusb1 {
status = "okay";
};
&tphy {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
};
};
&spi_nand {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x200000>;
read-only;
};
partition@200000 {
label = "ubi";
reg = <0x200000 0x7e00000>;
compatible = "linux,ubi";
volumes {
ubi-volume-ubootenv {
volname = "ubootenv";
nvmem-layout {
compatible = "u-boot,env-redundant-bool-layout";
};
};
ubi-volume-ubootenv2 {
volname = "ubootenv2";
nvmem-layout {
compatible = "u-boot,env-redundant-bool-layout";
};
};
ubi_rootfs: ubi-volume-fit {
volname = "fit";
};
};
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&xphy {
status = "okay";
};

View File

@ -1158,28 +1158,28 @@
#address-cells = <1>;
#size-cells = <0>;
port@0 {
gsw_port0: port@0 {
reg = <0>;
label = "lan0";
phy-mode = "internal";
phy-handle = <&gsw_phy0>;
};
port@1 {
gsw_port1: port@1 {
reg = <1>;
label = "lan1";
phy-mode = "internal";
phy-handle = <&gsw_phy1>;
};
port@2 {
gsw_port2: port@2 {
reg = <2>;
label = "lan2";
phy-mode = "internal";
phy-handle = <&gsw_phy2>;
};
port@3 {
gsw_port3: port@3 {
reg = <3>;
label = "lan3";
phy-mode = "internal";

View File

@ -9,6 +9,13 @@ case $board in
abt,asr3000)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
;;
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
ucidef_set_led_netdev "wan" "wan" "mt7530-0:00:green:lan" "wan" "link tx rx"
ucidef_set_led_netdev "lan1" "lan1" "mt7530-0:01:green:lan" "lan1" "link tx rx"
ucidef_set_led_netdev "lan2" "lan2" "mt7530-0:02:green:lan" "lan2" "link tx rx"
ucidef_set_led_netdev "lan3" "lan3" "mt7530-0:03:green:lan" "lan3" "link tx rx"
;;
hf,m7986r1*)
ucidef_set_led_netdev "led-1" "LAN1" "led-1" "lan1"
ucidef_set_led_netdev "led-2" "LAN2" "led-2" "lan2"

View File

@ -24,6 +24,10 @@ mediatek_setup_interfaces()
bananapi,bpi-r3)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
;;
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 eth1" "wan eth2"
;;
cetron,ct3003*|\
fzs,5gcpe-p3|\
jcg,q30-pro|\
@ -78,7 +82,8 @@ mediatek_setup_macs()
wan_mac="${addr}"
lan_mac="${addr}"
;;
bananapi,bpi-r3)
bananapi,bpi-r3|\
bananapi,bpi-r4)
wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1)
;;
cmcc,rax3000m-emmc)

View File

@ -29,6 +29,13 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
;;
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
addr=$(cat /sys/class/net/eth0/address)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "2" ] && macaddr_add $addr 4 > /sys${DEVPATH}/macaddress
;;
cetron,ct3003*)
addr=$(mtd_get_mac_binary "art" 0)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress

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@ -20,7 +20,9 @@ platform_do_upgrade() {
CI_KERNPART="linux"
nand_do_upgrade "$1"
;;
bananapi,bpi-r3)
bananapi,bpi-r3|\
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
local rootdev="$(cmdline_get_var root)"
rootdev="${rootdev##*/}"
rootdev="${rootdev%p[0-9]*}"
@ -63,7 +65,9 @@ platform_check_image() {
[ "$#" -gt 1 ] && return 1
case "$board" in
bananapi,bpi-r3)
bananapi,bpi-r3|\
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
return 1
@ -72,7 +76,7 @@ platform_check_image() {
;;
*)
nand_do_platform_check "$board" "$1"
return 0
return $?
;;
esac
@ -81,7 +85,9 @@ platform_check_image() {
platform_copy_config() {
case "$(board_name)" in
bananapi,bpi-r3)
bananapi,bpi-r3|\
bananapi,bpi-r4|\
bananapi,bpi-r4-poe)
case "$(cmdline_get_var root)" in
/dev/mmc*)
emmc_copy_config
@ -95,7 +101,7 @@ platform_copy_config() {
emmc_copy_config
;;
esac
}
}
platform_pre_upgrade() {
local board=$(board_name)

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@ -1,6 +1,6 @@
CONFIG_64BIT=y
# CONFIG_AHCI_MTK is not set
CONFIG_AQUANTIA_PHY=y
CONFIG_AIROHA_EN8801SC_PHY=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
@ -44,6 +44,7 @@ CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_NVMEM=y
CONFIG_BLK_PM=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
@ -95,6 +96,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_THERMAL=y
CONFIG_CRC16=y
CONFIG_CRC_CCITT=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
@ -250,6 +252,7 @@ CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_NVMEM=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
# CONFIG_MTK_CMDQ is not set
# CONFIG_MTK_CQDMA is not set
@ -283,6 +286,7 @@ CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_MTK_EFUSE=y
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
@ -453,6 +457,7 @@ CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
# CONFIG_UCLAMP_TASK is not set
CONFIG_UIMAGE_FIT_BLK=y
# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
CONFIG_USB_SUPPORT=y
CONFIG_VMAP_STACK=y

View File

@ -30,7 +30,7 @@ define Build/mt7988-bl31-uboot
cat $(STAGING_DIR_IMAGE)/mt7988_$1-u-boot.fip >> $@
endef
define Build/mt7986-gpt
define Build/mt798x-gpt
cp $@ $@.tmp 2>/dev/null || true
ptgen -g -o $@.tmp -a 1 -l 1024 \
$(if $(findstring sdmmc,$1), \
@ -147,6 +147,64 @@ define Device/bananapi_bpi-r3
endef
TARGET_DEVICES += bananapi_bpi-r3
define Device/bananapi_bpi-r4-common
DEVICE_VENDOR := Bananapi
DEVICE_DTS_DIR := $(DTS_DIR)/
DEVICE_DTS_LOADADDR := 0x45f00000
DEVICE_DTS_OVERLAY:= mt7988a-bananapi-bpi-r4-emmc mt7988a-bananapi-bpi-r4-rtc mt7988a-bananapi-bpi-r4-sd mt7988a-bananapi-bpi-r4-wifi-mt7996a
DEVICE_DTC_FLAGS := --pad 4096
DEVICE_PACKAGES := kmod-hwmon-pwmfan kmod-i2c-mux-pca954x kmod-eeprom-at24 kmod-mt7996-firmware \
kmod-rtc-pcf8563 kmod-sfp kmod-usb3 e2fsprogs f2fsck mkf2fs
IMAGES := sysupgrade.itb
KERNEL_LOADADDR := 0x46000000
KERNEL_INITRAMFS_SUFFIX := -recovery.itb
ARTIFACTS := \
emmc-preloader.bin emmc-bl31-uboot.fip \
sdcard.img.gz \
snand-preloader.bin snand-bl31-uboot.fip
ARTIFACT/emmc-preloader.bin := mt7988-bl2 emmc-comb
ARTIFACT/emmc-bl31-uboot.fip := mt7988-bl31-uboot $$(DEVICE_NAME)-emmc
ARTIFACT/snand-preloader.bin := mt7988-bl2 spim-nand-ubi-comb
ARTIFACT/snand-bl31-uboot.fip := mt7988-bl31-uboot $$(DEVICE_NAME)-snand
ARTIFACT/sdcard.img.gz := mt798x-gpt sdmmc |\
pad-to 17k | mt7988-bl2 sdmmc-comb |\
pad-to 6656k | mt7988-bl31-uboot $$(DEVICE_NAME)-sdmmc |\
$(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\
pad-to 12M | append-image-stage initramfs-recovery.itb | check-size 44m |\
) \
pad-to 44M | mt7988-bl2 spim-nand-ubi-comb |\
pad-to 45M | mt7988-bl31-uboot $$(DEVICE_NAME)-snand |\
pad-to 51M | mt7988-bl2 emmc-comb |\
pad-to 52M | mt7988-bl31-uboot $$(DEVICE_NAME)-emmc |\
pad-to 56M | mt798x-gpt emmc |\
$(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\
pad-to 64M | append-image squashfs-sysupgrade.itb | check-size |\
) \
gzip
IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | pad-rootfs | append-metadata
endef
define Device/bananapi_bpi-r4
DEVICE_MODEL := BPi-R4
DEVICE_DTS := mt7988a-bananapi-bpi-r4
DEVICE_DTS_CONFIG := config-mt7988a-bananapi-bpi-r4
$(call Device/bananapi_bpi-r4-common)
endef
TARGET_DEVICES += bananapi_bpi-r4
define Device/bananapi_bpi-r4-poe
DEVICE_MODEL := BPi-R4 2.5GE
DEVICE_DTS := mt7988a-bananapi-bpi-r4-poe
DEVICE_DTS_CONFIG := config-mt7988a-bananapi-bpi-r4-poe
$(call Device/bananapi_bpi-r4-common)
DEVICE_PACKAGES += mt7988-2p5g-phy-firmware
endef
TARGET_DEVICES += bananapi_bpi-r4-poe
define Device/cetron_ct3003
DEVICE_VENDOR := Cetron
DEVICE_MODEL := CT3003