mediatek: add Xiaomi AX3000T support

This commit is contained in:
AmadeusGhost 2023-09-15 23:06:10 +08:00
parent 36bd1e35ad
commit 02b57804f8
7 changed files with 327 additions and 250 deletions

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@ -35,6 +35,7 @@ bananapi,bpi-r3)
esac esac
;; ;;
xiaomi,mi-router-wr30u|\ xiaomi,mi-router-wr30u|\
xiaomi,mi-router-ax3000t|\
xiaomi,redmi-router-ax6000) xiaomi,redmi-router-ax6000)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x20000" ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x20000"
ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x10000" "0x20000" ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x10000" "0x20000"

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@ -0,0 +1,49 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981b-xiaomi_mi-router.dtsi"
/ {
model = "Xiaomi Mi Router AX3000T";
compatible = "xiaomi,mi-router-ax3000t", "mediatek,mt7981";
};
&gmac0 {
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(-2)>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
status = "okay";
nfc@57 {
compatible = "nt082c";
reg = <0x57>;
};
};
&partitions {
partition@600000 {
label = "ubi";
reg = <0x0600000 0x6400000>;
};
partition@6a00000 {
label = "data";
reg = <0x6a00000 0x0c00000>;
read-only;
};
};
&pio {
i2c_pins: i2c-pins {
mux {
function = "i2c";
groups = "i2c0_1";
};
};
};

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@ -1,265 +1,35 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/; /dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7981.dtsi" #include "mt7981b-xiaomi_mi-router.dtsi"
/ { / {
model = "Xiaomi Mi Router WR30U"; model = "Xiaomi Mi Router WR30U";
compatible = "xiaomi,mi-router-wr30u", "mediatek,mt7981"; compatible = "xiaomi,mi-router-wr30u", "mediatek,mt7981";
};
aliases { &gmac0 {
serial0 = &uart0; nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(-1)>;
};
led-boot = &led_system_orange; &leds {
led-failsafe = &led_system_blue; internet_blue {
led-running = &led_system_blue; label = "blue:internet";
led-upgrade = &led_system_orange; gpios = <&pio 11 GPIO_ACTIVE_LOW>;
}; };
chosen { internet_orange {
stdout-path = "serial0:115200n8"; label = "orange:internet";
}; gpios = <&pio 12 GPIO_ACTIVE_LOW>;
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
mesh {
label = "mesh";
linux,code = <BTN_9>;
linux,input-type = <EV_SW>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_system_blue: system_blue {
label = "blue:system";
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led_system_orange: system_orange {
label = "orange:system";
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
internet_blue {
label = "blue:internet";
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
internet_orange {
label = "orange:internet";
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
}; };
}; };
&eth { &partitions {
status = "okay"; partition@600000 {
label = "ubi";
gmac0: mac@0 { reg = <0x600000 0x7000000>;
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(-1)>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
}; };
}; };
&mdio_bus {
switch: switch@0 {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "Nvram";
reg = <0x0100000 0x0040000>;
read-only;
};
partition@140000 {
label = "Bdata";
reg = <0x0140000 0x0040000>;
read-only;
};
factory: partition@180000 {
label = "Factory";
reg = <0x0180000 0x0200000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@380000 {
label = "FIP";
reg = <0x0380000 0x0200000>;
read-only;
};
partition@580000 {
label = "crash";
reg = <0x0580000 0x0040000>;
read-only;
};
partition@5c0000 {
label = "crash_log";
reg = <0x05c0000 0x0040000>;
read-only;
};
partition@600000 {
label = "ubi";
reg = <0x0600000 0x7000000>;
};
partition@7600000 {
label = "KF";
reg = <0x7600000 0x0040000>;
read-only;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "wan";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};

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@ -0,0 +1,241 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7981.dtsi"
/ {
aliases {
serial0 = &uart0;
led-boot = &led_system_orange;
led-failsafe = &led_system_blue;
led-running = &led_system_blue;
led-upgrade = &led_system_orange;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
mesh {
label = "mesh";
linux,code = <BTN_9>;
linux,input-type = <EV_SW>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
leds: leds {
compatible = "gpio-leds";
led_system_blue: system_blue {
label = "blue:system";
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led_system_orange: system_orange {
label = "orange:system";
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@0 {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "Nvram";
reg = <0x0100000 0x0040000>;
read-only;
};
partition@140000 {
label = "Bdata";
reg = <0x0140000 0x0040000>;
read-only;
};
factory: partition@180000 {
label = "Factory";
reg = <0x0180000 0x0200000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@380000 {
label = "FIP";
reg = <0x0380000 0x0200000>;
read-only;
};
partition@580000 {
label = "crash";
reg = <0x0580000 0x0040000>;
read-only;
};
partition@5c0000 {
label = "crash_log";
reg = <0x05c0000 0x0040000>;
read-only;
};
partition@7600000 {
label = "KF";
reg = <0x7600000 0x0040000>;
read-only;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "wan";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};

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@ -14,7 +14,7 @@ mediatek_setup_interfaces()
bananapi,bpi-r3) bananapi,bpi-r3)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan" ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
;; ;;
cetron,ct3003|\ cetron,ct3003*|\
jcg,q30-pro|\ jcg,q30-pro|\
qihoo,360t7) qihoo,360t7)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
@ -40,6 +40,7 @@ mediatek_setup_interfaces()
ucidef_set_interfaces_lan_wan "lan1 lan2" eth1 ucidef_set_interfaces_lan_wan "lan1 lan2" eth1
;; ;;
xiaomi,mi-router-wr30u|\ xiaomi,mi-router-wr30u|\
xiaomi,mi-router-ax3000t|\
xiaomi,redmi-router-ax6000) xiaomi,redmi-router-ax6000)
ucidef_set_interfaces_lan_wan "lan2 lan3 lan4" wan ucidef_set_interfaces_lan_wan "lan2 lan3 lan4" wan
;; ;;
@ -82,6 +83,7 @@ mediatek_setup_macs()
label_mac=$wan_mac label_mac=$wan_mac
;; ;;
xiaomi,mi-router-wr30u|\ xiaomi,mi-router-wr30u|\
xiaomi,mi-router-ax3000t|\
xiaomi,redmi-router-ax6000) xiaomi,redmi-router-ax6000)
wan_mac=$(mtd_get_mac_ascii Bdata ethaddr_wan) wan_mac=$(mtd_get_mac_ascii Bdata ethaddr_wan)
label_mac=$wan_mac label_mac=$wan_mac

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@ -24,7 +24,7 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_unsetbit $addr 6 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "0" ] && macaddr_unsetbit $addr 6 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress
;; ;;
cetron,ct3003) cetron,ct3003*)
addr=$(mtd_get_mac_binary "art" 0) addr=$(mtd_get_mac_binary "art" 0)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress

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@ -319,6 +319,20 @@ define Device/tplink_tl-xdr6088
endef endef
TARGET_DEVICES += tplink_tl-xdr6088 TARGET_DEVICES += tplink_tl-xdr6088
define Device/xiaomi_mi-router-ax3000t
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := Mi Router AX3000T
DEVICE_DTS := mt7981b-xiaomi-ax3000t
DEVICE_DTS_DIR := ../dts
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += xiaomi_mi-router-ax3000t
define Device/xiaomi_mi-router-wr30u define Device/xiaomi_mi-router-wr30u
DEVICE_VENDOR := Xiaomi DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := Mi Router WR30U DEVICE_MODEL := Mi Router WR30U