From 013f9813420a06ab4bc15364167bddaf10b5a00d Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Mon, 22 May 2023 13:16:02 +0800 Subject: [PATCH] x64: add support to load GuC and HuC firmware for DG1/DG1 Max --- .../x86/patches-6.1/900-dg1-guc-and-huc-support.patch | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 target/linux/x86/patches-6.1/900-dg1-guc-and-huc-support.patch diff --git a/target/linux/x86/patches-6.1/900-dg1-guc-and-huc-support.patch b/target/linux/x86/patches-6.1/900-dg1-guc-and-huc-support.patch new file mode 100644 index 000000000..72cb671c0 --- /dev/null +++ b/target/linux/x86/patches-6.1/900-dg1-guc-and-huc-support.patch @@ -0,0 +1,11 @@ +--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c ++++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +@@ -98,7 +98,7 @@ + fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ + fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ +- fw_def(DG1, 0, huc_raw(dg1)) \ ++ fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ + fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ + fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ + fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \