From 006ca1d9b401d604256076d8ab69c41fee94a79a Mon Sep 17 00:00:00 2001 From: AmadeusGhost <42570690+AmadeusGhost@users.noreply.github.com> Date: Fri, 3 Dec 2021 12:10:06 +0800 Subject: [PATCH] r8125: update to 9.007.01 (#8380) --- package/lean/r8125/Makefile | 2 +- package/lean/r8125/src/Makefile | 0 package/lean/r8125/src/Makefile_linux24x | 0 package/lean/r8125/src/r8125.h | 12 +- package/lean/r8125/src/r8125_dash.h | 0 package/lean/r8125/src/r8125_firmware.c | 0 package/lean/r8125/src/r8125_firmware.h | 0 package/lean/r8125/src/r8125_n.c | 502 +++++++++++++++++++---- package/lean/r8125/src/r8125_ptp.c | 0 package/lean/r8125/src/r8125_ptp.h | 0 package/lean/r8125/src/r8125_realwow.h | 0 package/lean/r8125/src/r8125_rss.c | 0 package/lean/r8125/src/r8125_rss.h | 0 package/lean/r8125/src/rtl_eeprom.c | 0 package/lean/r8125/src/rtl_eeprom.h | 0 package/lean/r8125/src/rtltool.c | 0 package/lean/r8125/src/rtltool.h | 0 17 files changed, 426 insertions(+), 90 deletions(-) mode change 100755 => 100644 package/lean/r8125/src/Makefile mode change 100755 => 100644 package/lean/r8125/src/Makefile_linux24x mode change 100755 => 100644 package/lean/r8125/src/r8125.h mode change 100755 => 100644 package/lean/r8125/src/r8125_dash.h mode change 100755 => 100644 package/lean/r8125/src/r8125_firmware.c mode change 100755 => 100644 package/lean/r8125/src/r8125_firmware.h mode change 100755 => 100644 package/lean/r8125/src/r8125_n.c mode change 100755 => 100644 package/lean/r8125/src/r8125_ptp.c mode change 100755 => 100644 package/lean/r8125/src/r8125_ptp.h mode change 100755 => 100644 package/lean/r8125/src/r8125_realwow.h mode change 100755 => 100644 package/lean/r8125/src/r8125_rss.c mode change 100755 => 100644 package/lean/r8125/src/r8125_rss.h mode change 100755 => 100644 package/lean/r8125/src/rtl_eeprom.c mode change 100755 => 100644 package/lean/r8125/src/rtl_eeprom.h mode change 100755 => 100644 package/lean/r8125/src/rtltool.c mode change 100755 => 100644 package/lean/r8125/src/rtltool.h diff --git a/package/lean/r8125/Makefile b/package/lean/r8125/Makefile index e9b213c6e..302276fdf 100644 --- a/package/lean/r8125/Makefile +++ b/package/lean/r8125/Makefile @@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=r8125 -PKG_VERSION:=9.006.04 +PKG_VERSION:=9.007.01 PKG_RELEASE:=$(AUTORELEASE) PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) diff --git a/package/lean/r8125/src/Makefile b/package/lean/r8125/src/Makefile old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/Makefile_linux24x b/package/lean/r8125/src/Makefile_linux24x old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125.h b/package/lean/r8125/src/r8125.h old mode 100755 new mode 100644 index 4875ccca4..8b4085c40 --- a/package/lean/r8125/src/r8125.h +++ b/package/lean/r8125/src/r8125.h @@ -363,7 +363,7 @@ do { \ #define RSS_SUFFIX "" #endif -#define RTL8125_VERSION "9.006.04" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX +#define RTL8125_VERSION "9.007.01" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX #define MODULENAME "r8125" #define PFX MODULENAME ": " @@ -557,6 +557,8 @@ This is free software, and you are welcome to redistribute it under certain cond #define D0_SPEED_UP_SPEED_1000 1 #define D0_SPEED_UP_SPEED_2500 2 +#define RTL8125_MAC_MCU_PAGE_SIZE 256 //256 words + #ifndef WRITE_ONCE #define WRITE_ONCE(var, val) (*((volatile typeof(val) *)(&(var))) = (val)) #endif @@ -2010,7 +2012,9 @@ struct rtl8125_private { unsigned int min_irq_nvecs; //struct msix_entry msix_entries[R8125_MAX_MSIX_VEC]; struct net_device_stats stats; /* statistics of net device */ +#ifdef ENABLE_PTP_SUPPORT spinlock_t lock; /* spin lock flag */ +#endif u32 msg_enable; u32 tx_tcp_csum_cmd; u32 tx_udp_csum_cmd; @@ -2301,6 +2305,9 @@ struct rtl8125_private { u8 rss_indir_tbl[RTL8125_MAX_INDIRECTION_TABLE_ENTRIES]; u32 rss_options; #endif + + u8 HwSuppMacMcuVer; + u16 MacMcuPageSize; }; #ifdef ENABLE_LIB_SUPPORT @@ -2366,6 +2373,8 @@ enum mcfg { CFG_METHOD_3, CFG_METHOD_4, CFG_METHOD_5, + CFG_METHOD_6, + CFG_METHOD_7, CFG_METHOD_DEFAULT, CFG_METHOD_MAX }; @@ -2497,6 +2506,7 @@ static inline void rtl8125_lib_reset_complete(struct rtl8125_private *tp) { } #define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 ) #define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0) #define HW_SUPPORT_D0_SPEED_UP(_M) ((_M)->HwSuppD0SpeedUpVer > 0) +#define HW_SUPPORT_MAC_MCU(_M) ((_M)->HwSuppMacMcuVer > 0) #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) #define netdev_mc_count(dev) ((dev)->mc_count) diff --git a/package/lean/r8125/src/r8125_dash.h b/package/lean/r8125/src/r8125_dash.h old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125_firmware.c b/package/lean/r8125/src/r8125_firmware.c old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125_firmware.h b/package/lean/r8125/src/r8125_firmware.h old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125_n.c b/package/lean/r8125/src/r8125_n.c old mode 100755 new mode 100644 index fd96e8f8e..ec117a766 --- a/package/lean/r8125/src/r8125_n.c +++ b/package/lean/r8125/src/r8125_n.c @@ -106,6 +106,8 @@ static const struct { [CFG_METHOD_3] = {"RTL8125A", FIRMWARE_8125A_3}, [CFG_METHOD_4] = {"RTL8125B", }, [CFG_METHOD_5] = {"RTL8125B", FIRMWARE_8125B_2}, + [CFG_METHOD_6] = {"RTL8168KB", FIRMWARE_8125A_3}, + [CFG_METHOD_7] = {"RTL8168KB", FIRMWARE_8125B_2}, [CFG_METHOD_DEFAULT] = {"Unknown", }, }; @@ -143,6 +145,18 @@ static const struct { 0xff7e5880, Jumbo_Frame_9k), + _R("RTL8168KB", + CFG_METHOD_6, + BIT_30 | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + + _R("RTL8168KB", + CFG_METHOD_7, + BIT_30 | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + _R("Unknown", CFG_METHOD_DEFAULT, (RX_DMA_BURST << RxCfgDMAShift), @@ -158,6 +172,7 @@ static const struct { static struct pci_device_id rtl8125_pci_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8125), }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8162), }, { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x3000), }, {0,}, }; @@ -646,6 +661,7 @@ static u32 rtl8125_read_thermal_sensor(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: ts_digout = mdio_direct_read_phy_ocp(tp, 0xBD84); ts_digout &= 0x3ff; break; @@ -1049,6 +1065,7 @@ static int proc_get_temperature(struct seq_file *m, void *v) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: seq_puts(m, "\nChip Temperature\n"); break; default: @@ -1668,6 +1685,7 @@ static int proc_get_temperature(char *page, char **start, switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: len += snprintf(page + len, count - len, "\nChip Temperature\n"); break; @@ -2250,6 +2268,8 @@ void rtl8125_oob_mutex_lock(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: default: ocp_reg_mutex_oob = 0x110; ocp_reg_mutex_ib = 0x114; @@ -2299,6 +2319,8 @@ void rtl8125_oob_mutex_unlock(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: default: ocp_reg_mutex_oob = 0x110; ocp_reg_mutex_ib = 0x114; @@ -2794,6 +2816,8 @@ rtl8125_enable_rxdvgate(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3); mdelay(2); break; @@ -2810,6 +2834,8 @@ rtl8125_disable_rxdvgate(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3); mdelay(2); break; @@ -2879,6 +2905,7 @@ rtl8125_stop_all_request(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_6: for (i = 0; i < 20; i++) { udelay(10); if (!(RTL_R8(tp, ChipCmd) & StopReq)) break; @@ -2901,6 +2928,7 @@ rtl8125_wait_txrx_fifo_empty(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: rtl8125_stop_all_request(dev); break; } @@ -2910,6 +2938,8 @@ rtl8125_wait_txrx_fifo_empty(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: for (i = 0; i < 3000; i++) { udelay(50); if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty)) @@ -2921,6 +2951,7 @@ rtl8125_wait_txrx_fifo_empty(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: for (i = 0; i < 3000; i++) { udelay(50); if ((RTL_R16(tp, IntrMitigate) & (BIT_0 | BIT_1 | BIT_8)) == (BIT_0 | BIT_1 | BIT_8)) @@ -3132,6 +3163,8 @@ rtl8125_hw_clear_timer_int(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W32(tp, TIMER_INT0_8125, 0x0000); RTL_W32(tp, TIMER_INT1_8125, 0x0000); RTL_W32(tp, TIMER_INT2_8125, 0x0000); @@ -3306,6 +3339,8 @@ rtl8125_issue_offset_99_event(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xE09A, rtl8125_mac_ocp_read(tp, 0xE09A) | BIT_0); break; } @@ -3337,6 +3372,8 @@ static int rtl8125_enable_eee_plus(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xE080, rtl8125_mac_ocp_read(tp, 0xE080)|BIT_1); break; @@ -3359,6 +3396,8 @@ static int rtl8125_disable_eee_plus(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xE080, rtl8125_mac_ocp_read(tp, 0xE080)&~BIT_1); break; @@ -3389,7 +3428,9 @@ rtl8125_link_on_patch(struct net_device *dev) if ((tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) && + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) && (RTL_R8(tp, PHYstatus) & _10bps)) rtl8125_enable_eee_plus(tp); @@ -3418,7 +3459,9 @@ rtl8125_link_down_patch(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) rtl8125_disable_eee_plus(tp); netif_tx_stop_all_queues(dev); @@ -3472,6 +3515,38 @@ rtl8125_check_link_status(struct net_device *dev) tp->resume_not_chg_speed = 0; } +static void +rtl8125_link_option_giga(u8 *aut, + u32 *spd, + u8 *dup, + u32 *adv) +{ + if ((*spd != SPEED_1000) && + (*spd != SPEED_100) && + (*spd != SPEED_10)) + *spd = SPEED_1000; + + if ((*dup != DUPLEX_FULL) && (*dup != DUPLEX_HALF)) + *dup = DUPLEX_FULL; + + if ((*aut != AUTONEG_ENABLE) && (*aut != AUTONEG_DISABLE)) + *aut = AUTONEG_ENABLE; + + *adv &= (ADVERTISED_10baseT_Half | + ADVERTISED_10baseT_Full | + ADVERTISED_100baseT_Half | + ADVERTISED_100baseT_Full | + ADVERTISED_1000baseT_Half | + ADVERTISED_1000baseT_Full); + if (*adv == 0) + *adv = (ADVERTISED_10baseT_Half | + ADVERTISED_10baseT_Full | + ADVERTISED_100baseT_Half | + ADVERTISED_100baseT_Full | + ADVERTISED_1000baseT_Half | + ADVERTISED_1000baseT_Full); +} + static void rtl8125_link_option(u8 *aut, u32 *spd, @@ -3515,7 +3590,9 @@ rtl8125_enable_ocp_phy_power_saving(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) { + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) { val = mdio_direct_read_phy_ocp(tp, 0xC416); if (val != 0x0050) { rtl8125_set_phy_mcu_patch_request(tp); @@ -3536,7 +3613,9 @@ rtl8125_disable_ocp_phy_power_saving(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) { + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) { val = mdio_direct_read_phy_ocp(tp, 0xC416); if (val != 0x0500) { rtl8125_set_phy_mcu_patch_request(tp); @@ -3568,6 +3647,8 @@ rtl8125_disable_pci_offset_99(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xE032, rtl8125_mac_ocp_read(tp, 0xE032) & ~(BIT_0 | BIT_1)); break; } @@ -3577,6 +3658,8 @@ rtl8125_disable_pci_offset_99(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_csi_fun0_write_byte(tp, 0x99, 0x00); break; } @@ -3592,6 +3675,8 @@ rtl8125_enable_pci_offset_99(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99); break; } @@ -3601,6 +3686,8 @@ rtl8125_enable_pci_offset_99(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE032); csi_tmp &= ~(BIT_0 | BIT_1); if (tp->org_pci_offset_99 & (BIT_5 | BIT_6)) @@ -3622,6 +3709,8 @@ rtl8125_init_pci_offset_99(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xCDD0, 0x9003); csi_tmp = rtl8125_mac_ocp_read(tp, 0xE034); csi_tmp |= (BIT_15 | BIT_14); @@ -3660,6 +3749,8 @@ rtl8125_disable_pci_offset_180(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE092); csi_tmp &= 0xFF00; rtl8125_mac_ocp_write(tp, 0xE092, csi_tmp); @@ -3677,6 +3768,8 @@ rtl8125_enable_pci_offset_180(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE094); csi_tmp &= 0x00FF; rtl8125_mac_ocp_write(tp, 0xE094, csi_tmp); @@ -3688,6 +3781,8 @@ rtl8125_enable_pci_offset_180(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: csi_tmp = rtl8125_mac_ocp_read(tp, 0xE092); csi_tmp &= 0xFF00; csi_tmp |= BIT_2; @@ -3715,7 +3810,11 @@ rtl8125_set_pci_99_180_exit_driver_para(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: - rtl8125_issue_offset_99_event(tp); + case CFG_METHOD_6: + case CFG_METHOD_7: + if (tp->org_pci_offset_99 & BIT_2) + rtl8125_issue_offset_99_event(tp); + rtl8125_disable_pci_offset_99(tp); break; } @@ -3724,14 +3823,8 @@ rtl8125_set_pci_99_180_exit_driver_para(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: - rtl8125_disable_pci_offset_99(tp); - break; - } - switch (tp->mcfg) { - case CFG_METHOD_2: - case CFG_METHOD_3: - case CFG_METHOD_4: - case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_disable_pci_offset_180(tp); break; } @@ -3795,6 +3888,8 @@ rtl8125_hw_d3_para(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); rtl8125_enable_cfg9346_write(tp); RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); @@ -3814,6 +3909,8 @@ rtl8125_hw_d3_para(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xEA18, 0x0064); break; } @@ -3824,7 +3921,9 @@ rtl8125_hw_d3_para(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) rtl8125_disable_ocp_phy_power_saving(dev); rtl8125_disable_rxdvgate(dev); @@ -4182,7 +4281,9 @@ rtl8125_powerdown_pll(struct net_device *dev, u8 from_suspend) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) { + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) { rtl8125_enable_cfg9346_write(tp); RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En); rtl8125_disable_cfg9346_write(tp); @@ -4219,6 +4320,8 @@ rtl8125_powerdown_pll(struct net_device *dev, u8 from_suspend) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7); break; } @@ -4229,6 +4332,8 @@ rtl8125_powerdown_pll(struct net_device *dev, u8 from_suspend) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6); break; } @@ -4243,6 +4348,8 @@ static void rtl8125_powerup_pll(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6); break; } @@ -4617,7 +4724,9 @@ rtl8125_vlan_rx_register(struct net_device *dev, if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) { + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) { if (tp->vlgrp) { tp->rtl8125_rx_config |= (EnableInnerVlan | EnableOuterVlan); RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | (EnableInnerVlan | EnableOuterVlan)) @@ -4789,6 +4898,9 @@ static void rtl8125_gset_xmii(struct net_device *dev, SUPPORTED_Pause | SUPPORTED_Asym_Pause; + if (tp->mcfg == CFG_METHOD_6 || tp->mcfg == CFG_METHOD_7) + supported &= ~SUPPORTED_2500baseX_Full; + advertising = ADVERTISED_TP; rtl8125_mdio_write(tp, 0x1F, 0x0000); @@ -4968,6 +5080,8 @@ static void rtl8125_get_regs(struct net_device *dev, struct ethtool_regs *regs, case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: default: for (i = 0; i < R8125_ERI_REGS_SIZE; i+=4) { *(u32*)data = rtl8125_eri_read(tp, i , 4, ERIAR_ExGMAC); @@ -5164,7 +5278,7 @@ rtl8125_get_strings(struct net_device *dev, { switch (stringset) { case ETH_SS_STATS: - memcpy(data, *rtl8125_gstrings, sizeof(rtl8125_gstrings)); + memcpy(data, rtl8125_gstrings, sizeof(rtl8125_gstrings)); break; } } @@ -5199,6 +5313,8 @@ static int rtl_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: default: VPD_addr = 0xD2; VPD_data = 0xD4; @@ -5290,6 +5406,7 @@ static int rtl8125_enable_eee(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_6: RTL_W16(tp, EEE_TXIDLE_TIMER_8125, eee->tx_lpi_timer); SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); @@ -5305,6 +5422,7 @@ static int rtl8125_enable_eee(struct rtl8125_private *tp) break; case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: RTL_W16(tp, EEE_TXIDLE_TIMER_8125, eee->tx_lpi_timer); SetMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); @@ -5331,6 +5449,8 @@ static int rtl8125_enable_eee(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_set_phy_mcu_patch_request(tp); ClearMcuAccessRegBit(tp, 0xE052, BIT_0); ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13); @@ -5350,6 +5470,7 @@ static int rtl8125_disable_eee(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_6: ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); ClearMcuAccessRegBit(tp, 0xEB62, (BIT_2|BIT_1)); @@ -5363,6 +5484,7 @@ static int rtl8125_disable_eee(struct rtl8125_private *tp) break; case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: ClearMcuAccessRegBit(tp, 0xE040, (BIT_1|BIT_0)); ClearEthPhyOcpBit(tp, 0xA5D0, (BIT_2 | BIT_1)); @@ -5384,6 +5506,8 @@ static int rtl8125_disable_eee(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_set_phy_mcu_patch_request(tp); ClearMcuAccessRegBit(tp, 0xE052, BIT_0); ClearEthPhyOcpBit(tp, 0xA442, BIT_12 | BIT_13); @@ -5644,6 +5768,8 @@ static int rtl8125_enable_green_feature(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: mdio_direct_write_phy_ocp(tp, 0xA436, 0x8011); SetEthPhyOcpBit(tp, 0xA438, BIT_15); rtl8125_mdio_write(tp, 0x00, 0x9200); @@ -5665,6 +5791,8 @@ static int rtl8125_disable_green_feature(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: mdio_direct_write_phy_ocp(tp, 0xA436, 0x8011); ClearEthPhyOcpBit(tp, 0xA438, BIT_15); rtl8125_mdio_write(tp, 0x00, 0x9200); @@ -5683,6 +5811,7 @@ static void rtl8125_get_mac_version(struct rtl8125_private *tp) { u32 reg,val32; u32 ICVerID; + struct pci_dev *pdev = tp->pci_dev; val32 = RTL_R32(tp, TxConfig); reg = val32 & 0x7c800000; @@ -5720,6 +5849,13 @@ static void rtl8125_get_mac_version(struct rtl8125_private *tp) tp->efuse_ver = EFUSE_NOT_SUPPORT; break; } + + if (pdev->subsystem_vendor == 0x8162) { + if (tp->mcfg == CFG_METHOD_3) + tp->mcfg = CFG_METHOD_6; + else if (tp->mcfg == CFG_METHOD_5) + tp->mcfg = CFG_METHOD_7; + } } static void @@ -5765,6 +5901,7 @@ rtl8125_clear_phy_ups_reg(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: ClearEthPhyOcpBit(tp, 0xA466, BIT_0); break; }; @@ -5779,7 +5916,9 @@ rtl8125_is_ups_resume(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) return (rtl8125_mac_ocp_read(tp, 0xD42C) & BIT_8); return 0; @@ -5793,7 +5932,9 @@ rtl8125_clear_ups_resume_bit(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) rtl8125_mac_ocp_write(tp, 0xD408, rtl8125_mac_ocp_read(tp, 0xD408) & ~(BIT_8)); } @@ -5807,7 +5948,9 @@ rtl8125_wait_phy_ups_resume(struct net_device *dev, u16 PhyState) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) { + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) { do { TmpPhyState = mdio_direct_read_phy_ocp(tp, 0xA420); TmpPhyState &= 0x7; @@ -5848,8 +5991,7 @@ rtl8125_exit_oob(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - case CFG_METHOD_4: - case CFG_METHOD_5: + case CFG_METHOD_6: rtl8125_dash2_disable_txrx(dev); break; } @@ -5871,6 +6013,8 @@ rtl8125_exit_oob(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xC0BC, 0x00FF); break; } @@ -5883,6 +6027,8 @@ rtl8125_exit_oob(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_disable_now_is_oob(tp); data16 = rtl8125_mac_ocp_read(tp, 0xE8DE) & ~BIT_14; @@ -5903,6 +6049,8 @@ rtl8125_exit_oob(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: if (rtl8125_is_ups_resume(dev)) { rtl8125_wait_phy_ups_resume(dev, 2); rtl8125_clear_ups_resume_bit(dev); @@ -5915,6 +6063,8 @@ rtl8125_exit_oob(struct net_device *dev) void rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) { + u16 regAddr; + struct rtl8125_private *tp = netdev_priv(dev); switch (tp->mcfg) { @@ -5922,6 +6072,8 @@ rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_enable_cfg9346_write(tp); RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); @@ -5934,7 +6086,9 @@ rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: - rtl8125_mac_ocp_write(tp, 0xFC38, 0x0000); + case CFG_METHOD_6: + case CFG_METHOD_7: + rtl8125_mac_ocp_write(tp, 0xFC48, 0x0000); break; } @@ -5943,21 +6097,72 @@ rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: - rtl8125_mac_ocp_write(tp, 0xFC28, 0x0000); - rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0000); - rtl8125_mac_ocp_write(tp, 0xFC2C, 0x0000); - rtl8125_mac_ocp_write(tp, 0xFC2E, 0x0000); - rtl8125_mac_ocp_write(tp, 0xFC30, 0x0000); - rtl8125_mac_ocp_write(tp, 0xFC32, 0x0000); - rtl8125_mac_ocp_write(tp, 0xFC34, 0x0000); - rtl8125_mac_ocp_write(tp, 0xFC36, 0x0000); + case CFG_METHOD_6: + case CFG_METHOD_7: + for (regAddr = 0xFC28; regAddr < 0xFC48; regAddr += 2) { + rtl8125_mac_ocp_write(tp, regAddr, 0x0000); + } + mdelay(3); + rtl8125_mac_ocp_write(tp, 0xFC26, 0x0000); break; } } #ifndef ENABLE_USE_FIRMWARE_FILE +static void +rtl8125_switch_mac_mcu_ram_code_page(struct rtl8125_private *tp, u16 page) +{ + u16 tmpUshort; + + page &= (BIT_1 | BIT_0); + tmpUshort = rtl8125_mac_ocp_read(tp, 0xE446); + tmpUshort &= ~(BIT_1 | BIT_0); + tmpUshort |= page; + rtl8125_mac_ocp_write(tp, 0xE446, tmpUshort); +} + +static void +_rtl8125_write_mac_mcu_ram_code(struct rtl8125_private *tp, const u16 *entry, u16 entry_cnt) +{ + u16 i; + + for (i = 0; i < entry_cnt; i++) { + rtl8125_mac_ocp_write(tp, 0xF800 + i * 2, entry[i]); + } +} + +static void +_rtl8125_write_mac_mcu_ram_code_with_page(struct rtl8125_private *tp, const u16 *entry, u16 entry_cnt, u16 page_size) +{ + u16 i; + u16 offset; + + if (page_size == 0) return; + + for (i = 0; i < entry_cnt; i++) { + offset = i % page_size; + if (offset == 0) { + u16 page = (i / page_size); + rtl8125_switch_mac_mcu_ram_code_page(tp, page); + } + rtl8125_mac_ocp_write(tp, 0xF800 + offset * 2, entry[i]); + } +} + +static void +rtl8125_write_mac_mcu_ram_code(struct rtl8125_private *tp, const u16 *entry, u16 entry_cnt) +{ + if (FALSE == HW_SUPPORT_MAC_MCU(tp)) return; + if (entry == NULL || entry_cnt == 0) return; + + if (tp->MacMcuPageSize > 0) + _rtl8125_write_mac_mcu_ram_code_with_page(tp, entry, entry_cnt, tp->MacMcuPageSize); + else + _rtl8125_write_mac_mcu_ram_code(tp, entry, entry_cnt); +} + static void rtl8125_set_mac_mcu_8125a_1(struct net_device *dev) { @@ -5968,49 +6173,55 @@ static void rtl8125_set_mac_mcu_8125a_2(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - u16 i; static const u16 mcu_patch_code_8125a_2[] = { - 0xE008, 0xE01E, 0xE02E, 0xE054, 0xE057, 0xE059, 0xE0C2, 0xE0CB, 0x9996, - 0x49D1, 0xF005, 0x49D4, 0xF10A, 0x49D8, 0xF108, 0xC00F, 0x7100, 0x209C, - 0x249C, 0xC009, 0x9900, 0xE004, 0xC006, 0x1900, 0x9900, 0xC602, 0xBE00, - 0x5A48, 0xE0C2, 0x0004, 0xE10A, 0xC60F, 0x73C4, 0x49B3, 0xF106, 0x73C2, - 0xC608, 0xB406, 0xC609, 0xFF80, 0xC605, 0xB406, 0xC605, 0xFF80, 0x0544, - 0x0568, 0xE906, 0xCDE8, 0xC724, 0xC624, 0x9EE2, 0x1E01, 0x9EE0, 0x76E0, - 0x49E0, 0xF1FE, 0x76E6, 0x486D, 0x4868, 0x9EE4, 0x1E03, 0x9EE0, 0x76E0, - 0x49E0, 0xF1FE, 0xC615, 0x9EE2, 0x1E01, 0x9EE0, 0x76E0, 0x49E0, 0xF1FE, - 0x76E6, 0x486F, 0x9EE4, 0x1E03, 0x9EE0, 0x76E0, 0x49E0, 0xF1FE, 0x7196, - 0xC702, 0xBF00, 0x5A44, 0xEB0E, 0x0070, 0x00C3, 0x1BC0, 0xC602, 0xBE00, - 0x0E26, 0xC602, 0xBE00, 0x0EBA, 0x1501, 0xF02A, 0x1500, 0xF15D, 0xC661, - 0x75C8, 0x49D5, 0xF00A, 0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, - 0x75D2, 0x49D9, 0xF150, 0xC553, 0x77A0, 0x75C8, 0x4855, 0x4856, 0x4857, - 0x4858, 0x48DA, 0x48DB, 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, - 0x9DC8, 0x75D2, 0x4859, 0x9DD2, 0xC643, 0x75C0, 0x49D4, 0xF033, 0x49D0, - 0xF137, 0xE030, 0xC63A, 0x75C8, 0x49D5, 0xF00E, 0x49D6, 0xF00C, 0x49D7, - 0xF00A, 0x49D8, 0xF008, 0x75D2, 0x49D9, 0xF005, 0xC62E, 0x75C0, 0x49D7, - 0xF125, 0xC528, 0x77A0, 0xC627, 0x75C8, 0x4855, 0x4856, 0x4857, 0x4858, - 0x48DA, 0x48DB, 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, 0x9DC8, - 0x75D2, 0x4859, 0x9DD2, 0xC616, 0x75C0, 0x4857, 0x9DC0, 0xC613, 0x75C0, - 0x49DA, 0xF003, 0x49D0, 0xF107, 0xC60B, 0xC50E, 0x48D9, 0x9DC0, 0x4859, - 0x9DC0, 0xC608, 0xC702, 0xBF00, 0x3AE0, 0xE860, 0xB400, 0xB5D4, 0xE908, - 0xE86C, 0x1200, 0xC409, 0x6780, 0x48F1, 0x8F80, 0xC404, 0xC602, 0xBE00, - 0x10AA, 0xC010, 0xEA7C, 0xC602, 0xBE00, 0x0000 + 0xE010, 0xE026, 0xE036, 0xE05C, 0xE05E, 0xE060, 0xE0C9, 0xE0D2, 0xE0D4, + 0xE0DF, 0xE0EA, 0xE0FB, 0xE101, 0xE106, 0xE10B, 0xE10D, 0x9996, 0x49D1, + 0xF005, 0x49D4, 0xF10A, 0x49D8, 0xF108, 0xC00F, 0x7100, 0x209C, 0x249C, + 0xC009, 0x9900, 0xE004, 0xC006, 0x1900, 0x9900, 0xC602, 0xBE00, 0x5A48, + 0xE0C2, 0x0004, 0xE10A, 0xC60F, 0x73C4, 0x49B3, 0xF106, 0x73C2, 0xC608, + 0xB406, 0xC609, 0xFF80, 0xC605, 0xB406, 0xC605, 0xFF80, 0x0544, 0x0568, + 0xE906, 0xCDE8, 0xC724, 0xC624, 0x9EE2, 0x1E01, 0x9EE0, 0x76E0, 0x49E0, + 0xF1FE, 0x76E6, 0x486D, 0x4868, 0x9EE4, 0x1E03, 0x9EE0, 0x76E0, 0x49E0, + 0xF1FE, 0xC615, 0x9EE2, 0x1E01, 0x9EE0, 0x76E0, 0x49E0, 0xF1FE, 0x76E6, + 0x486F, 0x9EE4, 0x1E03, 0x9EE0, 0x76E0, 0x49E0, 0xF1FE, 0x7196, 0xC702, + 0xBF00, 0x5A44, 0xEB0E, 0x0070, 0x00C3, 0xC602, 0xBE00, 0x0000, 0xC602, + 0xBE00, 0x0EBA, 0x1501, 0xF02A, 0x1500, 0xF15D, 0xC661, 0x75C8, 0x49D5, + 0xF00A, 0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, 0x75D2, 0x49D9, + 0xF150, 0xC553, 0x77A0, 0x75C8, 0x4855, 0x4856, 0x4857, 0x4858, 0x48DA, + 0x48DB, 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, 0x9DC8, 0x75D2, + 0x4859, 0x9DD2, 0xC643, 0x75C0, 0x49D4, 0xF033, 0x49D0, 0xF137, 0xE030, + 0xC63A, 0x75C8, 0x49D5, 0xF00E, 0x49D6, 0xF00C, 0x49D7, 0xF00A, 0x49D8, + 0xF008, 0x75D2, 0x49D9, 0xF005, 0xC62E, 0x75C0, 0x49D7, 0xF125, 0xC528, + 0x77A0, 0xC627, 0x75C8, 0x4855, 0x4856, 0x4857, 0x4858, 0x48DA, 0x48DB, + 0x49FE, 0xF002, 0x485A, 0x49FF, 0xF002, 0x485B, 0x9DC8, 0x75D2, 0x4859, + 0x9DD2, 0xC616, 0x75C0, 0x4857, 0x9DC0, 0xC613, 0x75C0, 0x49DA, 0xF003, + 0x49D0, 0xF107, 0xC60B, 0xC50E, 0x48D9, 0x9DC0, 0x4859, 0x9DC0, 0xC608, + 0xC702, 0xBF00, 0x3AE0, 0xE860, 0xB400, 0xB5D4, 0xE908, 0xE86C, 0x1200, + 0xC409, 0x6780, 0x48F1, 0x8F80, 0xC404, 0xC602, 0xBE00, 0x10AA, 0xC010, + 0xEA7C, 0xC602, 0xBE00, 0x0000, 0x740A, 0x4846, 0x4847, 0x9C0A, 0xC607, + 0x74C0, 0x48C6, 0x9CC0, 0xC602, 0xBE00, 0x13FE, 0xE054, 0x72CA, 0x4826, + 0x4827, 0x9ACA, 0xC607, 0x72C0, 0x48A6, 0x9AC0, 0xC602, 0xBE00, 0x07DC, + 0xE054, 0xC60F, 0x74C4, 0x49CC, 0xF109, 0xC60C, 0x74CA, 0x48C7, 0x9CCA, + 0xC609, 0x74C0, 0x4846, 0x9CC0, 0xC602, 0xBE00, 0x2480, 0xE092, 0xE0C0, + 0xE054, 0x7420, 0x48C0, 0x9C20, 0x7444, 0xC602, 0xBE00, 0x12F8, 0x1BFF, + 0x46EB, 0x1BFF, 0xC102, 0xB900, 0x0D5A, 0x1BFF, 0x46EB, 0x1BFF, 0xC102, + 0xB900, 0x0E2A, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000 }; rtl8125_hw_disable_mac_mcu_bps(dev); - for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8125a_2); i++) { - rtl8125_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8125a_2[i]); - } + rtl8125_write_mac_mcu_ram_code(tp, mcu_patch_code_8125a_2, ARRAY_SIZE(mcu_patch_code_8125a_2)); rtl8125_mac_ocp_write(tp, 0xFC26, 0x8000); rtl8125_mac_ocp_write(tp, 0xFC2A, 0x0540); - rtl8125_mac_ocp_write(tp, 0xFC2E, 0x0E24); rtl8125_mac_ocp_write(tp, 0xFC30, 0x0EB8); rtl8125_mac_ocp_write(tp, 0xFC32, 0x3A5C); rtl8125_mac_ocp_write(tp, 0xFC34, 0x10A8); + rtl8125_mac_ocp_write(tp, 0xFC40, 0x0D54); + rtl8125_mac_ocp_write(tp, 0xFC42, 0x0E24); - rtl8125_mac_ocp_write(tp, 0xFC48, 0x007A); + rtl8125_mac_ocp_write(tp, 0xFC48, 0x3072); } static void @@ -6023,7 +6234,6 @@ static void rtl8125_set_mac_mcu_8125b_2(struct net_device *dev) { struct rtl8125_private *tp = netdev_priv(dev); - u16 i; static const u16 mcu_patch_code_8125b_2[] = { 0xE010, 0xE01B, 0xE026, 0xE037, 0xE03D, 0xE057, 0xE05B, 0xE05F, 0xE061, 0xE063, 0xE065, 0xE067, 0xE069, 0xE06B, 0xE06D, 0xE06F, 0x740A, 0x4846, @@ -6044,9 +6254,7 @@ rtl8125_set_mac_mcu_8125b_2(struct net_device *dev) rtl8125_hw_disable_mac_mcu_bps(dev); - for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8125b_2); i++) { - rtl8125_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8125b_2[i]); - } + rtl8125_write_mac_mcu_ram_code(tp, mcu_patch_code_8125b_2, ARRAY_SIZE(mcu_patch_code_8125b_2)); rtl8125_mac_ocp_write(tp, 0xFC26, 0x8000); @@ -6056,9 +6264,9 @@ rtl8125_set_mac_mcu_8125b_2(struct net_device *dev) rtl8125_mac_ocp_write(tp, 0xFC2E, 0x12DA); rtl8125_mac_ocp_write(tp, 0xFC30, 0x4A20); rtl8125_mac_ocp_write(tp, 0xFC32, 0x47A0); - rtl8125_mac_ocp_write(tp, 0xFC34, 0x0A46); + //rtl8125_mac_ocp_write(tp, 0xFC34, 0x0A46); - rtl8125_mac_ocp_write(tp, 0xFC48, 0x007F); + rtl8125_mac_ocp_write(tp, 0xFC48, 0x003F); } static void @@ -6073,12 +6281,14 @@ rtl8125_hw_mac_mcu_config(struct net_device *dev) rtl8125_set_mac_mcu_8125a_1(dev); break; case CFG_METHOD_3: + case CFG_METHOD_6: rtl8125_set_mac_mcu_8125a_2(dev); break; case CFG_METHOD_4: rtl8125_set_mac_mcu_8125b_1(dev); break; case CFG_METHOD_5: + case CFG_METHOD_7: rtl8125_set_mac_mcu_8125b_2(dev); break; } @@ -6127,6 +6337,8 @@ rtl8125_hw_init(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_enable_cfg9346_write(tp); RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); @@ -6141,6 +6353,8 @@ rtl8125_hw_init(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xD40A, rtl8125_mac_ocp_read( tp, 0xD40A) & ~(BIT_4)); break; } @@ -6154,7 +6368,9 @@ rtl8125_hw_init(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) rtl8125_disable_ocp_phy_power_saving(dev); //Set PCIE uncorrectable error status mask pcie 0x108 @@ -6214,6 +6430,7 @@ rtl8125_hw_ephy_config(struct net_device *dev) rtl8125_ephy_write(tp, 0x63, 0xAB62); break; case CFG_METHOD_3: + case CFG_METHOD_6: rtl8125_ephy_write(tp, 0x04, 0xD000); rtl8125_ephy_write(tp, 0x0A, 0x8653); rtl8125_ephy_write(tp, 0x23, 0xAB66); @@ -6280,6 +6497,7 @@ rtl8125_hw_ephy_config(struct net_device *dev) rtl8125_ephy_write(tp, 0x5B, 0x1EA0); break; case CFG_METHOD_5: + case CFG_METHOD_7: rtl8125_ephy_write(tp, 0x0B, 0xA908); rtl8125_ephy_write(tp, 0x22, 0x0023); rtl8125_ephy_write(tp, 0x1E, 0x28EB); @@ -6301,6 +6519,8 @@ rtl8125_get_hw_phy_mcu_code_ver(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E); hw_ram_code_ver = mdio_direct_read_phy_ocp(tp, 0xA438); break; @@ -6384,6 +6604,8 @@ rtl8125_write_hw_phy_mcu_code_ver(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E); mdio_direct_write_phy_ocp(tp, 0xA438, tp->sw_ram_code_ver); tp->hw_ram_code_ver = tp->sw_ram_code_ver; @@ -6401,12 +6623,14 @@ rtl8125_acquire_phy_mcu_patch_key_lock(struct rtl8125_private *tp) PatchKey = 0x8600; break; case CFG_METHOD_3: + case CFG_METHOD_6: PatchKey = 0x8601; break; case CFG_METHOD_4: PatchKey = 0x3700; break; case CFG_METHOD_5: + case CFG_METHOD_7: PatchKey = 0x3701; break; default: @@ -6426,6 +6650,8 @@ rtl8125_release_phy_mcu_patch_key_lock(struct rtl8125_private *tp) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: mdio_direct_write_phy_ocp(tp, 0xA436, 0x0000); mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); ClearEthPhyOcpBit(tp, 0xB82E, BIT_0); @@ -8878,12 +9104,14 @@ rtl8125_init_hw_phy_mcu(struct net_device *dev) rtl8125_set_phy_mcu_8125a_1(dev); break; case CFG_METHOD_3: + case CFG_METHOD_6: rtl8125_set_phy_mcu_8125a_2(dev); break; case CFG_METHOD_4: rtl8125_set_phy_mcu_8125b_1(dev); break; case CFG_METHOD_5: + case CFG_METHOD_7: rtl8125_set_phy_mcu_8125b_2(dev); break; } @@ -9809,12 +10037,14 @@ rtl8125_hw_phy_config(struct net_device *dev) rtl8125_hw_phy_config_8125a_1(dev); break; case CFG_METHOD_3: + case CFG_METHOD_6: rtl8125_hw_phy_config_8125a_2(dev); break; case CFG_METHOD_4: rtl8125_hw_phy_config_8125b_1(dev); break; case CFG_METHOD_5: + case CFG_METHOD_7: rtl8125_hw_phy_config_8125b_2(dev); break; } @@ -9825,6 +10055,8 @@ rtl8125_hw_phy_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: default: rtl8125_mdio_write(tp, 0x1F, 0x0A5B); rtl8125_clear_eth_phy_bit(tp, 0x12, BIT_15); @@ -9835,7 +10067,8 @@ rtl8125_hw_phy_config(struct net_device *dev) /*ocp phy power saving*/ /* if (aspm) { - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_6) rtl8125_enable_ocp_phy_power_saving(dev); } */ @@ -9940,6 +10173,8 @@ rtl8125_get_bios_setting(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->bios_setting = RTL_R32(tp, TimeInt2); break; } @@ -9955,6 +10190,8 @@ rtl8125_set_bios_setting(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W32(tp, TimeInt2, tp->bios_setting); break; } @@ -10008,8 +10245,6 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: - case CFG_METHOD_4: - case CFG_METHOD_5: //tp->HwSuppDashVer = 3; break; default: @@ -10022,6 +10257,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwPkgDet = rtl8125_mac_ocp_read(tp, 0xDC00); tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x07; break; @@ -10035,6 +10272,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwSuppNowIsOobVer = 1; break; } @@ -10044,6 +10283,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwPcieSNOffset = 0x16C; break; } @@ -10099,6 +10340,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->org_pci_offset_99 = rtl8125_csi_fun0_read_byte(tp, 0x99); tp->org_pci_offset_99 &= ~(BIT_5|BIT_6); break; @@ -10107,10 +10350,12 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_6: tp->org_pci_offset_180 = rtl8125_csi_fun0_read_byte(tp, 0x264); break; case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: tp->org_pci_offset_180 = rtl8125_csi_fun0_read_byte(tp, 0x214); break; } @@ -10124,6 +10369,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: default: tp->use_timer_interrrupt = TRUE; break; @@ -10137,6 +10384,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V3; break; default: @@ -10149,6 +10398,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwSuppLinkChgWakeUpVer = 3; break; } @@ -10157,6 +10408,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwSuppD0SpeedUpVer = 1; break; } @@ -10166,6 +10419,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwSuppCheckPhyDisableModeVer = 3; break; } @@ -10175,6 +10430,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwSuppTxNoCloseVer = 3; break; } @@ -10185,6 +10442,7 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_6: tp->RequireLSOPatch = TRUE; break; } @@ -10194,12 +10452,14 @@ rtl8125_init_software_variable(struct net_device *dev) tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_2; break; case CFG_METHOD_3: + case CFG_METHOD_6: tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_3; break; case CFG_METHOD_4: tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_4; break; case CFG_METHOD_5: + case CFG_METHOD_7: tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_5; break; } @@ -10211,17 +10471,39 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_3: + case CFG_METHOD_6: if ((rtl8125_mac_ocp_read(tp, 0xD442) & BIT_5) && - (mdio_direct_read_phy_ocp(tp, 0xD068) & BIT_1) - ) { + (mdio_direct_read_phy_ocp(tp, 0xD068) & BIT_1)) tp->RequirePhyMdiSwapPatch = TRUE; - } + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_2: + case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: + tp->HwSuppMacMcuVer = 2; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_2: + case CFG_METHOD_3: + case CFG_METHOD_4: + case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: + tp->MacMcuPageSize = RTL8125_MAC_MCU_PAGE_SIZE; break; } switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: tp->HwSuppNumTxQueues = 2; tp->HwSuppNumRxQueues = 4; break; @@ -10241,6 +10523,7 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: tp->HwSuppRssVer = 5; tp->HwSuppIndirTblEntries = 128; break; @@ -10273,6 +10556,7 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: tp->HwSuppPtpVer = 1; break; } @@ -10298,6 +10582,7 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: tp->HwSuppIsrVer = 2; break; default: @@ -10341,10 +10626,12 @@ rtl8125_init_software_variable(struct net_device *dev) switch (tp->mcfg) { case CFG_METHOD_2: case CFG_METHOD_3: + case CFG_METHOD_6: tp->HwSuppIntMitiVer = 3; break; case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: tp->HwSuppIntMitiVer = 4; break; } @@ -10354,6 +10641,8 @@ rtl8125_init_software_variable(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: tp->HwSuppExtendTallyCounterVer = 1; break; } @@ -10365,7 +10654,10 @@ rtl8125_init_software_variable(struct net_device *dev) tp->wol_opts = rtl8125_get_hw_wol(tp); tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED; - rtl8125_link_option((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode); + if (tp->mcfg == CFG_METHOD_6 || tp->mcfg == CFG_METHOD_7) + rtl8125_link_option_giga((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode); + else + rtl8125_link_option((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode); tp->autoneg = autoneg_mode; tp->speed = speed_mode; @@ -10441,7 +10733,9 @@ rtl8125_get_mac_address(struct net_device *dev) if(tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) { + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) { *(u32*)&mac_addr[0] = RTL_R32(tp, BACKUP_ADDR0_8125); *(u16*)&mac_addr[4] = RTL_R16(tp, BACKUP_ADDR1_8125); } @@ -11280,6 +11574,8 @@ rtl8125_phy_power_up(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_wait_phy_ups_resume(dev, 3); break; }; @@ -11489,6 +11785,12 @@ rtl8125_esd_checker(struct rtl8125_private *tp) printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd); pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd); tp->esd_flag |= BIT_0; + + pci_read_config_byte(pdev, PCI_COMMAND, &cmd); + if (cmd == 0xff) { + printk(KERN_ERR "%s: pci link is down \n.", dev->name); + goto exit; + } } pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l); @@ -11604,6 +11906,8 @@ rtl8125_esd_checker(struct rtl8125_private *tp) rtl8125_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); tp->esd_flag = 0; } +exit: + return; } /* static void @@ -11713,6 +12017,7 @@ static int rtl8125_try_msi(struct rtl8125_private *tp) switch (tp->mcfg) { case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_7: tp->max_irq_nvecs = R8125_MAX_MSIX_VEC_8125B; tp->min_irq_nvecs = R8125_MIN_MSIX_VEC_8125B; break; @@ -12089,7 +12394,9 @@ rtl8125_init_one(struct pci_dev *pdev, dev_err(&pdev->dev, "Can't allocate interrupt\n"); goto err_out_1; } - +#ifdef ENABLE_PTP_SUPPORT + spin_lock_init(&tp->lock); +#endif rtl8125_init_software_variable(dev); RTL_NET_DEVICE_OPS(rtl8125_netdev_ops); @@ -12694,6 +13001,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); @@ -12706,6 +13015,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1); break; } @@ -12715,6 +13026,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: //IntMITI_0-IntMITI_31 for (i=0xA00; i<0xB00; i+=4) RTL_W32(tp, i, 0x00000000); @@ -12727,6 +13040,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xC0B6); mac_ocp_data &= BIT_0; rtl8125_mac_ocp_write(tp, 0xC0B6, mac_ocp_data); @@ -12749,7 +13064,9 @@ rtl8125_hw_config(struct net_device *dev) if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || tp->mcfg == CFG_METHOD_4 || - tp->mcfg == CFG_METHOD_5) { + tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_6 || + tp->mcfg == CFG_METHOD_7) { set_offset70F(tp, 0x27); set_offset79(tp, 0x50); @@ -12774,21 +13091,19 @@ rtl8125_hw_config(struct net_device *dev) mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE614); mac_ocp_data &= ~( BIT_10 | BIT_9 | BIT_8); - if (tp->mcfg == CFG_METHOD_4 || tp->mcfg == CFG_METHOD_5) { + if (tp->mcfg == CFG_METHOD_4 || tp->mcfg == CFG_METHOD_5 || + tp->mcfg == CFG_METHOD_7) mac_ocp_data |= ((2 & 0x07) << 8); - } else { - if (tp->DASH && !(rtl8125_csi_fun0_read_byte(tp, 0x79) & BIT_0)) - mac_ocp_data |= ((3 & 0x07) << 8); - else - mac_ocp_data |= ((4 & 0x07) << 8); - } + else + mac_ocp_data |= ((3 & 0x07) << 8); rtl8125_mac_ocp_write(tp, 0xE614, mac_ocp_data); rtl8125_set_tx_q_num(tp, rtl8125_tot_tx_rings(tp)); mac_ocp_data = rtl8125_mac_ocp_read(tp, 0xE63E); mac_ocp_data &= ~(BIT_5 | BIT_4); - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_6) mac_ocp_data |= ((0x02 & 0x03) << 4); rtl8125_mac_ocp_write(tp, 0xE63E, mac_ocp_data); @@ -12846,7 +13161,8 @@ rtl8125_hw_config(struct net_device *dev) else RTL_W8(tp, 0xD0, (RTL_R8(tp, 0xD0) & ~BIT_6) | BIT_7); - if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3 || + tp->mcfg == CFG_METHOD_6) RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | BIT_0); rtl8125_disable_eee_plus(tp); @@ -12892,6 +13208,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: rtl8125_mac_ocp_write(tp, 0xE098, 0xC302); break; } @@ -12901,6 +13219,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: if (aspm) { rtl8125_init_pci_offset_99(tp); } @@ -12911,6 +13231,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: if (aspm) { rtl8125_init_pci_offset_180(tp); } @@ -12931,7 +13253,9 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_2: case CFG_METHOD_3: case CFG_METHOD_4: - case CFG_METHOD_5: { + case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: { int timeout; for (timeout = 0; timeout < 10; timeout++) { if ((rtl8125_mac_ocp_read(tp, 0xE00E) & BIT_13)==0) @@ -12982,6 +13306,8 @@ rtl8125_hw_config(struct net_device *dev) case CFG_METHOD_3: case CFG_METHOD_4: case CFG_METHOD_5: + case CFG_METHOD_6: + case CFG_METHOD_7: if (aspm) { RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0); RTL_W8(tp, Config2, RTL_R8(tp, Config2) | BIT_7); diff --git a/package/lean/r8125/src/r8125_ptp.c b/package/lean/r8125/src/r8125_ptp.c old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125_ptp.h b/package/lean/r8125/src/r8125_ptp.h old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125_realwow.h b/package/lean/r8125/src/r8125_realwow.h old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125_rss.c b/package/lean/r8125/src/r8125_rss.c old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/r8125_rss.h b/package/lean/r8125/src/r8125_rss.h old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/rtl_eeprom.c b/package/lean/r8125/src/rtl_eeprom.c old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/rtl_eeprom.h b/package/lean/r8125/src/rtl_eeprom.h old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/rtltool.c b/package/lean/r8125/src/rtltool.c old mode 100755 new mode 100644 diff --git a/package/lean/r8125/src/rtltool.h b/package/lean/r8125/src/rtltool.h old mode 100755 new mode 100644